From: juzhe.zhong@rivai.ai
To: gcc-patches@gcc.gnu.org
Cc: kito.cheng@gmail.com, Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
Subject: [PATCH] RISC-V: Fix PR109228
Date: Wed, 22 Mar 2023 13:06:23 +0800 [thread overview]
Message-ID: <20230322050623.229416-1-juzhe.zhong@rivai.ai> (raw)
From: Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
This patch fix PR109228
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109228
gcc/ChangeLog:
* config/riscv/riscv-vector-builtins-bases.cc (class vlenb): Add __riscv_vlenb support.
(BASE): Ditto.
* config/riscv/riscv-vector-builtins-bases.h: Ditto.
* config/riscv/riscv-vector-builtins-functions.def (vlenb): Ditto.
* config/riscv/riscv-vector-builtins-shapes.cc (struct vlenb_def): Ditto.
(SHAPE): Ditto.
* config/riscv/riscv-vector-builtins-shapes.h: Ditto.
* config/riscv/riscv-vector-builtins.cc: Ditto.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/vlenb-1.c: New test.
---
.../riscv/riscv-vector-builtins-bases.cc | 17 +++++++
.../riscv/riscv-vector-builtins-bases.h | 1 +
.../riscv/riscv-vector-builtins-functions.def | 1 +
.../riscv/riscv-vector-builtins-shapes.cc | 25 ++++++++++
.../riscv/riscv-vector-builtins-shapes.h | 1 +
gcc/config/riscv/riscv-vector-builtins.cc | 7 +++
.../gcc.target/riscv/rvv/base/vlenb-1.c | 46 +++++++++++++++++++
7 files changed, 98 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/vlenb-1.c
diff --git a/gcc/config/riscv/riscv-vector-builtins-bases.cc b/gcc/config/riscv/riscv-vector-builtins-bases.cc
index 839eb66efb2..52467bbc961 100644
--- a/gcc/config/riscv/riscv-vector-builtins-bases.cc
+++ b/gcc/config/riscv/riscv-vector-builtins-bases.cc
@@ -1658,6 +1658,21 @@ public:
}
};
+/* Implements vlenb. */
+class vlenb : public function_base
+{
+public:
+ bool apply_vl_p () const override { return false; }
+
+ rtx expand (function_expander &e) const override
+ {
+ machine_mode mode = GET_MODE (e.target);
+ rtx vlenb = gen_int_mode (BYTES_PER_RISCV_VECTOR, mode);
+ emit_move_insn (e.target, vlenb);
+ return e.target;
+ }
+};
+
static CONSTEXPR const vsetvl<false> vsetvl_obj;
static CONSTEXPR const vsetvl<true> vsetvlmax_obj;
static CONSTEXPR const loadstore<false, LST_UNIT_STRIDE, false> vle_obj;
@@ -1868,6 +1883,7 @@ static CONSTEXPR const vset vset_obj;
static CONSTEXPR const vget vget_obj;
static CONSTEXPR const read_vl read_vl_obj;
static CONSTEXPR const vleff vleff_obj;
+static CONSTEXPR const vlenb vlenb_obj;
/* Declare the function base NAME, pointing it to an instance
of class <NAME>_obj. */
@@ -2084,5 +2100,6 @@ BASE (vset)
BASE (vget)
BASE (read_vl)
BASE (vleff)
+BASE (vlenb)
} // end namespace riscv_vector
diff --git a/gcc/config/riscv/riscv-vector-builtins-bases.h b/gcc/config/riscv/riscv-vector-builtins-bases.h
index 14e8a55cd97..0196f80b69e 100644
--- a/gcc/config/riscv/riscv-vector-builtins-bases.h
+++ b/gcc/config/riscv/riscv-vector-builtins-bases.h
@@ -240,6 +240,7 @@ extern const function_base *const vset;
extern const function_base *const vget;
extern const function_base *const read_vl;
extern const function_base *const vleff;
+extern const function_base *const vlenb;
}
} // end namespace riscv_vector
diff --git a/gcc/config/riscv/riscv-vector-builtins-functions.def b/gcc/config/riscv/riscv-vector-builtins-functions.def
index 198ccfd86b7..3f1513cb9fd 100644
--- a/gcc/config/riscv/riscv-vector-builtins-functions.def
+++ b/gcc/config/riscv/riscv-vector-builtins-functions.def
@@ -38,6 +38,7 @@ along with GCC; see the file COPYING3. If not see
/* Internal helper functions for gimple fold use. */
DEF_RVV_FUNCTION (read_vl, read_vl, none_preds, p_none_void_ops)
+DEF_RVV_FUNCTION (vlenb, vlenb, none_preds, ul_none_void_ops)
/* 6. Configuration-Setting Instructions. */
diff --git a/gcc/config/riscv/riscv-vector-builtins-shapes.cc b/gcc/config/riscv/riscv-vector-builtins-shapes.cc
index edb0d34b81c..0682f81400a 100644
--- a/gcc/config/riscv/riscv-vector-builtins-shapes.cc
+++ b/gcc/config/riscv/riscv-vector-builtins-shapes.cc
@@ -553,6 +553,30 @@ struct fault_load_def : public build_base
}
};
+/* vlenb_def class. */
+struct vlenb_def : public function_shape
+{
+ void build (function_builder &b,
+ const function_group_info &group) const override
+ {
+ auto_vec<tree> argument_types;
+ function_instance function_instance (group.base_name, *group.base,
+ *group.shape, group.ops_infos.types[0],
+ group.preds[0], &group.ops_infos);
+ b.add_unique_function (function_instance, (*group.shape),
+ long_unsigned_type_node, argument_types);
+ }
+
+ char *get_name (function_builder &b, const function_instance &instance,
+ bool overloaded_p) const override
+ {
+ if (overloaded_p)
+ return nullptr;
+ b.append_base_name (instance.base_name);
+ return b.finish_name ();
+ }
+};
+
SHAPE(vsetvl, vsetvl)
SHAPE(vsetvl, vsetvlmax)
SHAPE(loadstore, loadstore)
@@ -572,5 +596,6 @@ SHAPE(vset, vset)
SHAPE(vget, vget)
SHAPE(read_vl, read_vl)
SHAPE(fault_load, fault_load)
+SHAPE(vlenb, vlenb)
} // end namespace riscv_vector
diff --git a/gcc/config/riscv/riscv-vector-builtins-shapes.h b/gcc/config/riscv/riscv-vector-builtins-shapes.h
index 30780845f7b..aee2f94b04c 100644
--- a/gcc/config/riscv/riscv-vector-builtins-shapes.h
+++ b/gcc/config/riscv/riscv-vector-builtins-shapes.h
@@ -43,6 +43,7 @@ extern const function_shape *const vset;
extern const function_shape *const vget;
extern const function_shape *const read_vl;
extern const function_shape *const fault_load;
+extern const function_shape *const vlenb;
}
} // end namespace riscv_vector
diff --git a/gcc/config/riscv/riscv-vector-builtins.cc b/gcc/config/riscv/riscv-vector-builtins.cc
index 0df3cd15119..bd16fe9db7d 100644
--- a/gcc/config/riscv/riscv-vector-builtins.cc
+++ b/gcc/config/riscv/riscv-vector-builtins.cc
@@ -2130,6 +2130,13 @@ static CONSTEXPR const rvv_op_info p_none_void_ops
rvv_arg_type_info (RVV_BASE_size), /* Return type */
void_args /* Args */};
+/* A static operand information for unsigned long func () function registration. */
+static CONSTEXPR const rvv_op_info ul_none_void_ops
+ = {none_ops, /* Types */
+ OP_TYPE_none, /* Suffix */
+ rvv_arg_type_info (RVV_BASE_unsigned_long), /* Return type */
+ void_args /* Args */};
+
/* A list of all RVV base function types. */
static CONSTEXPR const function_type_info function_types[] = {
#define DEF_RVV_TYPE_INDEX(VECTOR, MASK, SIGNED, UNSIGNED, EEW8_INDEX, EEW16_INDEX, \
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/vlenb-1.c b/gcc/testsuite/gcc.target/riscv/rvv/base/vlenb-1.c
new file mode 100644
index 00000000000..a02fe9e98c4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/vlenb-1.c
@@ -0,0 +1,46 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3" } */
+
+#include "riscv_vector.h"
+
+void f0 (char *x, char * p1, char * p2, char * p3) {
+ vbool32_t bp1 = *(vbool32_t*)p1;
+ vbool32_t bp2 = *(vbool32_t*)p2;
+ vbool32_t bp3 = *(vbool32_t*)p3;
+ asm volatile ("":::"memory");
+ *(vbool32_t *)(x + (__riscv_vlenb())) = bp2;
+ *(vbool32_t *)(x) = bp1;
+ *(vbool32_t *)(x + (__riscv_vlenb())*2) = bp3;
+}
+
+void f1 (char *x, char * p1, char * p2, char * p3) {
+ vbool32_t bp1 = *(vbool32_t*)p1;
+ vbool32_t bp2 = *(vbool32_t*)p2;
+ vbool32_t bp3 = *(vbool32_t*)p3;
+ asm volatile ("":::"memory");
+ *(vbool32_t *)(x + (__riscv_vlenb() / 2)) = bp2;
+ *(vbool32_t *)(x) = bp1;
+ *(vbool32_t *)(x + (__riscv_vlenb() / 2)*2) = bp3;
+}
+
+void f2 (char *x, char * p1, char * p2, char * p3) {
+ vbool32_t bp1 = *(vbool32_t*)p1;
+ vbool32_t bp2 = *(vbool32_t*)p2;
+ vbool32_t bp3 = *(vbool32_t*)p3;
+ asm volatile ("":::"memory");
+ *(vbool32_t *)(x + (__riscv_vlenb() / 4)) = bp2;
+ *(vbool32_t *)(x) = bp1;
+ *(vbool32_t *)(x + (__riscv_vlenb() / 4)*2) = bp3;
+}
+
+void f3 (char *x, char * p1, char * p2, char * p3) {
+ vbool32_t bp1 = *(vbool32_t*)p1;
+ vbool32_t bp2 = *(vbool32_t*)p2;
+ vbool32_t bp3 = *(vbool32_t*)p3;
+ asm volatile ("":::"memory");
+ *(vbool32_t *)(x + (__riscv_vlenb() / 4)) = bp2;
+ *(vbool32_t *)(x) = bp1;
+ *(vbool32_t *)(x + (__riscv_vlenb() / 4)*2) = bp3;
+}
+
+/* { dg-final { scan-assembler-times {vsm\.v} 12 } } */
--
2.36.1
next reply other threads:[~2023-03-22 5:06 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-22 5:06 juzhe.zhong [this message]
2023-03-23 3:26 ` Kito Cheng
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