From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pj1-x102d.google.com (mail-pj1-x102d.google.com [IPv6:2607:f8b0:4864:20::102d]) by sourceware.org (Postfix) with ESMTPS id 057993857714 for ; Wed, 5 Apr 2023 21:03:05 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 057993857714 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivosinc.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivosinc.com Received: by mail-pj1-x102d.google.com with SMTP id qe8-20020a17090b4f8800b0023f07253a2cso38548255pjb.3 for ; Wed, 05 Apr 2023 14:03:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20210112.gappssmtp.com; s=20210112; t=1680728584; x=1683320584; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=6ywSxDa6+bAZuEdeq9xREaPCG8lxpH/KGb1u4BvZgkw=; b=BLIcGxCmbutNCLYaTmJK8twNBBbfsbeEyK7WsXvfi41gG2rz9ozeuvt1mb4df2/gYX qC0PyKhkcj97tKJPmHzaKglt79+NMnaNHhuHHgKEBEnIfIa36ahbfWc7G/C9LGndtnGX VqyIGLQvMnNstlPoBD3DC+SEcFZHtAvRvtTHcYl77OwftO1Zh5e2COL1AEi5DEXSJp3T NM9gD7cMUpB28cZLmEXN+9woEOzaaF/N2pnjogyxw7pacIGHwekqe/JAXVDofHRkWzvA 8z4w50pyje38ePist0GHs1PGVhrSVC3INJHyhA6A+RboqnrjYAsqqbHB3ty9so/YMaGU gooA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1680728584; x=1683320584; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=6ywSxDa6+bAZuEdeq9xREaPCG8lxpH/KGb1u4BvZgkw=; b=WYj6ujglfH9vANJTw2bRVuVmpuk+JpPY1IFTpJIfR2ag27hu4vxGV9tdXX0KLqcno+ CpzW714S4VRy7uug7TDe+jwax9+VKFSX2kCH1cuqpceV0+SLtxrkrgF6gFqe1BPTzZYp REP7KK1avUtLzM4Ow9uSMm7HxN9h3WjcAg3ARb2OiBpbX3YmboTmos11nWD+Wm6ORDJA 3Ol5srI2jzHVA+1z6gjArGEAkjwdu3rPrF7p+Spwsoo60Poq0qHo29yP2ToT0tvVN14f eOguOdVofvXMlbHamFAPGRRnr3FQoCBIMUUyeqUFeT3g3rHStAL+jykOiq9CChoz1n/+ TZbg== X-Gm-Message-State: AAQBX9cKK5+0Ff5H/zNb+wsz0fTDNE0U8c7Ycok1Ua3zQZJzY9/z+BbT K478J0pAw6bDqRTPPkZfqIuXjqM7alfHrNVnxDUlr34t X-Google-Smtp-Source: AKy350bnJjmzrqAN+mNtne4jC6Xbumvm7PKlmVkVWGeRL9HDFaCXGzGFeG1+H1h1jHMFGvUVzCVUBw== X-Received: by 2002:a17:90b:38c6:b0:23b:3641:cf16 with SMTP id nn6-20020a17090b38c600b0023b3641cf16mr3889119pjb.11.1680728583801; Wed, 05 Apr 2023 14:03:03 -0700 (PDT) Received: from patrick-ThinkPad-X1-Carbon-Gen-8.hq.rivosinc.com ([50.221.140.188]) by smtp.gmail.com with ESMTPSA id e6-20020a17090a77c600b002342ccc8280sm1809477pjs.6.2023.04.05.14.03.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 05 Apr 2023 14:03:03 -0700 (PDT) From: Patrick O'Neill To: gcc-patches@gcc.gnu.org Cc: palmer@rivosinc.com, gnu-toolchain@rivosinc.com, vineetg@rivosinc.com, andrew@sifive.com, kito.cheng@sifive.com, dlustig@nvidia.com, jeffreyalaw@gmail.com, cmuellner@gcc.gnu.org, andrea@rivosinc.com, Patrick O'Neill Subject: [PATCH v2 4/8] RISCV: Add AMO release bits Date: Wed, 5 Apr 2023 14:01:14 -0700 Message-Id: <20230405210118.1969283-5-patrick@rivosinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230405210118.1969283-1-patrick@rivosinc.com> References: <20220407182918.294892-1-patrick@rivosinc.com> <20230405210118.1969283-1-patrick@rivosinc.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,GIT_PATCH_0,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: This patch sets the relevant .rl bits on amo operations. 2023-04-05 Patrick O'Neill * riscv.cc (riscv_print_operand): change behavior of %A to include release bits. Signed-off-by: Patrick O'Neill --- gcc/config/riscv/riscv.cc | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc index 8f5636c93ed..8ffee494fbe 100644 --- a/gcc/config/riscv/riscv.cc +++ b/gcc/config/riscv/riscv.cc @@ -4492,8 +4492,13 @@ riscv_print_operand (FILE *file, rtx op, int letter) break; case 'A': - if (riscv_memmodel_needs_amo_acquire (model)) + if (riscv_memmodel_needs_amo_acquire (model) && + riscv_memmodel_needs_release_fence (model)) + fputs (".aqrl", file); + else if (riscv_memmodel_needs_amo_acquire (model)) fputs (".aq", file); + else if (riscv_memmodel_needs_release_fence (model)) + fputs (".rl", file); break; case 'F': -- 2.25.1