From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from cstnet.cn (smtp80.cstnet.cn [159.226.251.80]) by sourceware.org (Postfix) with ESMTP id 4BC4E3858D32 for ; Thu, 6 Apr 2023 06:22:10 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 4BC4E3858D32 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=iscas.ac.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=iscas.ac.cn Received: from localhost.localdomain (unknown [47.113.87.88]) by APP-01 (Coremail) with SMTP id qwCowAC3v3vrZC5keSobAA--.1590S2; Thu, 06 Apr 2023 14:21:32 +0800 (CST) From: Jiawei To: gcc-patches@gcc.gnu.org Cc: kito.cheng@sifive.com, palmer@dabbelt.com, christoph.muellner@vrull.eu, jeremy.bennett@embecosm.com, mary.bennett@embecosm.com, nandni.jamnadas@embecosm.com, charlie.keaney@embecosm.com, simon.cook@embecosm.com, tariq.kurd@codasip.com, ibrahim.abu.kharmeh1@huawei.com, sinan.lin@linux.alibaba.com, wuwei2016@iscas.ac.cn, shihua@iscas.ac.cn, shiyulong@iscas.ac.cn, chenyixuan@iscas.ac.cn, Jiawei Subject: [PATCH 0/5] RISC-V: Support ZC* extensions. Date: Thu, 6 Apr 2023 14:21:13 +0800 Message-Id: <20230406062118.47431-1-jiawei@iscas.ac.cn> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CM-TRANSID:qwCowAC3v3vrZC5keSobAA--.1590S2 X-Coremail-Antispam: 1UD129KBjvJXoW3GrW7AF13XryxWrWkWFy3Arb_yoW7ZF4Dpa 18CryIyrZxJFZ3Gr1SqFy2qw4jvwnYgrW5uw1xZr18ArWYyrW5X3WkK3W3GFW5XF4UJrna 93429r15u34jqFJanT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUvv14x267AKxVW5JVWrJwAFc2x0x2IEx4CE42xK8VAvwI8IcIk0 rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2ocxC64kIII0Yj41l84x0c7CEw4AK67xGY2AK02 1l84ACjcxK6xIIjxv20xvE14v26r4j6ryUM28EF7xvwVC0I7IYx2IY6xkF7I0E14v26r4j 6F4UM28EF7xvwVC2z280aVAFwI0_Cr1j6rxdM28EF7xvwVC2z280aVCY1x0267AKxVW0oV Cq3wAS0I0E0xvYzxvE52x082IY62kv0487Mc02F40EFcxC0VAKzVAqx4xG6I80ewAv7VC0 I7IYx2IY67AKxVWUJVWUGwAv7VC2z280aVAFwI0_Jr0_Gr1lOx8S6xCaFVCjc4AY6r1j6r 4UM4x0Y48IcxkI7VAKI48JM4x0x7Aq67IIx4CEVc8vx2IErcIFxwACI402YVCY1x02628v n2kIc2xKxwCY02Avz4vE174l42xK82IYc2Ij64vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr 1lx2IqxVAqx4xG67AKxVWUJVWUGwC20s026x8GjcxK67AKxVWUGVWUWwC2zVAF1VAY17CE 14v26r4a6rW5MIIYrxkI7VAKI48JMIIF0xvE2Ix0cI8IcVAFwI0_Jr0_JF4lIxAIcVC0I7 IYx2IY6xkF7I0E14v26r4j6F4UMIIF0xvE42xK8VAvwI8IcIk0rVWUJVWUCwCI42IY6I8E 87Iv67AKxVWUJVW8JwCI42IY6I8E87Iv6xkF7I0E14v26r4j6r4UJbIYCTnIWIevJa73Uj IFyTuYvjfUUqXdUUUUU X-Originating-IP: [47.113.87.88] X-CM-SenderInfo: 5mld4v3l6l2u1dvotugofq/1tbiCQsNAGQuHKL43QAAse X-Spam-Status: No, score=-4.6 required=5.0 tests=BAYES_00,KAM_DMARC_STATUS,KAM_SHORT,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS,TXREP,URIBL_BLACK autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: RISC-V Code Size Reduction(ZC*) extensions is a group of extensions which define subsets of the existing C extension (Zca, Zcd, Zcf) and new extensions(Zcb, Zcmp, Zcmt) which only contain 16-bit encodings.[1] The implementation of the RISC-V Code Size Reduction extension in GCC is an important step towards making the RISC-V architecture more efficient. The cooperation with OpenHW group has played a crucial role in this effort, with facilitating the implementation, testing and validation. Currently works can also find in OpenHW group's github repo.[2] Thanks to Tariq Kurd, Ibrahim Abu Kharmeh for help with explain the specification, and Jeremy Bennett's patient guidance throughout the whole development process. [1] github.com/riscv/riscv-code-size-reduction/tree/main/Zc-specification [2] github.com/openhwgroup/corev-gcc Co-Authored by: Charlie Keaney Co-Authored by: Mary Bennett Co-Authored by: Nandni Jamnadas Co-Authored by: Sinan Lin Co-Authored by: Simon Cook Co-Authored by: Shihua Liao Co-Authored by: Yulong Shi RISC-V: Minimal support for ZC extensions. RISC-V: Enable compressible features when use ZC* extensions. RISC-V: Add ZC* test for march args being passed. RISC-V: Add Zcmp extension supports. RISC-V: Add ZCMP push/pop testcases. gcc/common/config/riscv/riscv-common.cc | 39 ++ gcc/config.gcc | 2 +- gcc/config/riscv/predicates.md | 16 + gcc/config/riscv/riscv-c.cc | 2 +- gcc/config/riscv/riscv-opts.h | 16 + gcc/config/riscv/riscv-passes.def | 1 + gcc/config/riscv/riscv-protos.h | 4 + gcc/config/riscv/riscv-shorten-memrefs.cc | 3 +- gcc/config/riscv/riscv-zcmp-popret.cc | 260 ++++++++++ gcc/config/riscv/riscv.cc | 453 +++++++++++++++++- gcc/config/riscv/riscv.h | 6 +- gcc/config/riscv/riscv.md | 3 + gcc/config/riscv/riscv.opt | 3 + gcc/config/riscv/t-riscv | 4 + gcc/config/riscv/zc.md | 47 ++ gcc/testsuite/gcc.target/riscv/arch-20.c | 5 + gcc/testsuite/gcc.target/riscv/arch-21.c | 5 + gcc/testsuite/gcc.target/riscv/zc-zca-arch.c | 9 + gcc/testsuite/gcc.target/riscv/zc-zcb-arch.c | 9 + .../gcc.target/riscv/zc-zcb-m-arch.c | 9 + .../gcc.target/riscv/zc-zcb-zba-arch.c | 9 + .../gcc.target/riscv/zc-zcb-zbb-arch.c | 9 + gcc/testsuite/gcc.target/riscv/zc-zcf-arch.c | 9 + gcc/testsuite/gcc.target/riscv/zc-zcmp-arch.c | 9 + .../gcc.target/riscv/zc-zcmp-push-pop-1.c | 15 + .../gcc.target/riscv/zc-zcmp-push-pop-2.c | 17 + .../gcc.target/riscv/zc-zcmp-push-pop-3.c | 17 + .../gcc.target/riscv/zc-zcmp-push-pop-4.c | 17 + .../gcc.target/riscv/zc-zcmp-push-pop-5.c | 17 + .../gcc.target/riscv/zc-zcmp-push-pop-6.c | 13 + .../gcc.target/riscv/zc-zcmp-push-pop-7.c | 16 + .../gcc.target/riscv/zc-zcmpe-arch.c | 9 + .../gcc.target/riscv/zc-zcmpe-push-pop-1.c | 15 + .../gcc.target/riscv/zc-zcmpe-push-pop-2.c | 17 + .../gcc.target/riscv/zc-zcmpe-push-pop-3.c | 17 + .../gcc.target/riscv/zc-zcmpe-push-pop-4.c | 17 + .../gcc.target/riscv/zc-zcmpe-push-pop-5.c | 17 + .../gcc.target/riscv/zc-zcmpe-push-pop-6.c | 13 + .../gcc.target/riscv/zc-zcmpe-push-pop-7.c | 16 + gcc/testsuite/gcc.target/riscv/zc-zcmt-arch.c | 9 + 40 files changed, 1153 insertions(+), 21 deletions(-) create mode 100644 gcc/config/riscv/riscv-zcmp-popret.cc create mode 100644 gcc/config/riscv/zc.md create mode 100644 gcc/testsuite/gcc.target/riscv/arch-20.c create mode 100644 gcc/testsuite/gcc.target/riscv/arch-21.c create mode 100644 gcc/testsuite/gcc.target/riscv/zc-zca-arch.c create mode 100644 gcc/testsuite/gcc.target/riscv/zc-zcb-arch.c create mode 100644 gcc/testsuite/gcc.target/riscv/zc-zcb-m-arch.c create mode 100644 gcc/testsuite/gcc.target/riscv/zc-zcb-zba-arch.c create mode 100644 gcc/testsuite/gcc.target/riscv/zc-zcb-zbb-arch.c create mode 100644 gcc/testsuite/gcc.target/riscv/zc-zcf-arch.c create mode 100644 gcc/testsuite/gcc.target/riscv/zc-zcmp-arch.c create mode 100644 gcc/testsuite/gcc.target/riscv/zc-zcmp-push-pop-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/zc-zcmp-push-pop-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/zc-zcmp-push-pop-3.c create mode 100644 gcc/testsuite/gcc.target/riscv/zc-zcmp-push-pop-4.c create mode 100644 gcc/testsuite/gcc.target/riscv/zc-zcmp-push-pop-5.c create mode 100644 gcc/testsuite/gcc.target/riscv/zc-zcmp-push-pop-6.c create mode 100644 gcc/testsuite/gcc.target/riscv/zc-zcmp-push-pop-7.c create mode 100644 gcc/testsuite/gcc.target/riscv/zc-zcmpe-arch.c create mode 100644 gcc/testsuite/gcc.target/riscv/zc-zcmpe-push-pop-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/zc-zcmpe-push-pop-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/zc-zcmpe-push-pop-3.c create mode 100644 gcc/testsuite/gcc.target/riscv/zc-zcmpe-push-pop-4.c create mode 100644 gcc/testsuite/gcc.target/riscv/zc-zcmpe-push-pop-5.c create mode 100644 gcc/testsuite/gcc.target/riscv/zc-zcmpe-push-pop-6.c create mode 100644 gcc/testsuite/gcc.target/riscv/zc-zcmpe-push-pop-7.c create mode 100644 gcc/testsuite/gcc.target/riscv/zc-zcmt-arch.c -- 2.25.1