From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from cstnet.cn (smtp80.cstnet.cn [159.226.251.80]) by sourceware.org (Postfix) with ESMTP id 858233858C1F for ; Thu, 6 Apr 2023 06:22:14 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 858233858C1F Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=iscas.ac.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=iscas.ac.cn Received: from localhost.localdomain (unknown [47.113.87.88]) by APP-01 (Coremail) with SMTP id qwCowAC3v3vrZC5keSobAA--.1590S7; Thu, 06 Apr 2023 14:21:39 +0800 (CST) From: Jiawei To: gcc-patches@gcc.gnu.org Cc: kito.cheng@sifive.com, palmer@dabbelt.com, christoph.muellner@vrull.eu, jeremy.bennett@embecosm.com, mary.bennett@embecosm.com, nandni.jamnadas@embecosm.com, charlie.keaney@embecosm.com, simon.cook@embecosm.com, tariq.kurd@codasip.com, ibrahim.abu.kharmeh1@huawei.com, sinan.lin@linux.alibaba.com, wuwei2016@iscas.ac.cn, shihua@iscas.ac.cn, shiyulong@iscas.ac.cn, chenyixuan@iscas.ac.cn, Jiawei Subject: [PATCH 5/5] RISC-V: Add ZCMP push/pop testcases. Date: Thu, 6 Apr 2023 14:21:18 +0800 Message-Id: <20230406062118.47431-6-jiawei@iscas.ac.cn> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230406062118.47431-1-jiawei@iscas.ac.cn> References: <20230406062118.47431-1-jiawei@iscas.ac.cn> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CM-TRANSID:qwCowAC3v3vrZC5keSobAA--.1590S7 X-Coremail-Antispam: 1UD129KBjvAXoW3tr13WrWfGr45Kw1rCr48JFb_yoW8JF13Co WkGF4ruw4Fkr1S9r4Uu3sxAw1kua4kK3yfXFWqkFWUGF18Xw1ag3sxKw1xur1rCr1xJr1U Za95AFWUZan8Kw1rn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7v73VFW2AGmfu7bjvjm3 AaLaJ3UjIYCTnIWjp_UUUO77AC8VAFwI0_Wr0E3s1l1xkIjI8I6I8E6xAIw20EY4v20xva j40_Wr0E3s1l1IIY67AEw4v_Jr0_Jr4l82xGYIkIc2x26280x7IE14v26r126s0DM28Irc Ia0xkI8VCY1x0267AKxVW5JVCq3wA2ocxC64kIII0Yj41l84x0c7CEw4AK67xGY2AK021l 84ACjcxK6xIIjxv20xvE14v26ryj6F1UM28EF7xvwVC0I7IYx2IY6xkF7I0E14v26r4UJV WxJr1l84ACjcxK6I8E87Iv67AKxVWxJr0_GcWl84ACjcxK6I8E87Iv6xkF7I0E14v26rxl 6s0DM2AIxVAIcxkEcVAq07x20xvEncxIr21l5I8CrVACY4xI64kE6c02F40Ex7xfMcIj6x IIjxv20xvE14v26r1j6r18McIj6I8E87Iv67AKxVWUJVW8JwAm72CE4IkC6x0Yz7v_Jr0_ Gr1lF7xvr2IYc2Ij64vIr41lF7I21c0EjII2zVCS5cI20VAGYxC7M4IIrI8v6xkF7I0E8c xan2IY04v7MxkIecxEwVAFjwCF04k20xvY0x0EwIxGrwCFx2IqxVCFs4IE7xkEbVWUJVW8 JwC20s026c02F40E14v26r1j6r18MI8I3I0E7480Y4vE14v26r106r1rMI8E67AF67kF1V AFwI0_GFv_WrylIxkGc2Ij64vIr41lIxAIcVC0I7IYx2IY67AKxVWUCVW8JwCI42IY6xII jxv20xvEc7CjxVAFwI0_Gr1j6F4UJwCI42IY6xAIw20EY4v20xvaj40_Jr0_JF4lIxAIcV C2z280aVAFwI0_Jr0_Gr1lIxAIcVC2z280aVCY1x0267AKxVW8Jr0_Cr1UYxBIdaVFxhVj vjDU0xZFpf9x0JUjiiDUUUUU= X-Originating-IP: [47.113.87.88] X-CM-SenderInfo: 5mld4v3l6l2u1dvotugofq/1tbiCgYNAGQuGjj6pgAAs1 X-Spam-Status: No, score=-11.5 required=5.0 tests=BAYES_00,GIT_PATCH_0,KAM_DMARC_STATUS,KAM_SHORT,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Add Zcmp extension testcases, zcmpe means Zcmp with RVE extension. Co-Authored by: Nandni Jamnadas Co-Authored by: Yulong Shi Co-Authored by: Shihua Liao Co-Authored by: Sinan Lin gcc/testsuite/ChangeLog: * gcc.target/riscv/zc-zcmp-push-pop-1.c: New test. * gcc.target/riscv/zc-zcmp-push-pop-2.c: New test. * gcc.target/riscv/zc-zcmp-push-pop-3.c: New test. * gcc.target/riscv/zc-zcmp-push-pop-4.c: New test. * gcc.target/riscv/zc-zcmp-push-pop-5.c: New test. * gcc.target/riscv/zc-zcmp-push-pop-6.c: New test. * gcc.target/riscv/zc-zcmp-push-pop-7.c: New test. * gcc.target/riscv/zc-zcmpe-push-pop-1.c: New test. * gcc.target/riscv/zc-zcmpe-push-pop-2.c: New test. * gcc.target/riscv/zc-zcmpe-push-pop-3.c: New test. * gcc.target/riscv/zc-zcmpe-push-pop-4.c: New test. * gcc.target/riscv/zc-zcmpe-push-pop-5.c: New test. * gcc.target/riscv/zc-zcmpe-push-pop-6.c: New test. * gcc.target/riscv/zc-zcmpe-push-pop-7.c: New test. --- .../gcc.target/riscv/zc-zcmp-push-pop-1.c | 15 +++++++++++++++ .../gcc.target/riscv/zc-zcmp-push-pop-2.c | 17 +++++++++++++++++ .../gcc.target/riscv/zc-zcmp-push-pop-3.c | 17 +++++++++++++++++ .../gcc.target/riscv/zc-zcmp-push-pop-4.c | 17 +++++++++++++++++ .../gcc.target/riscv/zc-zcmp-push-pop-5.c | 17 +++++++++++++++++ .../gcc.target/riscv/zc-zcmp-push-pop-6.c | 13 +++++++++++++ .../gcc.target/riscv/zc-zcmp-push-pop-7.c | 16 ++++++++++++++++ .../gcc.target/riscv/zc-zcmpe-push-pop-1.c | 15 +++++++++++++++ .../gcc.target/riscv/zc-zcmpe-push-pop-2.c | 17 +++++++++++++++++ .../gcc.target/riscv/zc-zcmpe-push-pop-3.c | 17 +++++++++++++++++ .../gcc.target/riscv/zc-zcmpe-push-pop-4.c | 17 +++++++++++++++++ .../gcc.target/riscv/zc-zcmpe-push-pop-5.c | 17 +++++++++++++++++ .../gcc.target/riscv/zc-zcmpe-push-pop-6.c | 13 +++++++++++++ .../gcc.target/riscv/zc-zcmpe-push-pop-7.c | 16 ++++++++++++++++ 14 files changed, 224 insertions(+) create mode 100644 gcc/testsuite/gcc.target/riscv/zc-zcmp-push-pop-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/zc-zcmp-push-pop-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/zc-zcmp-push-pop-3.c create mode 100644 gcc/testsuite/gcc.target/riscv/zc-zcmp-push-pop-4.c create mode 100644 gcc/testsuite/gcc.target/riscv/zc-zcmp-push-pop-5.c create mode 100644 gcc/testsuite/gcc.target/riscv/zc-zcmp-push-pop-6.c create mode 100644 gcc/testsuite/gcc.target/riscv/zc-zcmp-push-pop-7.c create mode 100644 gcc/testsuite/gcc.target/riscv/zc-zcmpe-push-pop-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/zc-zcmpe-push-pop-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/zc-zcmpe-push-pop-3.c create mode 100644 gcc/testsuite/gcc.target/riscv/zc-zcmpe-push-pop-4.c create mode 100644 gcc/testsuite/gcc.target/riscv/zc-zcmpe-push-pop-5.c create mode 100644 gcc/testsuite/gcc.target/riscv/zc-zcmpe-push-pop-6.c create mode 100644 gcc/testsuite/gcc.target/riscv/zc-zcmpe-push-pop-7.c diff --git a/gcc/testsuite/gcc.target/riscv/zc-zcmp-push-pop-1.c b/gcc/testsuite/gcc.target/riscv/zc-zcmp-push-pop-1.c new file mode 100644 index 00000000000..58bb39438ce --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/zc-zcmp-push-pop-1.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64g_zca_zcmp -mabi=lp64d -O0" } */ + +int foo1(int a) +{ + return a; +} + +int foo2(int b) +{ + return foo1(b); +} + +/* { dg-final { scan-assembler "cm.push\t{ra,s0},-32" } } */ +/* { dg-final { scan-assembler "cm.popret\t{ra,s0},32" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/zc-zcmp-push-pop-2.c b/gcc/testsuite/gcc.target/riscv/zc-zcmp-push-pop-2.c new file mode 100644 index 00000000000..2c692d80137 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/zc-zcmp-push-pop-2.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32g_zca_zcmp -mabi=ilp32d -O2" } */ + +void foo2 (int a, int b); + +int foo1(int a, int b) +{ + if (b < a) + { + foo2(a, b); + foo1(a, b); + } + return 0; +} + +/* { dg-final { scan-assembler "cm.push\t{ra,s0-s1},-16" } } */ +/* { dg-final { scan-assembler "cm.popretz\t{ra,s0-s1},16" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/zc-zcmp-push-pop-3.c b/gcc/testsuite/gcc.target/riscv/zc-zcmp-push-pop-3.c new file mode 100644 index 00000000000..ef22ce3d0f0 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/zc-zcmp-push-pop-3.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32g_zca_zcmp -mabi=ilp32d -O2" } */ + +void foo2 (int a, int b, int c, int d); + +int foo1(int a, int b, int c, int d) +{ + if (b < a) + { + foo2(a, b, c, d); + foo1(a, b, c, d); + } + return 0; +} + +/* { dg-final { scan-assembler "cm.push\t{ra,s0-s3},-32" } } */ +/* { dg-final { scan-assembler "cm.popretz\t{ra,s0-s3},32" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/zc-zcmp-push-pop-4.c b/gcc/testsuite/gcc.target/riscv/zc-zcmp-push-pop-4.c new file mode 100644 index 00000000000..00eb200ed0b --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/zc-zcmp-push-pop-4.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32g_zca_zcmp -mabi=ilp32d -O2" } */ + +void foo2 (int a, int b, int c, int d, int e); + +int foo1(int a, int b, int c, int d, int e) +{ + if (b < a) + { + foo2(a, b, c, d, e); + foo1(a, b, c, d, e); + } + return -1; +} + +/* { dg-final { scan-assembler "cm.push\t{ra,s0-s4},-32" } } */ +/* { dg-final { scan-assembler "cm.popret\t{ra,s0-s4},32" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/zc-zcmp-push-pop-5.c b/gcc/testsuite/gcc.target/riscv/zc-zcmp-push-pop-5.c new file mode 100644 index 00000000000..0361bd9da18 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/zc-zcmp-push-pop-5.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32g_zca_zcmp -mabi=ilp32d -O2" } */ + +int foo2 (int, int); + +int foo1(int n, int k) +{ + int mat[n + 1][k + 1]; + mat[0][0] = 1; + for (int i = 1; i <= n; i++) + for (int j = 1; j <= foo2(i, k); j++) + mat[i][j] = j * mat[i - 1][j - 1]; + return mat[n][k]; +} + +/* { dg-final { scan-assembler "cm.push\t{ra,s0-s11},-80" } } */ +/* { dg-final { scan-assembler "cm.popret\t{ra,s0-s11},80" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/zc-zcmp-push-pop-6.c b/gcc/testsuite/gcc.target/riscv/zc-zcmp-push-pop-6.c new file mode 100644 index 00000000000..f90243aa20f --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/zc-zcmp-push-pop-6.c @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32g_zca_zcmp -mabi=ilp32d -O0" } */ + +#include + +void __attribute__ ((interrupt ("user"))) +foo (void) +{ + char buf[560] = {0}; + printf("%d", buf[1]); +} + +/* { dg-final { scan-assembler "cm.pop\t{ra,s0},64" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/zc-zcmp-push-pop-7.c b/gcc/testsuite/gcc.target/riscv/zc-zcmp-push-pop-7.c new file mode 100644 index 00000000000..265643407ef --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/zc-zcmp-push-pop-7.c @@ -0,0 +1,16 @@ +/* This testcase is to test whether push/pop can correctly split stack adjustment offset. */ +/* { dg-do compile } */ +/* { dg-options "-march=rv32g_zca_zcmp -mabi=ilp32d -O0" } */ + +void test (char *); + +int foo() +{ + char m[512] = {0}; + test (m); +} + +/* { dg-final { scan-assembler "cm.push\t{ra,s0},-64" } } */ +/* { dg-final { scan-assembler "addi\tsp,sp,-464" } } */ +/* { dg-final { scan-assembler "addi\tsp,sp,464" } } */ +/* { dg-final { scan-assembler "cm.popret\t{ra,s0},64" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/zc-zcmpe-push-pop-1.c b/gcc/testsuite/gcc.target/riscv/zc-zcmpe-push-pop-1.c new file mode 100644 index 00000000000..2c1a79e1852 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/zc-zcmpe-push-pop-1.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32e_zcmp -mabi=ilp32e -O0" } */ + +int foo1(int a) +{ + return a; +} + +int foo2(int b) +{ + return foo1(b); +} + +/* { dg-final { scan-assembler "cm.push\t{ra,s0},-16" } } */ +/* { dg-final { scan-assembler "cm.popret\t{ra,s0},16" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/zc-zcmpe-push-pop-2.c b/gcc/testsuite/gcc.target/riscv/zc-zcmpe-push-pop-2.c new file mode 100644 index 00000000000..2da4dd10bf2 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/zc-zcmpe-push-pop-2.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32e_zcmp -mabi=ilp32e -O0" } */ + +void foo2 (int a, int b); + +int foo1(int a, int b) +{ + if (b < a) + { + foo2(a, b); + foo1(a, b); + } + return 0; +} + +/* { dg-final { scan-assembler "cm.push\t{ra,s0},-32" } } */ +/* { dg-final { scan-assembler "cm.popret\t{ra,s0},32" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/zc-zcmpe-push-pop-3.c b/gcc/testsuite/gcc.target/riscv/zc-zcmpe-push-pop-3.c new file mode 100644 index 00000000000..85a6f7c1074 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/zc-zcmpe-push-pop-3.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32e_zcmp -mabi=ilp32e -O2" } */ + +void foo2 (int a, int b, int c, int d); + +int foo1(int a, int b, int c, int d) +{ + if (b < a) + { + foo2(a, b, c, d); + foo1(a, b, c, d); + } + return 0; +} + +/* { dg-final { scan-assembler "cm.push\t{ra,s0-s1},-32" } } */ +/* { dg-final { scan-assembler "cm.popretz\t{ra,s0-s1},32" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/zc-zcmpe-push-pop-4.c b/gcc/testsuite/gcc.target/riscv/zc-zcmpe-push-pop-4.c new file mode 100644 index 00000000000..4195322e6fb --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/zc-zcmpe-push-pop-4.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32e_zcmp -mabi=ilp32e -O2" } */ + +void foo2 (int a, int b, int c, int d, int e); + +int foo1(int a, int b, int c, int d, int e) +{ + if (b < a) + { + foo2(a, b, c, d, e); + foo1(a, b, c, d, e); + } + return -1; +} + +/* { dg-final { scan-assembler "cm.push\t{ra,s0-s1},-32" } } */ +/* { dg-final { scan-assembler "cm.popret\t{ra,s0-s1},32" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/zc-zcmpe-push-pop-5.c b/gcc/testsuite/gcc.target/riscv/zc-zcmpe-push-pop-5.c new file mode 100644 index 00000000000..b9ec12738eb --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/zc-zcmpe-push-pop-5.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32e_zcmp -mabi=ilp32e -O2" } */ + +int foo2 (int, int); + +int foo1(int n, int k) +{ + int mat[n + 1][k + 1]; + mat[0][0] = 1; + for (int i = 1; i <= n; i++) + for (int j = 1; j <= foo2(i, k); j++) + mat[i][j] = j * mat[i - 1][j - 1]; + return mat[n][k]; +} + +/* { dg-final { scan-assembler "cm.push\t{ra,s0-s1},-64" } } */ +/* { dg-final { scan-assembler "cm.popret\t{ra,s0-s1},64" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/zc-zcmpe-push-pop-6.c b/gcc/testsuite/gcc.target/riscv/zc-zcmpe-push-pop-6.c new file mode 100644 index 00000000000..67d6236bab6 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/zc-zcmpe-push-pop-6.c @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32e_zcmp -mabi=ilp32e -O0" } */ + +#include + +void __attribute__ ((interrupt ("user"))) +foo (void) +{ + char buf[560] = {0}; + printf("%d", buf[1]); +} + +/* { dg-final { scan-assembler "cm.pop\t{ra,s0},64" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/zc-zcmpe-push-pop-7.c b/gcc/testsuite/gcc.target/riscv/zc-zcmpe-push-pop-7.c new file mode 100644 index 00000000000..89fe96a29de --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/zc-zcmpe-push-pop-7.c @@ -0,0 +1,16 @@ +/* This testcase is to test whether push/pop can correctly split stack adjustment offset. */ +/* { dg-do compile } */ +/* { dg-options "-march=rv32e_zcmp -mabi=ilp32e -O0" } */ + +void test (char *); + +int foo() +{ + char m[512] = {0}; + test (m); +} + +/* { dg-final { scan-assembler "cm.push\t{ra,s0},-64" } } */ +/* { dg-final { scan-assembler "addi\tsp,sp,-460" } } */ +/* { dg-final { scan-assembler "addi\tsp,sp,460" } } */ +/* { dg-final { scan-assembler "cm.popret\t{ra,s0},64" } } */ -- 2.25.1