From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from smtpbg154.qq.com (smtpbg154.qq.com [15.184.224.54]) by sourceware.org (Postfix) with ESMTPS id 706143858D28 for ; Mon, 10 Apr 2023 03:39:47 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 706143858D28 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivai.ai Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivai.ai X-QQ-mid: bizesmtp68t1681097980t6bos2bz Received: from server1.localdomain ( [58.60.1.22]) by bizesmtp.qq.com (ESMTP) with id ; Mon, 10 Apr 2023 11:39:39 +0800 (CST) X-QQ-SSF: 01400000000000F0O000000A0000000 X-QQ-FEAT: 90EFqYDyPxA5Y0+x7Un6Xzf5FQarLLwrKa9cjgMjOcxU9GzojN8fPPRXn/S0g VU7PRk1r4SvNMQAahFNuzvN80CWqbcT6qEkYvwf8jLu40HlVJaMhm/X/BZLC9OgAYOELzxd pZcxkd+EFqem9ucVqQRooTB2OAvMYXl+soEku08fphQCbO2OMPnnZgxI42YLWx/s6u2kLTD 2+BQRPdl3+6Ryj2sQ26ffGXKMDPfTVqOMo1JUg64RV7eOpWPdSwJx9xvHTT5F0DrestFTK9 DCukqCiZdbxUYmjh3TxG32kGV7fGkXajy22N04vmudoGQyqS07qkSgKU1Uk0Vnbg1kQNNIk M1gERW9GX5iKdM0b/vAJfwf3TbSgQuOKgrO4k1Lsc4yfsSrqdIjz943sZTEuUlZNArlMOh8 X-QQ-GoodBg: 2 X-BIZMAIL-ID: 15556830963753138254 From: juzhe.zhong@rivai.ai To: gcc-patches@gcc.gnu.org Cc: kito.cheng@gmail.com, palmer@dabbelt.com, jeffreyalaw@gmail.com, Juzhe-Zhong Subject: [PATCH] RISC-V: Allow LMUL = 2 auto-vectorization for zve32* Date: Mon, 10 Apr 2023 11:39:38 +0800 Message-Id: <20230410033938.130469-1-juzhe.zhong@rivai.ai> X-Mailer: git-send-email 2.36.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:rivai.ai:qybglogicsvr:qybglogicsvr7 X-Spam-Status: No, score=-10.9 required=5.0 tests=BAYES_00,GIT_PATCH_0,KAM_DMARC_STATUS,KAM_SHORT,RCVD_IN_BARRACUDACENTRAL,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: From: Juzhe-Zhong Since VNx1SI mode is nunits = [1,1] which will create ICE in Loop vectorizer of GCC. We disabled it. The current condition allows VNx4SI which LMUL = 4. We should be able to enable VNx2SI too. This patch is to enable auto-vectorization for VNx2SImode. gcc/ChangeLog: * config/riscv/riscv-v.cc (preferred_simd_mode): Enable LMUL = 2 auto-vectorization for TARGET_MIN_VLEN < 128. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/zve32f-3.c: Adapt testcase. * gcc.target/riscv/rvv/autovec/zve32x-3.c: Ditto. --- gcc/config/riscv/riscv-v.cc | 2 +- gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32f-3.c | 4 ++-- gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32x-3.c | 4 ++-- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc index 84d33fcdd14..801a4e26b67 100644 --- a/gcc/config/riscv/riscv-v.cc +++ b/gcc/config/riscv/riscv-v.cc @@ -761,7 +761,7 @@ preferred_simd_mode (scalar_mode mode) auto-vectorization since Loop Vectorizer may use VNx1SImode or VNx1DImode to vectorize which will create ICE in the 'can_duplicate_and_interleave_p' of tree-vect-slp.cc. */ - if (TARGET_MIN_VLEN * riscv_autovec_lmul < 128) + if (TARGET_MIN_VLEN < 128 && riscv_autovec_lmul < RVV_M2) return word_mode; /* We use LMUL = 1 as base bytesize which is BYTES_PER_RISCV_VECTOR and riscv_autovec_lmul as multiply factor to calculate the the NUNITS to diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32f-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32f-3.c index 0c1aee23d25..8e68b9932b4 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32f-3.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32f-3.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gc_zve32f -mabi=ilp32d --param riscv-autovec-preference=fixed-vlmax --param riscv-autovec-lmul=m4 -O3 -ftree-vectorize -fdump-tree-vect-details -save-temps" } */ +/* { dg-options "-march=rv32gc_zve32f -mabi=ilp32d --param riscv-autovec-preference=fixed-vlmax --param riscv-autovec-lmul=m2 -O3 -ftree-vectorize -fdump-tree-vect-details -save-temps" } */ #include "template-1.h" -/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 3 "vect" } } */ +/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 4 "vect" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32x-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32x-3.c index 94593f43a62..c26c2c95afb 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32x-3.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zve32x-3.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gc_zve32x -mabi=ilp32d --param riscv-autovec-preference=fixed-vlmax --param riscv-autovec-lmul=m4 -O3 -ftree-vectorize -fdump-tree-vect-details -save-temps" } */ +/* { dg-options "-march=rv32gc_zve32x -mabi=ilp32d --param riscv-autovec-preference=fixed-vlmax --param riscv-autovec-lmul=m2 -O3 -ftree-vectorize -fdump-tree-vect-details -save-temps" } */ #include "template-1.h" -/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 2 "vect" } } */ +/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 3 "vect" } } */ -- 2.36.1