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From: Lulu Cheng <chenglulu@loongson.cn>
To: gcc-patches@gcc.gnu.org
Cc: xry111@xry111.site, i@xen0n.name, xuchenghua@loongson.cn,
	Lulu Cheng <chenglulu@loongson.cn>
Subject: [PATCH] LoongArch: Remove the definition of the macro LOGICAL_OP_NON_SHORT_CIRCUIT under the architecture and use the default definition instead.
Date: Thu, 13 Apr 2023 19:51:26 +0800	[thread overview]
Message-ID: <20230413115126.1568212-1-chenglulu@loongson.cn> (raw)

In some cases, setting this macro as the default can reduce the number of conditional
branch instructions.

gcc/ChangeLog:

	* config/loongarch/loongarch.h (LOGICAL_OP_NON_SHORT_CIRCUIT): Remove the macro
	definition.
---
 gcc/config/loongarch/loongarch.h | 1 -
 1 file changed, 1 deletion(-)

diff --git a/gcc/config/loongarch/loongarch.h b/gcc/config/loongarch/loongarch.h
index f8167875646..6b7dbecd3ff 100644
--- a/gcc/config/loongarch/loongarch.h
+++ b/gcc/config/loongarch/loongarch.h
@@ -836,7 +836,6 @@ typedef struct {
    1 is the default; other values are interpreted relative to that.  */
 
 #define BRANCH_COST(speed_p, predictable_p) loongarch_branch_cost
-#define LOGICAL_OP_NON_SHORT_CIRCUIT 0
 
 /* Return the asm template for a conditional branch instruction.
    OPCODE is the opcode's mnemonic and OPERANDS is the asm template for
-- 
2.31.1


             reply	other threads:[~2023-04-13 11:51 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-13 11:51 Lulu Cheng [this message]
2023-04-13 12:24 ` Xi Ruoyao
2023-04-13 12:30   ` Lulu Cheng
2023-04-18  1:54   ` [pushed][PATCH] " Lulu Cheng
2023-04-18  6:35     ` Xi Ruoyao

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