From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pl1-x643.google.com (mail-pl1-x643.google.com [IPv6:2607:f8b0:4864:20::643]) by sourceware.org (Postfix) with ESMTPS id 77C3B385841D for ; Fri, 14 Apr 2023 17:10:42 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 77C3B385841D Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivosinc.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivosinc.com Received: by mail-pl1-x643.google.com with SMTP id d9443c01a7336-1a52667955dso13687865ad.1 for ; Fri, 14 Apr 2023 10:10:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20221208.gappssmtp.com; s=20221208; t=1681492241; x=1684084241; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=OItWp65yCXDJ09I19Rv1ug1uLEuiDUCJCQkcX1GVSrI=; b=BmLu7hur2bPkkuB/hBQKxYkPn1UxyYTqoyyoWEiDlwcQP3t2yHThL0AWQQZH45PWjB eQBfdjuNtyFMUVq4aBFLcrxduykqFUoXiqbeBsLKClQ0o9B80unLFi547+pIvOAhTOai 2KHp+FdSNhzWsKywgdwZ32Xtgq47i/91vV9M4RHBq2BpANIN4y5owv6MNLoIHxqKccT1 z1kjowfg0hcvt8NBzSqVwuTqpXMXK6N1INvciZemir3nwXF/aEWNreiDjXNToMAzqmYY CXIm3xfa4hIgSoRVmDqenkHMa6bNqTwgyoO5bGRx/s84BpBTXPoQZ8q5yZ/inNEdwzYL DFow== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1681492241; x=1684084241; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=OItWp65yCXDJ09I19Rv1ug1uLEuiDUCJCQkcX1GVSrI=; b=UvTyYom5my/pK22cI5Yzw9b+pxhcy3ERxckLAogsCoR01BLR1VgaP/VEhLlMv4NFOi 34Aw0FJuS2Vr2Alk7mqWDQ5RkzQ1c7ZN4BI5FFn1NNV8z5e+qzfkmcaUPTpaIMJ6W4w9 iPyL/LIvSDNyyrv9nYYqsC/VjxgTTxMfKuPVGxHGm6YwOl32bVQs3P4FmWh8XHkpUE9P NqzhCoglH8qW/sgAHTTbEBgCASUnK9Dj+5tRjlhrofgzdfIVsyGqifrb99NKCnc5KPwv hlqqYc+/oYbGl8AtyYEcmyA5oWfzc2NIoXZj9ghRMBnjoDtDKuBOuCLZrqrcAx9c+08P TvGA== X-Gm-Message-State: AAQBX9cDybxteq2aJX8gytvO7fV09qbBqcLVN2wJt36dDte/JbDBdKOi TGPBjumHsiNKxmqkjAkd7QiKKNn8usscWV+S+L+jhnAhp7k= X-Google-Smtp-Source: AKy350aTb9ppEX7isLyp50PlJH29tFuXEmKfBhwdrYQvB9PEiU2Qepf96KDvpA8sW++ax9ZqfZFAYA== X-Received: by 2002:a05:6a00:2341:b0:633:88de:7272 with SMTP id j1-20020a056a00234100b0063388de7272mr9328884pfj.2.1681492241360; Fri, 14 Apr 2023 10:10:41 -0700 (PDT) Received: from patrick-ThinkPad-X1-Carbon-Gen-8.hq.rivosinc.com ([50.221.140.188]) by smtp.gmail.com with ESMTPSA id 12-20020aa7924c000000b006258dd63a3fsm3271902pfp.56.2023.04.14.10.10.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 14 Apr 2023 10:10:39 -0700 (PDT) From: Patrick O'Neill To: gcc-patches@gcc.gnu.org Cc: palmer@rivosinc.com, gnu-toolchain@rivosinc.com, vineetg@rivosinc.com, andrew@sifive.com, kito.cheng@sifive.com, dlustig@nvidia.com, cmuellner@gcc.gnu.org, andrea@rivosinc.com, hboehm@google.com, jeffreyalaw@gmail.com, Patrick O'Neill Subject: [PATCH v4 02/10] RISCV: Enforce Libatomic LR/SC SEQ_CST Date: Fri, 14 Apr 2023 10:09:34 -0700 Message-Id: <20230414170942.1695672-3-patrick@rivosinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230414170942.1695672-1-patrick@rivosinc.com> References: <20230410182348.2168356-1-patrick@rivosinc.com> <20230414170942.1695672-1-patrick@rivosinc.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-12.4 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,GIT_PATCH_0,KAM_SHORT,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Replace LR.aq/SC.rl pairs with the SEQ_CST LR.aqrl/SC.rl pairs recommended by table A.6 of the ISA manual. 2023-04-14 Patrick O'Neill * atomic.c: Change LR.aq/SC.rl pairs into sequentially consistent LR.aqrl/SC.rl pair. Signed-off-by: Patrick O'Neill --- libgcc/config/riscv/atomic.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/libgcc/config/riscv/atomic.c b/libgcc/config/riscv/atomic.c index 69f53623509..5f895939b0b 100644 --- a/libgcc/config/riscv/atomic.c +++ b/libgcc/config/riscv/atomic.c @@ -39,7 +39,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see unsigned old, tmp1, tmp2; \ \ asm volatile ("1:\n\t" \ - "lr.w.aq %[old], %[mem]\n\t" \ + "lr.w.aqrl %[old], %[mem]\n\t" \ #insn " %[tmp1], %[old], %[value]\n\t" \ invert \ "and %[tmp1], %[tmp1], %[mask]\n\t" \ @@ -73,7 +73,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see unsigned old, tmp1; \ \ asm volatile ("1:\n\t" \ - "lr.w.aq %[old], %[mem]\n\t" \ + "lr.w.aqrl %[old], %[mem]\n\t" \ "and %[tmp1], %[old], %[mask]\n\t" \ "bne %[tmp1], %[o], 1f\n\t" \ "and %[tmp1], %[old], %[not_mask]\n\t" \ -- 2.25.1