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From: pan2.li@intel.com
To: gcc-patches@gcc.gnu.org
Cc: juzhe.zhong@rivai.ai, kito.cheng@sifive.com,
	yanzhang.wang@intel.com, Pan Li <pan2.li@intel.com>
Subject: [PATCH] RISC-V: Add required tls to read thread pointer test
Date: Thu, 27 Apr 2023 11:31:42 +0800	[thread overview]
Message-ID: <20230427033142.949564-1-pan2.li@intel.com> (raw)

From: Pan Li <pan2.li@intel.com>

The read-thread-pointer test may require the gcc configured
with --enable-tls. If no, there x4 (aka tp) register will not
be presented in the assembly code.

This patch requires the tls for the dg checking. It will perform
the test checking if --enable-tls and mark the test as unsupported
if --disable-tls.

Configured with --enable-tls:
=== gcc Summary ===
of expected passes            16

Configured with --disable-tls:
=== gcc Summary ===
of unsupported tests          8

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/read-thread-pointer.c: Add required tls.

Signed-off-by: Pan Li <pan2.li@intel.com>
---
 gcc/testsuite/gcc.target/riscv/read-thread-pointer.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/gcc/testsuite/gcc.target/riscv/read-thread-pointer.c b/gcc/testsuite/gcc.target/riscv/read-thread-pointer.c
index 401fb421129..5f460b5f746 100644
--- a/gcc/testsuite/gcc.target/riscv/read-thread-pointer.c
+++ b/gcc/testsuite/gcc.target/riscv/read-thread-pointer.c
@@ -1,4 +1,5 @@
 /* { dg-do compile } */
+/* { dg-require-effective-target tls_native } */
 
 void *get_tp()
 {
-- 
2.34.1


             reply	other threads:[~2023-04-27  3:31 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-27  3:31 pan2.li [this message]
2023-04-27 15:30 ` Kito Cheng

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