From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pg1-x52e.google.com (mail-pg1-x52e.google.com [IPv6:2607:f8b0:4864:20::52e]) by sourceware.org (Postfix) with ESMTPS id 027C43857728 for ; Thu, 27 Apr 2023 16:24:10 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 027C43857728 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivosinc.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivosinc.com Received: by mail-pg1-x52e.google.com with SMTP id 41be03b00d2f7-517ab9a4a13so8167761a12.1 for ; Thu, 27 Apr 2023 09:24:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20221208.gappssmtp.com; s=20221208; t=1682612650; x=1685204650; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=G239EA0F/PLLaVNRGhSgIeEGhxMg2tCyU8zisrm5awg=; b=j5+iQDjV9MQ5u/Z5q6gWJ/gFnm7qAUF6GDTQ3fYfviWqcWdiG3Gx3Aa2zn1POvCF0u YSB7O0aUbOD1mh78CN/On8n/13zZ+MniwGHSegkcVQd7g3xZDTrHeOUYWYdM7ry+oYyZ i2SY5Y9+KI4C8io8wV5N1gxwG2HSlUIzenY5RgN0MqS6UdTcaGn+JgXNpP5J11Y7TXh2 kKrRYpNtemkjzFPKwn1dV9T3sGqHNOs3jkjTpZSmeEO7SnhNSWkb3mvpj/F9ZdcKmlbn z0SY0YqVtaendExmIjig7kWcyePRIc4birCgT7VxJe6CGrvTQ3qhUgWM2EGW37dtKiqq npzg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1682612650; x=1685204650; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=G239EA0F/PLLaVNRGhSgIeEGhxMg2tCyU8zisrm5awg=; b=TgJEaAdAdzVljib4siCMFWtwafWXeNQyCt72tclb8O/JANhKXLiX31nXoQQ4da555N Jaq+zBlboTCSQ5s5kOLkwYS53E1pHqNMggejpPk1efWK2S/Zf+zeSt9OuWXsBTCfDmUo B3vH0G3YjFG6wgIXFfXlbeItA5I0ZwVs4D9IBii2QygE3oBNJ6t7DommbQ09RKSstzhd ywrdOWLkf6lx3rLk/0llHt4l3K5xi/z6CY0EF9ZDTbqRFCK9JjkRmMdUkTjzBXzj4fnQ QLug1jJpZORSXJU0I6jtoKybz/lI8Ipz30/8h5StO7fCT1C8qVyu/MQfEzA0BPTKri3X vTTg== X-Gm-Message-State: AC+VfDxKTYgRDE7qdkHDPrWt2Kk6D7n6u7vCp5dq9J4oEa1Z33uOrqU2 lEiMz0jln2stHXv9fy+dMJPMAntDMTHi/opX6OShO7iJ X-Google-Smtp-Source: ACHHUZ6N2fmwMUYzc+CYj2uKEqinXZ1pxTZOb742wjVRoXshlgr3D04b5y09wWxqohAvGj0xwmNEJQ== X-Received: by 2002:a17:903:32cb:b0:1a1:f5dd:2dce with SMTP id i11-20020a17090332cb00b001a1f5dd2dcemr2400373plr.6.1682612649790; Thu, 27 Apr 2023 09:24:09 -0700 (PDT) Received: from patrick-ThinkPad-X1-Carbon-Gen-8.hq.rivosinc.com ([50.221.140.188]) by smtp.gmail.com with ESMTPSA id n19-20020a170902969300b001a6db2bef16sm11815906plp.303.2023.04.27.09.24.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Apr 2023 09:24:09 -0700 (PDT) From: Patrick O'Neill To: gcc-patches@gcc.gnu.org Cc: palmer@rivosinc.com, gnu-toolchain@rivosinc.com, vineetg@rivosinc.com, andrew@sifive.com, kito.cheng@sifive.com, dlustig@nvidia.com, cmuellner@gcc.gnu.org, andrea@rivosinc.com, hboehm@google.com, jeffreyalaw@gmail.com, Patrick O'Neill Subject: [PATCH v5 01/11] RISC-V: Eliminate SYNC memory models Date: Thu, 27 Apr 2023 09:22:51 -0700 Message-Id: <20230427162301.1151333-2-patrick@rivosinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230427162301.1151333-1-patrick@rivosinc.com> References: <20230414170942.1695672-1-patrick@rivosinc.com> <20230427162301.1151333-1-patrick@rivosinc.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-13.5 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,GIT_PATCH_0,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Remove references to MEMMODEL_SYNC_* models by converting via memmodel_base(). 2023-04-27 Patrick O'Neill gcc/ChangeLog: * config/riscv/riscv.cc: Remove MEMMODEL_SYNC_* cases and sanitize memmodel input with memmodel_base. Signed-off-by: Patrick O'Neill --- gcc/config/riscv/riscv.cc | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc index 1529855a2b4..02eb5125ac1 100644 --- a/gcc/config/riscv/riscv.cc +++ b/gcc/config/riscv/riscv.cc @@ -4299,14 +4299,11 @@ riscv_memmodel_needs_amo_acquire (enum memmodel model) { case MEMMODEL_ACQ_REL: case MEMMODEL_SEQ_CST: - case MEMMODEL_SYNC_SEQ_CST: case MEMMODEL_ACQUIRE: case MEMMODEL_CONSUME: - case MEMMODEL_SYNC_ACQUIRE: return true; case MEMMODEL_RELEASE: - case MEMMODEL_SYNC_RELEASE: case MEMMODEL_RELAXED: return false; @@ -4325,14 +4322,11 @@ riscv_memmodel_needs_release_fence (enum memmodel model) { case MEMMODEL_ACQ_REL: case MEMMODEL_SEQ_CST: - case MEMMODEL_SYNC_SEQ_CST: case MEMMODEL_RELEASE: - case MEMMODEL_SYNC_RELEASE: return true; case MEMMODEL_ACQUIRE: case MEMMODEL_CONSUME: - case MEMMODEL_SYNC_ACQUIRE: case MEMMODEL_RELAXED: return false; @@ -4371,6 +4365,7 @@ riscv_print_operand (FILE *file, rtx op, int letter) } machine_mode mode = GET_MODE (op); enum rtx_code code = GET_CODE (op); + const enum memmodel model = memmodel_base (INTVAL (op)); switch (letter) { @@ -4508,12 +4503,12 @@ riscv_print_operand (FILE *file, rtx op, int letter) break; case 'A': - if (riscv_memmodel_needs_amo_acquire ((enum memmodel) INTVAL (op))) + if (riscv_memmodel_needs_amo_acquire (model)) fputs (".aq", file); break; case 'F': - if (riscv_memmodel_needs_release_fence ((enum memmodel) INTVAL (op))) + if (riscv_memmodel_needs_release_fence (model)) fputs ("fence iorw,ow; ", file); break; -- 2.34.1