From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pl1-x641.google.com (mail-pl1-x641.google.com [IPv6:2607:f8b0:4864:20::641]) by sourceware.org (Postfix) with ESMTPS id C91793856960 for ; Thu, 27 Apr 2023 16:24:13 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org C91793856960 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivosinc.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivosinc.com Received: by mail-pl1-x641.google.com with SMTP id d9443c01a7336-1a9253d4551so67842665ad.0 for ; Thu, 27 Apr 2023 09:24:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20221208.gappssmtp.com; s=20221208; t=1682612652; x=1685204652; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=i9Bs2zCAlDDlyeMB7GO35vaNTrSB4ULe6R2VR6cHvtY=; b=gV5+XA8zVvlyo0eooWxpH5sla2qhVtfnYuQpsJVqa30KkC5zZ4/wtsm+qs3BfgA5NO 8j5hF6fXknxGFhLfkc5zXUTP3/GltcEbPdr8zHYSrmtYqtiSPmeN0B4Uuchc/NsoOopl KLHOzY2n09wrOCxcM5K2lPZM8eyDdRTBu4H5vaDHKS28wXLIvbYYqrrOmKG30wtWLcC8 P1JpegH60Tahp/Q1lOOp1P7f27kA9KL0uYsBHx/cmYwjSoRmszt2wX7I1aAh9nOs9nWr bABCWEAI6iqFzwG7ZDv8VK8+T3DMOLlsfVPr6xC9eJXV+iz93qFyEs9l7Ij3r7OhQf+F ZpOg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1682612652; x=1685204652; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=i9Bs2zCAlDDlyeMB7GO35vaNTrSB4ULe6R2VR6cHvtY=; b=kTMayFrFy4YVNrOYq7RML5fI+a384cy3paVRVsMzsKHtqd/2Jc2dh9zBfjx367BboF Qm6kZwfkQWziGkUS8OXYEUHrr29X2DfRC5jDtmYiDuxcMiTFQm1g47h6cFOko96mYG0A l6+5O9BVIRK+PNo/wNpFamxbEuCQtoHaSuwKn8MTMIRhOJFDBrnp/J9SqS+IAO60eyU1 ERTzx3pn44ZsI4hu8CtFmEpJejjgnGkBvMdlabPBqp5VdcIQTI2qC/y1Hgi73Wh5hgnN o6UgDdvRInPt1nigGdggVU7gEm79avkq8J/YWmjq1E1UzLMm3rdaiwOztqQOSFFO7pvN BHzQ== X-Gm-Message-State: AC+VfDxOmhZ/vVgQFm5YsgIW+QCHxCiItkl9OQBUUFjhmBlRF+suVgkb Nb2CyJn+qdT2awmpp6Ce0Bynl5jEJMl3gneACNc8xY0zp6Y= X-Google-Smtp-Source: ACHHUZ7qRIECJh8r9VrXqK7vL2iF3QnAOGJOZB53g9SuBDSohRE/ftOmGsxdevvwca1c7Nkjj/M0LQ== X-Received: by 2002:a17:902:ef91:b0:1a6:ed6f:d6b5 with SMTP id iz17-20020a170902ef9100b001a6ed6fd6b5mr2213273plb.38.1682612652773; Thu, 27 Apr 2023 09:24:12 -0700 (PDT) Received: from patrick-ThinkPad-X1-Carbon-Gen-8.hq.rivosinc.com ([50.221.140.188]) by smtp.gmail.com with ESMTPSA id n19-20020a170902969300b001a6db2bef16sm11815906plp.303.2023.04.27.09.24.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Apr 2023 09:24:12 -0700 (PDT) From: Patrick O'Neill To: gcc-patches@gcc.gnu.org Cc: palmer@rivosinc.com, gnu-toolchain@rivosinc.com, vineetg@rivosinc.com, andrew@sifive.com, kito.cheng@sifive.com, dlustig@nvidia.com, cmuellner@gcc.gnu.org, andrea@rivosinc.com, hboehm@google.com, jeffreyalaw@gmail.com, Patrick O'Neill Subject: [PATCH v5 03/11] RISC-V: Enforce subword atomic LR/SC SEQ_CST Date: Thu, 27 Apr 2023 09:22:53 -0700 Message-Id: <20230427162301.1151333-4-patrick@rivosinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230427162301.1151333-1-patrick@rivosinc.com> References: <20230414170942.1695672-1-patrick@rivosinc.com> <20230427162301.1151333-1-patrick@rivosinc.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-13.5 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,GIT_PATCH_0,KAM_SHORT,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Replace LR.aq/SC.rl pairs with the SEQ_CST LR.aqrl/SC.rl pairs recommended by table A.6 of the ISA manual. 2023-04-27 Patrick O'Neill gcc/ChangeLog: * config/riscv/sync.md: Change LR.aq/SC.rl pairs into sequentially consistent LR.aqrl/SC.rl pairs. Signed-off-by: Patrick O'Neill --- v5 Changelog: * Add this patch to address the added inline subword atomic sequences. --- gcc/config/riscv/sync.md | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/gcc/config/riscv/sync.md b/gcc/config/riscv/sync.md index 19274528262..0c83ef04607 100644 --- a/gcc/config/riscv/sync.md +++ b/gcc/config/riscv/sync.md @@ -109,7 +109,7 @@ "TARGET_ATOMIC && TARGET_INLINE_SUBWORD_ATOMIC" { return "1:\;" - "lr.w.aq\t%0, %1\;" + "lr.w.aqrl\t%0, %1\;" "\t%5, %0, %2\;" "and\t%5, %5, %3\;" "and\t%6, %0, %4\;" @@ -173,7 +173,7 @@ "TARGET_ATOMIC && TARGET_INLINE_SUBWORD_ATOMIC" { return "1:\;" - "lr.w.aq\t%0, %1\;" + "lr.w.aqrl\t%0, %1\;" "and\t%5, %0, %2\;" "not\t%5, %5\;" "and\t%5, %5, %3\;" @@ -278,7 +278,7 @@ "TARGET_ATOMIC && TARGET_INLINE_SUBWORD_ATOMIC" { return "1:\;" - "lr.w.aq\t%0, %1\;" + "lr.w.aqrl\t%0, %1\;" "and\t%4, %0, %3\;" "or\t%4, %4, %2\;" "sc.w.rl\t%4, %4, %1\;" @@ -443,7 +443,7 @@ "TARGET_ATOMIC && TARGET_INLINE_SUBWORD_ATOMIC" { return "1:\;" - "lr.w.aq\t%0, %1\;" + "lr.w.aqrl\t%0, %1\;" "and\t%6, %0, %4\;" "bne\t%6, %z2, 1f\;" "and\t%6, %0, %5\;" -- 2.34.1