From: Richard Biener <rguenther@suse.de>
To: gcc-patches@gcc.gnu.org
Subject: [PATCH] [i386] Fix testcases for emulated scatter
Date: Tue, 2 May 2023 09:55:17 +0000 (UTC) [thread overview]
Message-ID: <20230502095517.5EfycbLSlKUsCY2M9u-EhGsQ8pJNblu2QuGKFvUxGBM@z> (raw)
The following adjusts testcases where the pr88531 fail with -m32
because we do not consider MMX size vectorization there and the
pr89618 runs into load/store cost differences with -m32.
Tested on x86_64-unknown-linux-gnu, pushed.
* gcc.target/i386/pr88531-2a.c: Skip scanning for ia32.
* gcc.target/i386/pr88531-2b.c: Likewise.
* gcc.target/i386/pr88531-2c.c: Likewise.
* gcc.target/i386/pr89618-2.c: Likewise. Disable AVX512.
---
gcc/testsuite/gcc.target/i386/pr88531-2a.c | 3 ++-
gcc/testsuite/gcc.target/i386/pr88531-2b.c | 3 ++-
gcc/testsuite/gcc.target/i386/pr88531-2c.c | 3 ++-
gcc/testsuite/gcc.target/i386/pr89618-2.c | 4 ++--
4 files changed, 8 insertions(+), 5 deletions(-)
diff --git a/gcc/testsuite/gcc.target/i386/pr88531-2a.c b/gcc/testsuite/gcc.target/i386/pr88531-2a.c
index 8ab2b1385eb..d35855a25e1 100644
--- a/gcc/testsuite/gcc.target/i386/pr88531-2a.c
+++ b/gcc/testsuite/gcc.target/i386/pr88531-2a.c
@@ -16,4 +16,5 @@ void loop(float * const __restrict__ dst,
dst[i] = 42.0 * src[idx[i]];
}
-/* { dg-final { scan-assembler-times "mulps" 1 } } */
+/* For ia32 we do not consider V2SFmode vectorization. */
+/* { dg-final { scan-assembler-times "mulps" 1 { target { ! ia32 } } } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr88531-2b.c b/gcc/testsuite/gcc.target/i386/pr88531-2b.c
index cdefff2ce8e..ef005a8b690 100644
--- a/gcc/testsuite/gcc.target/i386/pr88531-2b.c
+++ b/gcc/testsuite/gcc.target/i386/pr88531-2b.c
@@ -3,4 +3,5 @@
#include "pr88531-2a.c"
-/* { dg-final { scan-assembler-times "vmulps" 1 } } */
+/* For ia32 we do not consider V2SFmode vectorization. */
+/* { dg-final { scan-assembler-times "vmulps" 1 { target { ! ia32 } } } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr88531-2c.c b/gcc/testsuite/gcc.target/i386/pr88531-2c.c
index 17b24c0dacc..bb0eaa09826 100644
--- a/gcc/testsuite/gcc.target/i386/pr88531-2c.c
+++ b/gcc/testsuite/gcc.target/i386/pr88531-2c.c
@@ -3,4 +3,5 @@
#include "pr88531-2a.c"
-/* { dg-final { scan-assembler-times "vmulps" 1 } } */
+/* For ia32 we do not consider V2SFmode vectorization. */
+/* { dg-final { scan-assembler-times "vmulps" 1 { target { ! ia32 } } } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr89618-2.c b/gcc/testsuite/gcc.target/i386/pr89618-2.c
index 0b7dcfd8806..c414053b8ec 100644
--- a/gcc/testsuite/gcc.target/i386/pr89618-2.c
+++ b/gcc/testsuite/gcc.target/i386/pr89618-2.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O3 -mavx2 -fdump-tree-vect-details" } */
+/* { dg-options "-O3 -mavx2 -mno-avx512f -fdump-tree-vect-details" } */
void foo (int n, int *off, double *a)
{
@@ -20,4 +20,4 @@ void foo (int n, int *off, double *a)
/* Make sure the cost model selects SSE vectors rather than AVX to avoid
too many scalar ops for the address computes in the loop. */
-/* { dg-final { scan-tree-dump "loop vectorized using 16 byte vectors" "vect" } } */
+/* { dg-final { scan-tree-dump "loop vectorized using 16 byte vectors" "vect" { target { ! ia32 } } } } */
--
2.35.3
reply other threads:[~2023-05-02 9:55 UTC|newest]
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