From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by sourceware.org (Postfix) with ESMTPS id 951DA3858D28 for ; Thu, 4 May 2023 03:27:38 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 951DA3858D28 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=intel.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1683170858; x=1714706858; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=GmAfWfkRKKrqVO738jwBejkLLt3UZiJTgTuupszrjQg=; b=BEw0/f22NxrYXb8Qcl95sJeT04KY8bIByb3C45hFszBI8GYbVoC4j0yI 0nl+udb2oLbsNrPWHdi8VLMRVLQql2fSDZfjaoRait2/MVEF3+j22MHU2 vrzUeBNXt3RiCv4E3DS2ek+j0KAYRTuzFd8H0KAx8O1giGaRKdZDV/I3G sIql8/SPDAipRq4eYeRfPZiR26/f0D1NBrlablQQlraTK7SlpgkTNG5rL UkMRf/nICEpavD6NEXLD8plakkyPKIBS1jS2ZcgYQo5mLmUpZUBQONddX xlltxP6iN084NgXpZIc3RgHS16VWqZ+DyxyoFOpqhxRDwa6Nm0Ka2TEUs Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10699"; a="348867979" X-IronPort-AV: E=Sophos;i="5.99,249,1677571200"; d="scan'208";a="348867979" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 May 2023 20:27:37 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10699"; a="1026768683" X-IronPort-AV: E=Sophos;i="5.99,249,1677571200"; d="scan'208";a="1026768683" Received: from shvmail03.sh.intel.com ([10.239.245.20]) by fmsmga005.fm.intel.com with ESMTP; 03 May 2023 20:27:35 -0700 Received: from shliclel4217.sh.intel.com (shliclel4217.sh.intel.com [10.239.240.127]) by shvmail03.sh.intel.com (Postfix) with ESMTP id 3FB7410056FA; Thu, 4 May 2023 11:27:35 +0800 (CST) From: liuhongt To: gcc-patches@gcc.gnu.org Cc: jeffreyalaw@gmail.com Subject: [PATCH v2] Canonicalize vec_merge when mask is constant. Date: Thu, 4 May 2023 11:25:35 +0800 Message-Id: <20230504032535.1368877-1-hongtao.liu@intel.com> X-Mailer: git-send-email 2.39.1.388.g2fc9e9ca3c In-Reply-To: <1995c643-47bb-6376-ce72-d5440e59196b@gmail.com> References: <1995c643-47bb-6376-ce72-d5440e59196b@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,GIT_PATCH_0,SPF_HELO_NONE,SPF_NONE,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Here's update patch with documents in md.texi. Ok for trunk? -------------- Use swap_communattive_operands_p for canonicalization. When both value has same operand precedence value, then first bit in the mask should select first operand. The canonicalization should help backends for pattern match. .i.e. x86 backend has lots of vec_merge patterns, combine will create any form of vec_merge(mask, or inverted mask), then backend need to add 2 patterns to match exact 1 instruction. The canonicalization can simplify 2 patterns to 1. gcc/ChangeLog: * combine.cc (maybe_swap_commutative_operands): Canonicalize vec_merge when mask is constant. * doc/md.texi: Document vec_merge canonicalization. --- gcc/combine.cc | 22 ++++++++++++++++++++++ gcc/doc/md.texi | 7 +++++++ 2 files changed, 29 insertions(+) diff --git a/gcc/combine.cc b/gcc/combine.cc index 0106092e456..5aa0ec5c45a 100644 --- a/gcc/combine.cc +++ b/gcc/combine.cc @@ -5631,6 +5631,28 @@ maybe_swap_commutative_operands (rtx x) SUBST (XEXP (x, 0), XEXP (x, 1)); SUBST (XEXP (x, 1), temp); } + + unsigned n_elts = 0; + if (GET_CODE (x) == VEC_MERGE + && CONST_INT_P (XEXP (x, 2)) + && GET_MODE_NUNITS (GET_MODE (x)).is_constant (&n_elts) + && (swap_commutative_operands_p (XEXP (x, 0), XEXP (x, 1)) + /* Two operands have same precedence, then + first bit of mask select first operand. */ + || (!swap_commutative_operands_p (XEXP (x, 1), XEXP (x, 0)) + && !(UINTVAL (XEXP (x, 2)) & 1)))) + { + rtx temp = XEXP (x, 0); + unsigned HOST_WIDE_INT sel = UINTVAL (XEXP (x, 2)); + unsigned HOST_WIDE_INT mask = HOST_WIDE_INT_1U; + if (n_elts == HOST_BITS_PER_WIDE_INT) + mask = -1; + else + mask = (HOST_WIDE_INT_1U << n_elts) - 1; + SUBST (XEXP (x, 0), XEXP (x, 1)); + SUBST (XEXP (x, 1), temp); + SUBST (XEXP (x, 2), GEN_INT (~sel & mask)); + } } /* Simplify X, a piece of RTL. We just operate on the expression at the diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi index 07bf8bdebff..aff9b7348ce 100644 --- a/gcc/doc/md.texi +++ b/gcc/doc/md.texi @@ -8215,6 +8215,13 @@ second operand. If a machine only supports a constant as the second operand, only patterns that match a constant in the second operand need be supplied. +@cindex @code{vec_merge}, canonicalization of +@item +For the @code{vec_merge} with constant mask(the third operand), the first +and the second operand can be exchanged by inverting the mask. In such cases, +a constant is always made the second operand, otherwise the least significant +bit of the mask is always set(select the first operand first). + @item For associative operators, a sequence of operators will always chain to the left; for instance, only the left operand of an integer @code{plus} -- 2.39.1.388.g2fc9e9ca3c