From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from EUR04-HE1-obe.outbound.protection.outlook.com (mail-he1eur04on2059.outbound.protection.outlook.com [40.107.7.59]) by sourceware.org (Postfix) with ESMTPS id 637EB3854160 for ; Fri, 5 May 2023 16:49:54 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 637EB3854160 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=arm.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector2-armh-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=CdFUzhbF8cC3r2dDj2k8dodI4LommZZqWClEJBc1UQM=; b=+HDLc33ZY2ma15Ebga2BtNdHaylYgBkqE9SUFFsRLWJBefKSwLMFlFQhbO/P97+jDSLnEPTpyjxCv8uuClopmfUGzIbcwXWTJsJVnHuhktxgBufW2Zm1mJgrgYjgXX7JuIc4bTb2VILYH6FkhVNFGwRgyjD5OW+cnQewGb5XrGA= Received: from AM5PR0201CA0012.eurprd02.prod.outlook.com (2603:10a6:203:3d::22) by PAWPR08MB9565.eurprd08.prod.outlook.com (2603:10a6:102:2f1::10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6363.27; Fri, 5 May 2023 16:49:43 +0000 Received: from AM7EUR03FT065.eop-EUR03.prod.protection.outlook.com (2603:10a6:203:3d:cafe::3e) by AM5PR0201CA0012.outlook.office365.com (2603:10a6:203:3d::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6363.27 via Frontend Transport; Fri, 5 May 2023 16:49:43 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 63.35.35.123) smtp.mailfrom=arm.com; dkim=pass (signature was verified) header.d=armh.onmicrosoft.com;dmarc=pass action=none header.from=arm.com; Received-SPF: Pass (protection.outlook.com: domain of arm.com designates 63.35.35.123 as permitted sender) receiver=protection.outlook.com; client-ip=63.35.35.123; helo=64aa7808-outbound-1.mta.getcheckrecipient.com; pr=C Received: from 64aa7808-outbound-1.mta.getcheckrecipient.com (63.35.35.123) by AM7EUR03FT065.mail.protection.outlook.com (100.127.140.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6363.26 via Frontend Transport; Fri, 5 May 2023 16:49:42 +0000 Received: ("Tessian outbound 3a01b65b5aad:v136"); Fri, 05 May 2023 16:49:42 +0000 X-CheckRecipientChecked: true X-CR-MTA-CID: 95b2a51e9277fa26 X-CR-MTA-TID: 64aa7808 Received: from c8066b720b80.1 by 64aa7808-outbound-1.mta.getcheckrecipient.com id C67870BD-49F7-41F1-B28C-8C42E4522F57.1; Fri, 05 May 2023 16:49:35 +0000 Received: from EUR04-DB3-obe.outbound.protection.outlook.com by 64aa7808-outbound-1.mta.getcheckrecipient.com with ESMTPS id c8066b720b80.1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384); Fri, 05 May 2023 16:49:35 +0000 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=Upz+ZZHjkpahPxPOPnB8JfMBDtu62Ow3BxiHI1ffawAjJmtkMEI/wjAk+OU/Cwj/ta6Lq/9wJIJjHSAc+KyUeeFwD9R+t4huPkrFEJttL1MSz0dANSHydDf957Npz5dOkgF6/ZX+5O5H/FOVxwWJktwv2DAvHxr1xNqFa8IBE3/B4dXgDbLOMoEeAQWkSkh/EVCZ4agr6/Y26ifCZmffIq4rmK4eA9NHYZSnQzrwJhzgBOXI6m44647h86TEZOSB+IjHsJAcWCXT9AYlkLMHy+Zj9yQO2aXzghNsVS4oWopQymJX7e3m3UC8o3uiyePCkoFK/sTtokkKlVwruz0VdA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=CdFUzhbF8cC3r2dDj2k8dodI4LommZZqWClEJBc1UQM=; b=ocgJdMHPY1zrVX+FL0jvZrTu0WrGQoDqU2jV3rVibXkyQc5l0SxfUZ6SGMwkFPMaiEqIbvFIoMzM4m8y3oFzOABKY5PKfMHOgb+teF5vVhwUkPUMmqm2JSo0veZRTMGG2j6zpi3sE/NhtE4+W0CKuGxTxv9hJHKJj9TJDurOtd5i4hkvFa32hSx8C3yAdRJrX6/oIb2qvPiVnYxEikqSFJBp4sEPK0jO7HNpoMHz1zghrMRfVPJrX2RxPMdV/8WaGcKjYyyOO2lCEjaW6asjP/hdPefzmd3CbvJaRRfe5wjUs8UOSIu6HCkhn2qRCG+pGeWJMSDasVryMX0m1XXf1g== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 40.67.248.234) smtp.rcpttodomain=gcc.gnu.org smtp.mailfrom=arm.com; dmarc=pass (p=none sp=none pct=100) action=none header.from=arm.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector2-armh-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=CdFUzhbF8cC3r2dDj2k8dodI4LommZZqWClEJBc1UQM=; b=+HDLc33ZY2ma15Ebga2BtNdHaylYgBkqE9SUFFsRLWJBefKSwLMFlFQhbO/P97+jDSLnEPTpyjxCv8uuClopmfUGzIbcwXWTJsJVnHuhktxgBufW2Zm1mJgrgYjgXX7JuIc4bTb2VILYH6FkhVNFGwRgyjD5OW+cnQewGb5XrGA= Received: from DB6PR0501CA0043.eurprd05.prod.outlook.com (2603:10a6:4:67::29) by DBBPR08MB5897.eurprd08.prod.outlook.com (2603:10a6:10:203::20) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6363.27; Fri, 5 May 2023 16:49:25 +0000 Received: from DBAEUR03FT044.eop-EUR03.prod.protection.outlook.com (2603:10a6:4:67:cafe::99) by DB6PR0501CA0043.outlook.office365.com (2603:10a6:4:67::29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6363.25 via Frontend Transport; Fri, 5 May 2023 16:49:25 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 40.67.248.234) smtp.mailfrom=arm.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=arm.com; Received-SPF: Pass (protection.outlook.com: domain of arm.com designates 40.67.248.234 as permitted sender) receiver=protection.outlook.com; client-ip=40.67.248.234; helo=nebula.arm.com; pr=C Received: from nebula.arm.com (40.67.248.234) by DBAEUR03FT044.mail.protection.outlook.com (100.127.142.189) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6363.27 via Frontend Transport; Fri, 5 May 2023 16:49:25 +0000 Received: from AZ-NEU-EX02.Emea.Arm.com (10.251.26.5) by AZ-NEU-EX04.Arm.com (10.251.24.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.23; Fri, 5 May 2023 16:49:17 +0000 Received: from AZ-NEU-EX04.Arm.com (10.251.24.32) by AZ-NEU-EX02.Emea.Arm.com (10.251.26.5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.23; Fri, 5 May 2023 16:49:17 +0000 Received: from e129018.arm.com (10.57.22.112) by mail.arm.com (10.251.24.32) with Microsoft SMTP Server id 15.1.2507.23 via Frontend Transport; Fri, 5 May 2023 16:49:16 +0000 From: Christophe Lyon To: , , , CC: Christophe Lyon Subject: [PATCH 07/10] arm: [MVE intrinsics] rework vmovnbq vmovntq vqmovnbq vqmovntq vqmovunbq vqmovuntq Date: Fri, 5 May 2023 18:49:03 +0200 Message-ID: <20230505164906.596219-7-christophe.lyon@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230505164906.596219-1-christophe.lyon@arm.com> References: <20230505164906.596219-1-christophe.lyon@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 1 X-MS-TrafficTypeDiagnostic: DBAEUR03FT044:EE_|DBBPR08MB5897:EE_|AM7EUR03FT065:EE_|PAWPR08MB9565:EE_ X-MS-Office365-Filtering-Correlation-Id: 65b9a9b9-f601-4c02-6105-08db4d88b99d x-checkrecipientrouted: true NoDisclaimer: true X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Untrusted: BCL:0; X-Microsoft-Antispam-Message-Info-Original: 3ELzDaJG6GPN6YHixKefBU7358VXio/bKdlMlPadQf65IFXFxH9b7LUax5VpQx92+mpzn0/+UkKyFs1/+NZpHn8TIIR/5szVlmR/o80JMjweD7/A9WXn4IyvypmHIE0YB5hCmJesfTzc6Q5S/Zvv7x7oWE5qc8cE7sFYNMao/c4MUHcM+xK5EgdSnR2YZczmTGzlU+S6iC4kMjkXBiEmm2+FugChuBCEx/nKg7VeV6Ei4LkXZ34AoPCzCFle9ytvpSNGBIj1LIemvmN+ItVIsOrgYENBr7tLuzXmBAe3FBe9DHyDIPvSBHBEjUiikSpfm9A9ow+uSgGLUirCHX2BZqsyh3HFGaoKc+lKRNXxEujBE/9vECEiuZjbaY3B44WzNN7ejzpxSfGYZP9aVQxzyY7P5gTYyXA9Jpc7zZ3qC4uGeJ4ikoG+tLts+SDXTjOaUnZF7AIjkqwp4lEjYiHEBl8YGuIcItxW9h40u56cIKAgcyut6E3FAAiNjLouMeYtaElMutHm5IweEvC9VO++SXs+WAmtQyMOA6KpXRi5HVa4joJ2icysQPFxZoI+yQW5fVPZBjcGHhuDTf3GTVA5fRC2fBlbbd0wU0VHVdaVhESyjfuSLsWVdFp66DXLGKF6NNb7Pyr5ip25r3sV16iJkFtjtozRHLwzVeZsB1KJgMVfayulyEzcw/G578S6s/1TM9iqv9EX1xtxiHizVTSVCR/9JWbPpxr/GsdBUS3KI8E= X-Forefront-Antispam-Report-Untrusted: CIP:40.67.248.234;CTRY:IE;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:nebula.arm.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230028)(4636009)(136003)(396003)(39860400002)(376002)(346002)(451199021)(46966006)(36840700001)(40470700004)(86362001)(36756003)(6666004)(7696005)(316002)(110136005)(70586007)(6636002)(4326008)(70206006)(478600001)(41300700001)(40480700001)(82310400005)(8676002)(5660300002)(8936002)(30864003)(2906002)(44832011)(82740400003)(81166007)(186003)(356005)(26005)(1076003)(36860700001)(2616005)(336012)(83380400001)(426003)(47076005)(40460700003)(36900700001)(559001)(579004);DIR:OUT;SFP:1101; X-MS-Exchange-Transport-CrossTenantHeadersStamped: DBBPR08MB5897 X-MS-Exchange-Transport-CrossTenantHeadersStripped: AM7EUR03FT065.eop-EUR03.prod.protection.outlook.com X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id-Prvs: 913fa1bb-aad7-4593-c206-08db4d88af0a X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: NwggN0twWQuh+DF4CenppTtPkP6wAs7qjU/owUaCzjJER7XwKRjboSHc7pptt3QGT95z8SHgmIfCdQ+N4XmnLe4DKrt4YhHNpHlCFn37M/cpVTo7KnmLFBIIbzWT/rIelRVm1t4/3TQJg2B8PIPT+LudI9Bz6sHZCAuBWk87Yn1EvC5a46EvrHOhDZLFrwDYtqVN+j8P4VBuKHXNlyJ9fbudChYqUZ6A5zZkxYvXg+aUmXfFUFjohk5m15QiHvIIAc21nrEl/iysK5ekdayQ+FlKUq6E9zFdUUfUAPWIL/8a+5lWwdk1DYNJTDld3H84eOkS0kQlD20yqurVQoEuMAPouvkhmUPEhEBtvRDIrLMZsM0GczWhit0VDv0EZNJdw/+SO7Vxc5bA/ICqZLnwInzzo2z0QsPxfrHf+d8Wbp3+2HLwJNfySSYYrMTHjCzIUuz449KA9u7wyn6fQoMU8dzzcYXs7ucjG9mKOAj3REdIEokqkeFLKt6AYO8UOUebqn9AvHJLSDVAAqkyJGyJsXbbfvYzmkzdER5EHd7yFtphOKAdfp1jIes/giOmNVHIriwKE5H5n/Mi+9r0Q+rgcCalGMSs2OCVQg6s96HiKYeuxDXLKET/awv1a1fUiu1Ykce7WY22rc1nFMA1S2u7edGZZaCt2syLgGDCiHitMd5m3Uebv6N6kEffO6UE1jS+s+V4A3VwY+8FLZUiCQ1iuA== X-Forefront-Antispam-Report: CIP:63.35.35.123;CTRY:IE;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:64aa7808-outbound-1.mta.getcheckrecipient.com;PTR:ec2-63-35-35-123.eu-west-1.compute.amazonaws.com;CAT:NONE;SFS:(13230028)(4636009)(39860400002)(396003)(376002)(346002)(136003)(451199021)(40470700004)(36840700001)(46966006)(2906002)(316002)(6636002)(30864003)(4326008)(86362001)(40480700001)(36756003)(5660300002)(44832011)(8676002)(110136005)(8936002)(41300700001)(81166007)(40460700003)(36860700001)(83380400001)(70586007)(70206006)(82740400003)(7696005)(6666004)(82310400005)(478600001)(336012)(426003)(2616005)(1076003)(186003)(47076005)(26005)(559001)(579004);DIR:OUT;SFP:1101; X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 May 2023 16:49:42.7265 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 65b9a9b9-f601-4c02-6105-08db4d88b99d X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: AM7EUR03FT065.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PAWPR08MB9565 X-Spam-Status: No, score=-12.5 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,FORGED_SPF_HELO,GIT_PATCH_0,KAM_DMARC_NONE,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE,TXREP,T_SCC_BODY_TEXT_LINE,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Implement vmovnbq, vmovntq, vqmovnbq, vqmovntq, vqmovunbq, vqmovuntq using the new MVE builtins framework. 2022-09-08 Christophe Lyon gcc/ * config/arm/arm-mve-builtins-base.cc (vmovnbq, vmovntq, vqmovnbq) (vqmovntq, vqmovunbq, vqmovuntq): New. * config/arm/arm-mve-builtins-base.def (vmovnbq, vmovntq) (vqmovnbq, vqmovntq, vqmovunbq, vqmovuntq): New. * config/arm/arm-mve-builtins-base.h (vmovnbq, vmovntq, vqmovnbq) (vqmovntq, vqmovunbq, vqmovuntq): New. * config/arm/arm-mve-builtins.cc (function_instance::has_inactive_argument): Handle vmovnbq, vmovntq, vqmovnbq, vqmovntq, vqmovunbq, vqmovuntq. * config/arm/arm_mve.h (vqmovntq): Remove. (vqmovnbq): Remove. (vqmovnbq_m): Remove. (vqmovntq_m): Remove. (vqmovntq_u16): Remove. (vqmovnbq_u16): Remove. (vqmovntq_s16): Remove. (vqmovnbq_s16): Remove. (vqmovntq_u32): Remove. (vqmovnbq_u32): Remove. (vqmovntq_s32): Remove. (vqmovnbq_s32): Remove. (vqmovnbq_m_s16): Remove. (vqmovntq_m_s16): Remove. (vqmovnbq_m_u16): Remove. (vqmovntq_m_u16): Remove. (vqmovnbq_m_s32): Remove. (vqmovntq_m_s32): Remove. (vqmovnbq_m_u32): Remove. (vqmovntq_m_u32): Remove. (__arm_vqmovntq_u16): Remove. (__arm_vqmovnbq_u16): Remove. (__arm_vqmovntq_s16): Remove. (__arm_vqmovnbq_s16): Remove. (__arm_vqmovntq_u32): Remove. (__arm_vqmovnbq_u32): Remove. (__arm_vqmovntq_s32): Remove. (__arm_vqmovnbq_s32): Remove. (__arm_vqmovnbq_m_s16): Remove. (__arm_vqmovntq_m_s16): Remove. (__arm_vqmovnbq_m_u16): Remove. (__arm_vqmovntq_m_u16): Remove. (__arm_vqmovnbq_m_s32): Remove. (__arm_vqmovntq_m_s32): Remove. (__arm_vqmovnbq_m_u32): Remove. (__arm_vqmovntq_m_u32): Remove. (__arm_vqmovntq): Remove. (__arm_vqmovnbq): Remove. (__arm_vqmovnbq_m): Remove. (__arm_vqmovntq_m): Remove. (vmovntq): Remove. (vmovnbq): Remove. (vmovnbq_m): Remove. (vmovntq_m): Remove. (vmovntq_u16): Remove. (vmovnbq_u16): Remove. (vmovntq_s16): Remove. (vmovnbq_s16): Remove. (vmovntq_u32): Remove. (vmovnbq_u32): Remove. (vmovntq_s32): Remove. (vmovnbq_s32): Remove. (vmovnbq_m_s16): Remove. (vmovntq_m_s16): Remove. (vmovnbq_m_u16): Remove. (vmovntq_m_u16): Remove. (vmovnbq_m_s32): Remove. (vmovntq_m_s32): Remove. (vmovnbq_m_u32): Remove. (vmovntq_m_u32): Remove. (__arm_vmovntq_u16): Remove. (__arm_vmovnbq_u16): Remove. (__arm_vmovntq_s16): Remove. (__arm_vmovnbq_s16): Remove. (__arm_vmovntq_u32): Remove. (__arm_vmovnbq_u32): Remove. (__arm_vmovntq_s32): Remove. (__arm_vmovnbq_s32): Remove. (__arm_vmovnbq_m_s16): Remove. (__arm_vmovntq_m_s16): Remove. (__arm_vmovnbq_m_u16): Remove. (__arm_vmovntq_m_u16): Remove. (__arm_vmovnbq_m_s32): Remove. (__arm_vmovntq_m_s32): Remove. (__arm_vmovnbq_m_u32): Remove. (__arm_vmovntq_m_u32): Remove. (__arm_vmovntq): Remove. (__arm_vmovnbq): Remove. (__arm_vmovnbq_m): Remove. (__arm_vmovntq_m): Remove. (vqmovuntq): Remove. (vqmovunbq): Remove. (vqmovunbq_m): Remove. (vqmovuntq_m): Remove. (vqmovuntq_s16): Remove. (vqmovunbq_s16): Remove. (vqmovuntq_s32): Remove. (vqmovunbq_s32): Remove. (vqmovunbq_m_s16): Remove. (vqmovuntq_m_s16): Remove. (vqmovunbq_m_s32): Remove. (vqmovuntq_m_s32): Remove. (__arm_vqmovuntq_s16): Remove. (__arm_vqmovunbq_s16): Remove. (__arm_vqmovuntq_s32): Remove. (__arm_vqmovunbq_s32): Remove. (__arm_vqmovunbq_m_s16): Remove. (__arm_vqmovuntq_m_s16): Remove. (__arm_vqmovunbq_m_s32): Remove. (__arm_vqmovuntq_m_s32): Remove. (__arm_vqmovuntq): Remove. (__arm_vqmovunbq): Remove. (__arm_vqmovunbq_m): Remove. (__arm_vqmovuntq_m): Remove. --- gcc/config/arm/arm-mve-builtins-base.cc | 6 + gcc/config/arm/arm-mve-builtins-base.def | 6 + gcc/config/arm/arm-mve-builtins-base.h | 8 +- gcc/config/arm/arm-mve-builtins.cc | 6 + gcc/config/arm/arm_mve.h | 788 ----------------------- 5 files changed, 25 insertions(+), 789 deletions(-) diff --git a/gcc/config/arm/arm-mve-builtins-base.cc b/gcc/config/arm/arm-mve-builtins-base.cc index 4cf4464a48e..1dae12b445b 100644 --- a/gcc/config/arm/arm-mve-builtins-base.cc +++ b/gcc/config/arm/arm-mve-builtins-base.cc @@ -224,12 +224,18 @@ FUNCTION_WITH_M_N_NO_F (vhaddq, VHADDQ) FUNCTION_WITH_M_N_NO_F (vhsubq, VHSUBQ) FUNCTION_WITH_RTX_M_NO_F (vmaxq, SMAX, UMAX, VMAXQ) FUNCTION_WITH_RTX_M_NO_F (vminq, SMIN, UMIN, VMINQ) +FUNCTION_WITHOUT_N_NO_F (vmovnbq, VMOVNBQ) +FUNCTION_WITHOUT_N_NO_F (vmovntq, VMOVNTQ) FUNCTION_WITHOUT_N_NO_F (vmulhq, VMULHQ) FUNCTION_WITH_RTX_M_N (vmulq, MULT, VMULQ) FUNCTION (vnegq, unspec_based_mve_function_exact_insn, (NEG, NEG, NEG, -1, -1, -1, VNEGQ_M_S, -1, VNEGQ_M_F, -1, -1, -1)) FUNCTION_WITH_RTX_M_N_NO_N_F (vorrq, IOR, VORRQ) FUNCTION_WITHOUT_N_NO_U_F (vqabsq, VQABSQ) FUNCTION_WITH_M_N_NO_F (vqaddq, VQADDQ) +FUNCTION_WITHOUT_N_NO_F (vqmovnbq, VQMOVNBQ) +FUNCTION_WITHOUT_N_NO_F (vqmovntq, VQMOVNTQ) +FUNCTION_WITHOUT_N_NO_U_F (vqmovunbq, VQMOVUNBQ) +FUNCTION_WITHOUT_N_NO_U_F (vqmovuntq, VQMOVUNTQ) FUNCTION_WITH_M_N_NO_U_F (vqdmulhq, VQDMULHQ) FUNCTION_WITHOUT_N_NO_U_F (vqnegq, VQNEGQ) FUNCTION_WITH_M_N_NO_F (vqrshlq, VQRSHLQ) diff --git a/gcc/config/arm/arm-mve-builtins-base.def b/gcc/config/arm/arm-mve-builtins-base.def index 2928a554a11..f868614fb6b 100644 --- a/gcc/config/arm/arm-mve-builtins-base.def +++ b/gcc/config/arm/arm-mve-builtins-base.def @@ -30,6 +30,8 @@ DEF_MVE_FUNCTION (vhaddq, binary_opt_n, all_integer, mx_or_none) DEF_MVE_FUNCTION (vhsubq, binary_opt_n, all_integer, mx_or_none) DEF_MVE_FUNCTION (vmaxq, binary, all_integer, mx_or_none) DEF_MVE_FUNCTION (vminq, binary, all_integer, mx_or_none) +DEF_MVE_FUNCTION (vmovnbq, binary_move_narrow, integer_16_32, m_or_none) +DEF_MVE_FUNCTION (vmovntq, binary_move_narrow, integer_16_32, m_or_none) DEF_MVE_FUNCTION (vmulhq, binary, all_integer, mx_or_none) DEF_MVE_FUNCTION (vmulq, binary_opt_n, all_integer, mx_or_none) DEF_MVE_FUNCTION (vnegq, unary, all_signed, mx_or_none) @@ -37,6 +39,10 @@ DEF_MVE_FUNCTION (vorrq, binary_orrq, all_integer, mx_or_none) DEF_MVE_FUNCTION (vqabsq, unary, all_signed, m_or_none) DEF_MVE_FUNCTION (vqaddq, binary_opt_n, all_integer, m_or_none) DEF_MVE_FUNCTION (vqdmulhq, binary_opt_n, all_signed, m_or_none) +DEF_MVE_FUNCTION (vqmovnbq, binary_move_narrow, integer_16_32, m_or_none) +DEF_MVE_FUNCTION (vqmovntq, binary_move_narrow, integer_16_32, m_or_none) +DEF_MVE_FUNCTION (vqmovunbq, binary_move_narrow_unsigned, signed_16_32, m_or_none) +DEF_MVE_FUNCTION (vqmovuntq, binary_move_narrow_unsigned, signed_16_32, m_or_none) DEF_MVE_FUNCTION (vqnegq, unary, all_signed, m_or_none) DEF_MVE_FUNCTION (vqrdmulhq, binary_opt_n, all_signed, m_or_none) DEF_MVE_FUNCTION (vqrshlq, binary_round_lshift, all_integer, m_or_none) diff --git a/gcc/config/arm/arm-mve-builtins-base.h b/gcc/config/arm/arm-mve-builtins-base.h index b432011978e..f4960cbbea2 100644 --- a/gcc/config/arm/arm-mve-builtins-base.h +++ b/gcc/config/arm/arm-mve-builtins-base.h @@ -35,6 +35,8 @@ extern const function_base *const vhaddq; extern const function_base *const vhsubq; extern const function_base *const vmaxq; extern const function_base *const vminq; +extern const function_base *const vmovnbq; +extern const function_base *const vmovntq; extern const function_base *const vmulhq; extern const function_base *const vmulq; extern const function_base *const vnegq; @@ -42,6 +44,10 @@ extern const function_base *const vorrq; extern const function_base *const vqabsq; extern const function_base *const vqaddq; extern const function_base *const vqdmulhq; +extern const function_base *const vqmovnbq; +extern const function_base *const vqmovntq; +extern const function_base *const vqmovunbq; +extern const function_base *const vqmovuntq; extern const function_base *const vqnegq; extern const function_base *const vqrdmulhq; extern const function_base *const vqrshlq; @@ -58,11 +64,11 @@ extern const function_base *const vqsubq; extern const function_base *const vreinterpretq; extern const function_base *const vrhaddq; extern const function_base *const vrmulhq; -extern const function_base *const vrndq; extern const function_base *const vrndaq; extern const function_base *const vrndmq; extern const function_base *const vrndnq; extern const function_base *const vrndpq; +extern const function_base *const vrndq; extern const function_base *const vrndxq; extern const function_base *const vrshlq; extern const function_base *const vrshrnbq; diff --git a/gcc/config/arm/arm-mve-builtins.cc b/gcc/config/arm/arm-mve-builtins.cc index 7c34d2a94de..38639f75785 100644 --- a/gcc/config/arm/arm-mve-builtins.cc +++ b/gcc/config/arm/arm-mve-builtins.cc @@ -670,6 +670,12 @@ function_instance::has_inactive_argument () const return false; if (mode_suffix_id == MODE_r + || base == functions::vmovnbq + || base == functions::vmovntq + || base == functions::vqmovnbq + || base == functions::vqmovntq + || base == functions::vqmovunbq + || base == functions::vqmovuntq || (base == functions::vorrq && mode_suffix_id == MODE_n) || (base == functions::vqrshlq && mode_suffix_id == MODE_n) || base == functions::vqrshrnbq diff --git a/gcc/config/arm/arm_mve.h b/gcc/config/arm/arm_mve.h index aae1f8bf639..97f0ef93ee9 100644 --- a/gcc/config/arm/arm_mve.h +++ b/gcc/config/arm/arm_mve.h @@ -82,15 +82,9 @@ #define vmladavxq(__a, __b) __arm_vmladavxq(__a, __b) #define vhcaddq_rot90(__a, __b) __arm_vhcaddq_rot90(__a, __b) #define vhcaddq_rot270(__a, __b) __arm_vhcaddq_rot270(__a, __b) -#define vqmovntq(__a, __b) __arm_vqmovntq(__a, __b) -#define vqmovnbq(__a, __b) __arm_vqmovnbq(__a, __b) #define vmulltq_poly(__a, __b) __arm_vmulltq_poly(__a, __b) #define vmullbq_poly(__a, __b) __arm_vmullbq_poly(__a, __b) -#define vmovntq(__a, __b) __arm_vmovntq(__a, __b) -#define vmovnbq(__a, __b) __arm_vmovnbq(__a, __b) #define vmlaldavq(__a, __b) __arm_vmlaldavq(__a, __b) -#define vqmovuntq(__a, __b) __arm_vqmovuntq(__a, __b) -#define vqmovunbq(__a, __b) __arm_vqmovunbq(__a, __b) #define vshlltq(__a, __imm) __arm_vshlltq(__a, __imm) #define vshllbq(__a, __imm) __arm_vshllbq(__a, __imm) #define vqdmulltq(__a, __b) __arm_vqdmulltq(__a, __b) @@ -170,13 +164,7 @@ #define vmlsldavxq_p(__a, __b, __p) __arm_vmlsldavxq_p(__a, __b, __p) #define vmovlbq_m(__inactive, __a, __p) __arm_vmovlbq_m(__inactive, __a, __p) #define vmovltq_m(__inactive, __a, __p) __arm_vmovltq_m(__inactive, __a, __p) -#define vmovnbq_m(__a, __b, __p) __arm_vmovnbq_m(__a, __b, __p) -#define vmovntq_m(__a, __b, __p) __arm_vmovntq_m(__a, __b, __p) -#define vqmovnbq_m(__a, __b, __p) __arm_vqmovnbq_m(__a, __b, __p) -#define vqmovntq_m(__a, __b, __p) __arm_vqmovntq_m(__a, __b, __p) #define vrev32q_m(__inactive, __a, __p) __arm_vrev32q_m(__inactive, __a, __p) -#define vqmovunbq_m(__a, __b, __p) __arm_vqmovunbq_m(__a, __b, __p) -#define vqmovuntq_m(__a, __b, __p) __arm_vqmovuntq_m(__a, __b, __p) #define vsriq_m(__a, __b, __imm, __p) __arm_vsriq_m(__a, __b, __imm, __p) #define vqshluq_m(__inactive, __a, __imm, __p) __arm_vqshluq_m(__inactive, __a, __imm, __p) #define vabavq_p(__a, __b, __c, __p) __arm_vabavq_p(__a, __b, __c, __p) @@ -652,15 +640,9 @@ #define vbrsrq_n_s32(__a, __b) __arm_vbrsrq_n_s32(__a, __b) #define vbicq_s32(__a, __b) __arm_vbicq_s32(__a, __b) #define vaddvaq_s32(__a, __b) __arm_vaddvaq_s32(__a, __b) -#define vqmovntq_u16(__a, __b) __arm_vqmovntq_u16(__a, __b) -#define vqmovnbq_u16(__a, __b) __arm_vqmovnbq_u16(__a, __b) #define vmulltq_poly_p8(__a, __b) __arm_vmulltq_poly_p8(__a, __b) #define vmullbq_poly_p8(__a, __b) __arm_vmullbq_poly_p8(__a, __b) -#define vmovntq_u16(__a, __b) __arm_vmovntq_u16(__a, __b) -#define vmovnbq_u16(__a, __b) __arm_vmovnbq_u16(__a, __b) #define vmlaldavq_u16(__a, __b) __arm_vmlaldavq_u16(__a, __b) -#define vqmovuntq_s16(__a, __b) __arm_vqmovuntq_s16(__a, __b) -#define vqmovunbq_s16(__a, __b) __arm_vqmovunbq_s16(__a, __b) #define vshlltq_n_u8(__a, __imm) __arm_vshlltq_n_u8(__a, __imm) #define vshllbq_n_u8(__a, __imm) __arm_vshllbq_n_u8(__a, __imm) #define vbicq_n_u16(__a, __imm) __arm_vbicq_n_u16(__a, __imm) @@ -676,15 +658,11 @@ #define vcmpgeq_f16(__a, __b) __arm_vcmpgeq_f16(__a, __b) #define vcmpeqq_n_f16(__a, __b) __arm_vcmpeqq_n_f16(__a, __b) #define vcmpeqq_f16(__a, __b) __arm_vcmpeqq_f16(__a, __b) -#define vqmovntq_s16(__a, __b) __arm_vqmovntq_s16(__a, __b) -#define vqmovnbq_s16(__a, __b) __arm_vqmovnbq_s16(__a, __b) #define vqdmulltq_s16(__a, __b) __arm_vqdmulltq_s16(__a, __b) #define vqdmulltq_n_s16(__a, __b) __arm_vqdmulltq_n_s16(__a, __b) #define vqdmullbq_s16(__a, __b) __arm_vqdmullbq_s16(__a, __b) #define vqdmullbq_n_s16(__a, __b) __arm_vqdmullbq_n_s16(__a, __b) #define vornq_f16(__a, __b) __arm_vornq_f16(__a, __b) -#define vmovntq_s16(__a, __b) __arm_vmovntq_s16(__a, __b) -#define vmovnbq_s16(__a, __b) __arm_vmovnbq_s16(__a, __b) #define vmlsldavxq_s16(__a, __b) __arm_vmlsldavxq_s16(__a, __b) #define vmlsldavq_s16(__a, __b) __arm_vmlsldavq_s16(__a, __b) #define vmlaldavxq_s16(__a, __b) __arm_vmlaldavxq_s16(__a, __b) @@ -707,15 +685,9 @@ #define vshlltq_n_s8(__a, __imm) __arm_vshlltq_n_s8(__a, __imm) #define vshllbq_n_s8(__a, __imm) __arm_vshllbq_n_s8(__a, __imm) #define vbicq_n_s16(__a, __imm) __arm_vbicq_n_s16(__a, __imm) -#define vqmovntq_u32(__a, __b) __arm_vqmovntq_u32(__a, __b) -#define vqmovnbq_u32(__a, __b) __arm_vqmovnbq_u32(__a, __b) #define vmulltq_poly_p16(__a, __b) __arm_vmulltq_poly_p16(__a, __b) #define vmullbq_poly_p16(__a, __b) __arm_vmullbq_poly_p16(__a, __b) -#define vmovntq_u32(__a, __b) __arm_vmovntq_u32(__a, __b) -#define vmovnbq_u32(__a, __b) __arm_vmovnbq_u32(__a, __b) #define vmlaldavq_u32(__a, __b) __arm_vmlaldavq_u32(__a, __b) -#define vqmovuntq_s32(__a, __b) __arm_vqmovuntq_s32(__a, __b) -#define vqmovunbq_s32(__a, __b) __arm_vqmovunbq_s32(__a, __b) #define vshlltq_n_u16(__a, __imm) __arm_vshlltq_n_u16(__a, __imm) #define vshllbq_n_u16(__a, __imm) __arm_vshllbq_n_u16(__a, __imm) #define vbicq_n_u32(__a, __imm) __arm_vbicq_n_u32(__a, __imm) @@ -731,15 +703,11 @@ #define vcmpgeq_f32(__a, __b) __arm_vcmpgeq_f32(__a, __b) #define vcmpeqq_n_f32(__a, __b) __arm_vcmpeqq_n_f32(__a, __b) #define vcmpeqq_f32(__a, __b) __arm_vcmpeqq_f32(__a, __b) -#define vqmovntq_s32(__a, __b) __arm_vqmovntq_s32(__a, __b) -#define vqmovnbq_s32(__a, __b) __arm_vqmovnbq_s32(__a, __b) #define vqdmulltq_s32(__a, __b) __arm_vqdmulltq_s32(__a, __b) #define vqdmulltq_n_s32(__a, __b) __arm_vqdmulltq_n_s32(__a, __b) #define vqdmullbq_s32(__a, __b) __arm_vqdmullbq_s32(__a, __b) #define vqdmullbq_n_s32(__a, __b) __arm_vqdmullbq_n_s32(__a, __b) #define vornq_f32(__a, __b) __arm_vornq_f32(__a, __b) -#define vmovntq_s32(__a, __b) __arm_vmovntq_s32(__a, __b) -#define vmovnbq_s32(__a, __b) __arm_vmovnbq_s32(__a, __b) #define vmlsldavxq_s32(__a, __b) __arm_vmlsldavxq_s32(__a, __b) #define vmlsldavq_s32(__a, __b) __arm_vmlsldavq_s32(__a, __b) #define vmlaldavxq_s32(__a, __b) __arm_vmlaldavxq_s32(__a, __b) @@ -1056,11 +1024,7 @@ #define vmlsldavxq_p_s16(__a, __b, __p) __arm_vmlsldavxq_p_s16(__a, __b, __p) #define vmovlbq_m_s8(__inactive, __a, __p) __arm_vmovlbq_m_s8(__inactive, __a, __p) #define vmovltq_m_s8(__inactive, __a, __p) __arm_vmovltq_m_s8(__inactive, __a, __p) -#define vmovnbq_m_s16(__a, __b, __p) __arm_vmovnbq_m_s16(__a, __b, __p) -#define vmovntq_m_s16(__a, __b, __p) __arm_vmovntq_m_s16(__a, __b, __p) #define vpselq_f16(__a, __b, __p) __arm_vpselq_f16(__a, __b, __p) -#define vqmovnbq_m_s16(__a, __b, __p) __arm_vqmovnbq_m_s16(__a, __b, __p) -#define vqmovntq_m_s16(__a, __b, __p) __arm_vqmovntq_m_s16(__a, __b, __p) #define vrev32q_m_s8(__inactive, __a, __p) __arm_vrev32q_m_s8(__inactive, __a, __p) #define vrev64q_m_f16(__inactive, __a, __p) __arm_vrev64q_m_f16(__inactive, __a, __p) #define vcmpeqq_m_n_f16(__a, __b, __p) __arm_vcmpeqq_m_n_f16(__a, __b, __p) @@ -1079,16 +1043,10 @@ #define vcvtnq_m_u16_f16(__inactive, __a, __p) __arm_vcvtnq_m_u16_f16(__inactive, __a, __p) #define vcvtpq_m_u16_f16(__inactive, __a, __p) __arm_vcvtpq_m_u16_f16(__inactive, __a, __p) #define vcvtq_m_u16_f16(__inactive, __a, __p) __arm_vcvtq_m_u16_f16(__inactive, __a, __p) -#define vqmovunbq_m_s16(__a, __b, __p) __arm_vqmovunbq_m_s16(__a, __b, __p) -#define vqmovuntq_m_s16(__a, __b, __p) __arm_vqmovuntq_m_s16(__a, __b, __p) #define vmlaldavaq_u16(__a, __b, __c) __arm_vmlaldavaq_u16(__a, __b, __c) #define vmlaldavq_p_u16(__a, __b, __p) __arm_vmlaldavq_p_u16(__a, __b, __p) #define vmovlbq_m_u8(__inactive, __a, __p) __arm_vmovlbq_m_u8(__inactive, __a, __p) #define vmovltq_m_u8(__inactive, __a, __p) __arm_vmovltq_m_u8(__inactive, __a, __p) -#define vmovnbq_m_u16(__a, __b, __p) __arm_vmovnbq_m_u16(__a, __b, __p) -#define vmovntq_m_u16(__a, __b, __p) __arm_vmovntq_m_u16(__a, __b, __p) -#define vqmovnbq_m_u16(__a, __b, __p) __arm_vqmovnbq_m_u16(__a, __b, __p) -#define vqmovntq_m_u16(__a, __b, __p) __arm_vqmovntq_m_u16(__a, __b, __p) #define vrev32q_m_u8(__inactive, __a, __p) __arm_vrev32q_m_u8(__inactive, __a, __p) #define vmvnq_m_n_s32(__inactive, __imm, __p) __arm_vmvnq_m_n_s32(__inactive, __imm, __p) #define vcmlaq_f32(__a, __b, __c) __arm_vcmlaq_f32(__a, __b, __c) @@ -1120,11 +1078,7 @@ #define vmlsldavxq_p_s32(__a, __b, __p) __arm_vmlsldavxq_p_s32(__a, __b, __p) #define vmovlbq_m_s16(__inactive, __a, __p) __arm_vmovlbq_m_s16(__inactive, __a, __p) #define vmovltq_m_s16(__inactive, __a, __p) __arm_vmovltq_m_s16(__inactive, __a, __p) -#define vmovnbq_m_s32(__a, __b, __p) __arm_vmovnbq_m_s32(__a, __b, __p) -#define vmovntq_m_s32(__a, __b, __p) __arm_vmovntq_m_s32(__a, __b, __p) #define vpselq_f32(__a, __b, __p) __arm_vpselq_f32(__a, __b, __p) -#define vqmovnbq_m_s32(__a, __b, __p) __arm_vqmovnbq_m_s32(__a, __b, __p) -#define vqmovntq_m_s32(__a, __b, __p) __arm_vqmovntq_m_s32(__a, __b, __p) #define vrev32q_m_s16(__inactive, __a, __p) __arm_vrev32q_m_s16(__inactive, __a, __p) #define vrev64q_m_f32(__inactive, __a, __p) __arm_vrev64q_m_f32(__inactive, __a, __p) #define vcmpeqq_m_n_f32(__a, __b, __p) __arm_vcmpeqq_m_n_f32(__a, __b, __p) @@ -1143,16 +1097,10 @@ #define vcvtnq_m_u32_f32(__inactive, __a, __p) __arm_vcvtnq_m_u32_f32(__inactive, __a, __p) #define vcvtpq_m_u32_f32(__inactive, __a, __p) __arm_vcvtpq_m_u32_f32(__inactive, __a, __p) #define vcvtq_m_u32_f32(__inactive, __a, __p) __arm_vcvtq_m_u32_f32(__inactive, __a, __p) -#define vqmovunbq_m_s32(__a, __b, __p) __arm_vqmovunbq_m_s32(__a, __b, __p) -#define vqmovuntq_m_s32(__a, __b, __p) __arm_vqmovuntq_m_s32(__a, __b, __p) #define vmlaldavaq_u32(__a, __b, __c) __arm_vmlaldavaq_u32(__a, __b, __c) #define vmlaldavq_p_u32(__a, __b, __p) __arm_vmlaldavq_p_u32(__a, __b, __p) #define vmovlbq_m_u16(__inactive, __a, __p) __arm_vmovlbq_m_u16(__inactive, __a, __p) #define vmovltq_m_u16(__inactive, __a, __p) __arm_vmovltq_m_u16(__inactive, __a, __p) -#define vmovnbq_m_u32(__a, __b, __p) __arm_vmovnbq_m_u32(__a, __b, __p) -#define vmovntq_m_u32(__a, __b, __p) __arm_vmovntq_m_u32(__a, __b, __p) -#define vqmovnbq_m_u32(__a, __b, __p) __arm_vqmovnbq_m_u32(__a, __b, __p) -#define vqmovntq_m_u32(__a, __b, __p) __arm_vqmovntq_m_u32(__a, __b, __p) #define vrev32q_m_u16(__inactive, __a, __p) __arm_vrev32q_m_u16(__inactive, __a, __p) #define vsriq_m_n_s8(__a, __b, __imm, __p) __arm_vsriq_m_n_s8(__a, __b, __imm, __p) #define vcvtq_m_n_f16_u16(__inactive, __a, __imm6, __p) __arm_vcvtq_m_n_f16_u16(__inactive, __a, __imm6, __p) @@ -3485,20 +3433,6 @@ __arm_vaddvaq_s32 (int32_t __a, int32x4_t __b) return __builtin_mve_vaddvaq_sv4si (__a, __b); } -__extension__ extern __inline uint8x16_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vqmovntq_u16 (uint8x16_t __a, uint16x8_t __b) -{ - return __builtin_mve_vqmovntq_uv8hi (__a, __b); -} - -__extension__ extern __inline uint8x16_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vqmovnbq_u16 (uint8x16_t __a, uint16x8_t __b) -{ - return __builtin_mve_vqmovnbq_uv8hi (__a, __b); -} - __extension__ extern __inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vmulltq_poly_p8 (uint8x16_t __a, uint8x16_t __b) @@ -3513,20 +3447,6 @@ __arm_vmullbq_poly_p8 (uint8x16_t __a, uint8x16_t __b) return __builtin_mve_vmullbq_poly_pv16qi (__a, __b); } -__extension__ extern __inline uint8x16_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vmovntq_u16 (uint8x16_t __a, uint16x8_t __b) -{ - return __builtin_mve_vmovntq_uv8hi (__a, __b); -} - -__extension__ extern __inline uint8x16_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vmovnbq_u16 (uint8x16_t __a, uint16x8_t __b) -{ - return __builtin_mve_vmovnbq_uv8hi (__a, __b); -} - __extension__ extern __inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vmlaldavq_u16 (uint16x8_t __a, uint16x8_t __b) @@ -3534,20 +3454,6 @@ __arm_vmlaldavq_u16 (uint16x8_t __a, uint16x8_t __b) return __builtin_mve_vmlaldavq_uv8hi (__a, __b); } -__extension__ extern __inline uint8x16_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vqmovuntq_s16 (uint8x16_t __a, int16x8_t __b) -{ - return __builtin_mve_vqmovuntq_sv8hi (__a, __b); -} - -__extension__ extern __inline uint8x16_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vqmovunbq_s16 (uint8x16_t __a, int16x8_t __b) -{ - return __builtin_mve_vqmovunbq_sv8hi (__a, __b); -} - __extension__ extern __inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vshlltq_n_u8 (uint8x16_t __a, const int __imm) @@ -3569,20 +3475,6 @@ __arm_vbicq_n_u16 (uint16x8_t __a, const int __imm) return __builtin_mve_vbicq_n_uv8hi (__a, __imm); } -__extension__ extern __inline int8x16_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vqmovntq_s16 (int8x16_t __a, int16x8_t __b) -{ - return __builtin_mve_vqmovntq_sv8hi (__a, __b); -} - -__extension__ extern __inline int8x16_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vqmovnbq_s16 (int8x16_t __a, int16x8_t __b) -{ - return __builtin_mve_vqmovnbq_sv8hi (__a, __b); -} - __extension__ extern __inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vqdmulltq_s16 (int16x8_t __a, int16x8_t __b) @@ -3611,20 +3503,6 @@ __arm_vqdmullbq_n_s16 (int16x8_t __a, int16_t __b) return __builtin_mve_vqdmullbq_n_sv8hi (__a, __b); } -__extension__ extern __inline int8x16_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vmovntq_s16 (int8x16_t __a, int16x8_t __b) -{ - return __builtin_mve_vmovntq_sv8hi (__a, __b); -} - -__extension__ extern __inline int8x16_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vmovnbq_s16 (int8x16_t __a, int16x8_t __b) -{ - return __builtin_mve_vmovnbq_sv8hi (__a, __b); -} - __extension__ extern __inline int64_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vmlsldavxq_s16 (int16x8_t __a, int16x8_t __b) @@ -3674,20 +3552,6 @@ __arm_vbicq_n_s16 (int16x8_t __a, const int __imm) return __builtin_mve_vbicq_n_sv8hi (__a, __imm); } -__extension__ extern __inline uint16x8_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vqmovntq_u32 (uint16x8_t __a, uint32x4_t __b) -{ - return __builtin_mve_vqmovntq_uv4si (__a, __b); -} - -__extension__ extern __inline uint16x8_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vqmovnbq_u32 (uint16x8_t __a, uint32x4_t __b) -{ - return __builtin_mve_vqmovnbq_uv4si (__a, __b); -} - __extension__ extern __inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vmulltq_poly_p16 (uint16x8_t __a, uint16x8_t __b) @@ -3702,20 +3566,6 @@ __arm_vmullbq_poly_p16 (uint16x8_t __a, uint16x8_t __b) return __builtin_mve_vmullbq_poly_pv8hi (__a, __b); } -__extension__ extern __inline uint16x8_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vmovntq_u32 (uint16x8_t __a, uint32x4_t __b) -{ - return __builtin_mve_vmovntq_uv4si (__a, __b); -} - -__extension__ extern __inline uint16x8_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vmovnbq_u32 (uint16x8_t __a, uint32x4_t __b) -{ - return __builtin_mve_vmovnbq_uv4si (__a, __b); -} - __extension__ extern __inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vmlaldavq_u32 (uint32x4_t __a, uint32x4_t __b) @@ -3723,20 +3573,6 @@ __arm_vmlaldavq_u32 (uint32x4_t __a, uint32x4_t __b) return __builtin_mve_vmlaldavq_uv4si (__a, __b); } -__extension__ extern __inline uint16x8_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vqmovuntq_s32 (uint16x8_t __a, int32x4_t __b) -{ - return __builtin_mve_vqmovuntq_sv4si (__a, __b); -} - -__extension__ extern __inline uint16x8_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vqmovunbq_s32 (uint16x8_t __a, int32x4_t __b) -{ - return __builtin_mve_vqmovunbq_sv4si (__a, __b); -} - __extension__ extern __inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vshlltq_n_u16 (uint16x8_t __a, const int __imm) @@ -3758,20 +3594,6 @@ __arm_vbicq_n_u32 (uint32x4_t __a, const int __imm) return __builtin_mve_vbicq_n_uv4si (__a, __imm); } -__extension__ extern __inline int16x8_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vqmovntq_s32 (int16x8_t __a, int32x4_t __b) -{ - return __builtin_mve_vqmovntq_sv4si (__a, __b); -} - -__extension__ extern __inline int16x8_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vqmovnbq_s32 (int16x8_t __a, int32x4_t __b) -{ - return __builtin_mve_vqmovnbq_sv4si (__a, __b); -} - __extension__ extern __inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vqdmulltq_s32 (int32x4_t __a, int32x4_t __b) @@ -3800,20 +3622,6 @@ __arm_vqdmullbq_n_s32 (int32x4_t __a, int32_t __b) return __builtin_mve_vqdmullbq_n_sv4si (__a, __b); } -__extension__ extern __inline int16x8_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vmovntq_s32 (int16x8_t __a, int32x4_t __b) -{ - return __builtin_mve_vmovntq_sv4si (__a, __b); -} - -__extension__ extern __inline int16x8_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vmovnbq_s32 (int16x8_t __a, int32x4_t __b) -{ - return __builtin_mve_vmovnbq_sv4si (__a, __b); -} - __extension__ extern __inline int64_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vmlsldavxq_s32 (int32x4_t __a, int32x4_t __b) @@ -5681,34 +5489,6 @@ __arm_vmovltq_m_s8 (int16x8_t __inactive, int8x16_t __a, mve_pred16_t __p) return __builtin_mve_vmovltq_m_sv16qi (__inactive, __a, __p); } -__extension__ extern __inline int8x16_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vmovnbq_m_s16 (int8x16_t __a, int16x8_t __b, mve_pred16_t __p) -{ - return __builtin_mve_vmovnbq_m_sv8hi (__a, __b, __p); -} - -__extension__ extern __inline int8x16_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vmovntq_m_s16 (int8x16_t __a, int16x8_t __b, mve_pred16_t __p) -{ - return __builtin_mve_vmovntq_m_sv8hi (__a, __b, __p); -} - -__extension__ extern __inline int8x16_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vqmovnbq_m_s16 (int8x16_t __a, int16x8_t __b, mve_pred16_t __p) -{ - return __builtin_mve_vqmovnbq_m_sv8hi (__a, __b, __p); -} - -__extension__ extern __inline int8x16_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vqmovntq_m_s16 (int8x16_t __a, int16x8_t __b, mve_pred16_t __p) -{ - return __builtin_mve_vqmovntq_m_sv8hi (__a, __b, __p); -} - __extension__ extern __inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vrev32q_m_s8 (int8x16_t __inactive, int8x16_t __a, mve_pred16_t __p) @@ -5723,20 +5503,6 @@ __arm_vmvnq_m_n_u16 (uint16x8_t __inactive, const int __imm, mve_pred16_t __p) return __builtin_mve_vmvnq_m_n_uv8hi (__inactive, __imm, __p); } -__extension__ extern __inline uint8x16_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vqmovunbq_m_s16 (uint8x16_t __a, int16x8_t __b, mve_pred16_t __p) -{ - return __builtin_mve_vqmovunbq_m_sv8hi (__a, __b, __p); -} - -__extension__ extern __inline uint8x16_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vqmovuntq_m_s16 (uint8x16_t __a, int16x8_t __b, mve_pred16_t __p) -{ - return __builtin_mve_vqmovuntq_m_sv8hi (__a, __b, __p); -} - __extension__ extern __inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vmlaldavaq_u16 (uint64_t __a, uint16x8_t __b, uint16x8_t __c) @@ -5765,34 +5531,6 @@ __arm_vmovltq_m_u8 (uint16x8_t __inactive, uint8x16_t __a, mve_pred16_t __p) return __builtin_mve_vmovltq_m_uv16qi (__inactive, __a, __p); } -__extension__ extern __inline uint8x16_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vmovnbq_m_u16 (uint8x16_t __a, uint16x8_t __b, mve_pred16_t __p) -{ - return __builtin_mve_vmovnbq_m_uv8hi (__a, __b, __p); -} - -__extension__ extern __inline uint8x16_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vmovntq_m_u16 (uint8x16_t __a, uint16x8_t __b, mve_pred16_t __p) -{ - return __builtin_mve_vmovntq_m_uv8hi (__a, __b, __p); -} - -__extension__ extern __inline uint8x16_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vqmovnbq_m_u16 (uint8x16_t __a, uint16x8_t __b, mve_pred16_t __p) -{ - return __builtin_mve_vqmovnbq_m_uv8hi (__a, __b, __p); -} - -__extension__ extern __inline uint8x16_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vqmovntq_m_u16 (uint8x16_t __a, uint16x8_t __b, mve_pred16_t __p) -{ - return __builtin_mve_vqmovntq_m_uv8hi (__a, __b, __p); -} - __extension__ extern __inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vrev32q_m_u8 (uint8x16_t __inactive, uint8x16_t __a, mve_pred16_t __p) @@ -5877,34 +5615,6 @@ __arm_vmovltq_m_s16 (int32x4_t __inactive, int16x8_t __a, mve_pred16_t __p) return __builtin_mve_vmovltq_m_sv8hi (__inactive, __a, __p); } -__extension__ extern __inline int16x8_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vmovnbq_m_s32 (int16x8_t __a, int32x4_t __b, mve_pred16_t __p) -{ - return __builtin_mve_vmovnbq_m_sv4si (__a, __b, __p); -} - -__extension__ extern __inline int16x8_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vmovntq_m_s32 (int16x8_t __a, int32x4_t __b, mve_pred16_t __p) -{ - return __builtin_mve_vmovntq_m_sv4si (__a, __b, __p); -} - -__extension__ extern __inline int16x8_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vqmovnbq_m_s32 (int16x8_t __a, int32x4_t __b, mve_pred16_t __p) -{ - return __builtin_mve_vqmovnbq_m_sv4si (__a, __b, __p); -} - -__extension__ extern __inline int16x8_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vqmovntq_m_s32 (int16x8_t __a, int32x4_t __b, mve_pred16_t __p) -{ - return __builtin_mve_vqmovntq_m_sv4si (__a, __b, __p); -} - __extension__ extern __inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vrev32q_m_s16 (int16x8_t __inactive, int16x8_t __a, mve_pred16_t __p) @@ -5919,20 +5629,6 @@ __arm_vmvnq_m_n_u32 (uint32x4_t __inactive, const int __imm, mve_pred16_t __p) return __builtin_mve_vmvnq_m_n_uv4si (__inactive, __imm, __p); } -__extension__ extern __inline uint16x8_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vqmovunbq_m_s32 (uint16x8_t __a, int32x4_t __b, mve_pred16_t __p) -{ - return __builtin_mve_vqmovunbq_m_sv4si (__a, __b, __p); -} - -__extension__ extern __inline uint16x8_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vqmovuntq_m_s32 (uint16x8_t __a, int32x4_t __b, mve_pred16_t __p) -{ - return __builtin_mve_vqmovuntq_m_sv4si (__a, __b, __p); -} - __extension__ extern __inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vmlaldavaq_u32 (uint64_t __a, uint32x4_t __b, uint32x4_t __c) @@ -5961,34 +5657,6 @@ __arm_vmovltq_m_u16 (uint32x4_t __inactive, uint16x8_t __a, mve_pred16_t __p) return __builtin_mve_vmovltq_m_uv8hi (__inactive, __a, __p); } -__extension__ extern __inline uint16x8_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vmovnbq_m_u32 (uint16x8_t __a, uint32x4_t __b, mve_pred16_t __p) -{ - return __builtin_mve_vmovnbq_m_uv4si (__a, __b, __p); -} - -__extension__ extern __inline uint16x8_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vmovntq_m_u32 (uint16x8_t __a, uint32x4_t __b, mve_pred16_t __p) -{ - return __builtin_mve_vmovntq_m_uv4si (__a, __b, __p); -} - -__extension__ extern __inline uint16x8_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vqmovnbq_m_u32 (uint16x8_t __a, uint32x4_t __b, mve_pred16_t __p) -{ - return __builtin_mve_vqmovnbq_m_uv4si (__a, __b, __p); -} - -__extension__ extern __inline uint16x8_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vqmovntq_m_u32 (uint16x8_t __a, uint32x4_t __b, mve_pred16_t __p) -{ - return __builtin_mve_vqmovntq_m_uv4si (__a, __b, __p); -} - __extension__ extern __inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vrev32q_m_u16 (uint16x8_t __inactive, uint16x8_t __a, mve_pred16_t __p) @@ -14366,20 +14034,6 @@ __arm_vaddvaq (int32_t __a, int32x4_t __b) return __arm_vaddvaq_s32 (__a, __b); } -__extension__ extern __inline uint8x16_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vqmovntq (uint8x16_t __a, uint16x8_t __b) -{ - return __arm_vqmovntq_u16 (__a, __b); -} - -__extension__ extern __inline uint8x16_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vqmovnbq (uint8x16_t __a, uint16x8_t __b) -{ - return __arm_vqmovnbq_u16 (__a, __b); -} - __extension__ extern __inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vmulltq_poly (uint8x16_t __a, uint8x16_t __b) @@ -14394,20 +14048,6 @@ __arm_vmullbq_poly (uint8x16_t __a, uint8x16_t __b) return __arm_vmullbq_poly_p8 (__a, __b); } -__extension__ extern __inline uint8x16_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vmovntq (uint8x16_t __a, uint16x8_t __b) -{ - return __arm_vmovntq_u16 (__a, __b); -} - -__extension__ extern __inline uint8x16_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vmovnbq (uint8x16_t __a, uint16x8_t __b) -{ - return __arm_vmovnbq_u16 (__a, __b); -} - __extension__ extern __inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vmlaldavq (uint16x8_t __a, uint16x8_t __b) @@ -14415,20 +14055,6 @@ __arm_vmlaldavq (uint16x8_t __a, uint16x8_t __b) return __arm_vmlaldavq_u16 (__a, __b); } -__extension__ extern __inline uint8x16_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vqmovuntq (uint8x16_t __a, int16x8_t __b) -{ - return __arm_vqmovuntq_s16 (__a, __b); -} - -__extension__ extern __inline uint8x16_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vqmovunbq (uint8x16_t __a, int16x8_t __b) -{ - return __arm_vqmovunbq_s16 (__a, __b); -} - __extension__ extern __inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vshlltq (uint8x16_t __a, const int __imm) @@ -14450,20 +14076,6 @@ __arm_vbicq (uint16x8_t __a, const int __imm) return __arm_vbicq_n_u16 (__a, __imm); } -__extension__ extern __inline int8x16_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vqmovntq (int8x16_t __a, int16x8_t __b) -{ - return __arm_vqmovntq_s16 (__a, __b); -} - -__extension__ extern __inline int8x16_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vqmovnbq (int8x16_t __a, int16x8_t __b) -{ - return __arm_vqmovnbq_s16 (__a, __b); -} - __extension__ extern __inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vqdmulltq (int16x8_t __a, int16x8_t __b) @@ -14492,20 +14104,6 @@ __arm_vqdmullbq (int16x8_t __a, int16_t __b) return __arm_vqdmullbq_n_s16 (__a, __b); } -__extension__ extern __inline int8x16_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vmovntq (int8x16_t __a, int16x8_t __b) -{ - return __arm_vmovntq_s16 (__a, __b); -} - -__extension__ extern __inline int8x16_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vmovnbq (int8x16_t __a, int16x8_t __b) -{ - return __arm_vmovnbq_s16 (__a, __b); -} - __extension__ extern __inline int64_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vmlsldavxq (int16x8_t __a, int16x8_t __b) @@ -14555,20 +14153,6 @@ __arm_vbicq (int16x8_t __a, const int __imm) return __arm_vbicq_n_s16 (__a, __imm); } -__extension__ extern __inline uint16x8_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vqmovntq (uint16x8_t __a, uint32x4_t __b) -{ - return __arm_vqmovntq_u32 (__a, __b); -} - -__extension__ extern __inline uint16x8_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vqmovnbq (uint16x8_t __a, uint32x4_t __b) -{ - return __arm_vqmovnbq_u32 (__a, __b); -} - __extension__ extern __inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vmulltq_poly (uint16x8_t __a, uint16x8_t __b) @@ -14583,20 +14167,6 @@ __arm_vmullbq_poly (uint16x8_t __a, uint16x8_t __b) return __arm_vmullbq_poly_p16 (__a, __b); } -__extension__ extern __inline uint16x8_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vmovntq (uint16x8_t __a, uint32x4_t __b) -{ - return __arm_vmovntq_u32 (__a, __b); -} - -__extension__ extern __inline uint16x8_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vmovnbq (uint16x8_t __a, uint32x4_t __b) -{ - return __arm_vmovnbq_u32 (__a, __b); -} - __extension__ extern __inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vmlaldavq (uint32x4_t __a, uint32x4_t __b) @@ -14604,20 +14174,6 @@ __arm_vmlaldavq (uint32x4_t __a, uint32x4_t __b) return __arm_vmlaldavq_u32 (__a, __b); } -__extension__ extern __inline uint16x8_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vqmovuntq (uint16x8_t __a, int32x4_t __b) -{ - return __arm_vqmovuntq_s32 (__a, __b); -} - -__extension__ extern __inline uint16x8_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vqmovunbq (uint16x8_t __a, int32x4_t __b) -{ - return __arm_vqmovunbq_s32 (__a, __b); -} - __extension__ extern __inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vshlltq (uint16x8_t __a, const int __imm) @@ -14639,20 +14195,6 @@ __arm_vbicq (uint32x4_t __a, const int __imm) return __arm_vbicq_n_u32 (__a, __imm); } -__extension__ extern __inline int16x8_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vqmovntq (int16x8_t __a, int32x4_t __b) -{ - return __arm_vqmovntq_s32 (__a, __b); -} - -__extension__ extern __inline int16x8_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vqmovnbq (int16x8_t __a, int32x4_t __b) -{ - return __arm_vqmovnbq_s32 (__a, __b); -} - __extension__ extern __inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vqdmulltq (int32x4_t __a, int32x4_t __b) @@ -14681,20 +14223,6 @@ __arm_vqdmullbq (int32x4_t __a, int32_t __b) return __arm_vqdmullbq_n_s32 (__a, __b); } -__extension__ extern __inline int16x8_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vmovntq (int16x8_t __a, int32x4_t __b) -{ - return __arm_vmovntq_s32 (__a, __b); -} - -__extension__ extern __inline int16x8_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vmovnbq (int16x8_t __a, int32x4_t __b) -{ - return __arm_vmovnbq_s32 (__a, __b); -} - __extension__ extern __inline int64_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vmlsldavxq (int32x4_t __a, int32x4_t __b) @@ -16522,34 +16050,6 @@ __arm_vmovltq_m (int16x8_t __inactive, int8x16_t __a, mve_pred16_t __p) return __arm_vmovltq_m_s8 (__inactive, __a, __p); } -__extension__ extern __inline int8x16_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vmovnbq_m (int8x16_t __a, int16x8_t __b, mve_pred16_t __p) -{ - return __arm_vmovnbq_m_s16 (__a, __b, __p); -} - -__extension__ extern __inline int8x16_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vmovntq_m (int8x16_t __a, int16x8_t __b, mve_pred16_t __p) -{ - return __arm_vmovntq_m_s16 (__a, __b, __p); -} - -__extension__ extern __inline int8x16_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vqmovnbq_m (int8x16_t __a, int16x8_t __b, mve_pred16_t __p) -{ - return __arm_vqmovnbq_m_s16 (__a, __b, __p); -} - -__extension__ extern __inline int8x16_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vqmovntq_m (int8x16_t __a, int16x8_t __b, mve_pred16_t __p) -{ - return __arm_vqmovntq_m_s16 (__a, __b, __p); -} - __extension__ extern __inline int8x16_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vrev32q_m (int8x16_t __inactive, int8x16_t __a, mve_pred16_t __p) @@ -16564,20 +16064,6 @@ __arm_vmvnq_m (uint16x8_t __inactive, const int __imm, mve_pred16_t __p) return __arm_vmvnq_m_n_u16 (__inactive, __imm, __p); } -__extension__ extern __inline uint8x16_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vqmovunbq_m (uint8x16_t __a, int16x8_t __b, mve_pred16_t __p) -{ - return __arm_vqmovunbq_m_s16 (__a, __b, __p); -} - -__extension__ extern __inline uint8x16_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vqmovuntq_m (uint8x16_t __a, int16x8_t __b, mve_pred16_t __p) -{ - return __arm_vqmovuntq_m_s16 (__a, __b, __p); -} - __extension__ extern __inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vmlaldavaq (uint64_t __a, uint16x8_t __b, uint16x8_t __c) @@ -16606,34 +16092,6 @@ __arm_vmovltq_m (uint16x8_t __inactive, uint8x16_t __a, mve_pred16_t __p) return __arm_vmovltq_m_u8 (__inactive, __a, __p); } -__extension__ extern __inline uint8x16_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vmovnbq_m (uint8x16_t __a, uint16x8_t __b, mve_pred16_t __p) -{ - return __arm_vmovnbq_m_u16 (__a, __b, __p); -} - -__extension__ extern __inline uint8x16_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vmovntq_m (uint8x16_t __a, uint16x8_t __b, mve_pred16_t __p) -{ - return __arm_vmovntq_m_u16 (__a, __b, __p); -} - -__extension__ extern __inline uint8x16_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vqmovnbq_m (uint8x16_t __a, uint16x8_t __b, mve_pred16_t __p) -{ - return __arm_vqmovnbq_m_u16 (__a, __b, __p); -} - -__extension__ extern __inline uint8x16_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vqmovntq_m (uint8x16_t __a, uint16x8_t __b, mve_pred16_t __p) -{ - return __arm_vqmovntq_m_u16 (__a, __b, __p); -} - __extension__ extern __inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vrev32q_m (uint8x16_t __inactive, uint8x16_t __a, mve_pred16_t __p) @@ -16718,34 +16176,6 @@ __arm_vmovltq_m (int32x4_t __inactive, int16x8_t __a, mve_pred16_t __p) return __arm_vmovltq_m_s16 (__inactive, __a, __p); } -__extension__ extern __inline int16x8_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vmovnbq_m (int16x8_t __a, int32x4_t __b, mve_pred16_t __p) -{ - return __arm_vmovnbq_m_s32 (__a, __b, __p); -} - -__extension__ extern __inline int16x8_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vmovntq_m (int16x8_t __a, int32x4_t __b, mve_pred16_t __p) -{ - return __arm_vmovntq_m_s32 (__a, __b, __p); -} - -__extension__ extern __inline int16x8_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vqmovnbq_m (int16x8_t __a, int32x4_t __b, mve_pred16_t __p) -{ - return __arm_vqmovnbq_m_s32 (__a, __b, __p); -} - -__extension__ extern __inline int16x8_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vqmovntq_m (int16x8_t __a, int32x4_t __b, mve_pred16_t __p) -{ - return __arm_vqmovntq_m_s32 (__a, __b, __p); -} - __extension__ extern __inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vrev32q_m (int16x8_t __inactive, int16x8_t __a, mve_pred16_t __p) @@ -16760,20 +16190,6 @@ __arm_vmvnq_m (uint32x4_t __inactive, const int __imm, mve_pred16_t __p) return __arm_vmvnq_m_n_u32 (__inactive, __imm, __p); } -__extension__ extern __inline uint16x8_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vqmovunbq_m (uint16x8_t __a, int32x4_t __b, mve_pred16_t __p) -{ - return __arm_vqmovunbq_m_s32 (__a, __b, __p); -} - -__extension__ extern __inline uint16x8_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vqmovuntq_m (uint16x8_t __a, int32x4_t __b, mve_pred16_t __p) -{ - return __arm_vqmovuntq_m_s32 (__a, __b, __p); -} - __extension__ extern __inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vmlaldavaq (uint64_t __a, uint32x4_t __b, uint32x4_t __c) @@ -16802,34 +16218,6 @@ __arm_vmovltq_m (uint32x4_t __inactive, uint16x8_t __a, mve_pred16_t __p) return __arm_vmovltq_m_u16 (__inactive, __a, __p); } -__extension__ extern __inline uint16x8_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vmovnbq_m (uint16x8_t __a, uint32x4_t __b, mve_pred16_t __p) -{ - return __arm_vmovnbq_m_u32 (__a, __b, __p); -} - -__extension__ extern __inline uint16x8_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vmovntq_m (uint16x8_t __a, uint32x4_t __b, mve_pred16_t __p) -{ - return __arm_vmovntq_m_u32 (__a, __b, __p); -} - -__extension__ extern __inline uint16x8_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vqmovnbq_m (uint16x8_t __a, uint32x4_t __b, mve_pred16_t __p) -{ - return __arm_vqmovnbq_m_u32 (__a, __b, __p); -} - -__extension__ extern __inline uint16x8_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vqmovntq_m (uint16x8_t __a, uint32x4_t __b, mve_pred16_t __p) -{ - return __arm_vqmovntq_m_u32 (__a, __b, __p); -} - __extension__ extern __inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vrev32q_m (uint16x8_t __inactive, uint16x8_t __a, mve_pred16_t __p) @@ -23169,28 +22557,6 @@ extern void *__ARM_undef; int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlaldavxq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlaldavxq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));}) -#define __arm_vqmovuntq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ - __typeof(p1) __p1 = (p1); \ - _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqmovuntq_s16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int16x8_t)), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqmovuntq_s32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32x4_t)));}) - -#define __arm_vqmovntq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ - __typeof(p1) __p1 = (p1); \ - _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqmovntq_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t)), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqmovntq_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t)), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vqmovntq_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t)), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vqmovntq_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t)));}) - -#define __arm_vqmovnbq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ - __typeof(p1) __p1 = (p1); \ - _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqmovnbq_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t)), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqmovnbq_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t)), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vqmovnbq_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t)), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vqmovnbq_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t)));}) - #define __arm_vqdmulltq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ @@ -23199,12 +22565,6 @@ extern void *__ARM_undef; int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmulltq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmulltq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));}) -#define __arm_vqmovunbq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ - __typeof(p1) __p1 = (p1); \ - _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqmovunbq_s16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int16x8_t)), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqmovunbq_s32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32x4_t)));}) - #define __arm_vqdmullbq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ @@ -23263,22 +22623,6 @@ extern void *__ARM_undef; int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmaxaq_s16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmaxaq_s32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));}) -#define __arm_vmovntq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ - __typeof(p1) __p1 = (p1); \ - _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vmovntq_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t)), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vmovntq_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t)), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vmovntq_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t)), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vmovntq_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t)));}) - -#define __arm_vmovnbq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ - __typeof(p1) __p1 = (p1); \ - _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vmovnbq_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t)), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vmovnbq_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t)), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vmovnbq_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t)), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vmovnbq_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t)));}) - #define __arm_vmullbq_int(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ @@ -23465,22 +22809,6 @@ extern void *__ARM_undef; int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint8x16_t]: __arm_vmovlbq_m_u8 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint16x8_t]: __arm_vmovlbq_m_u16 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint16x8_t), p2));}) -#define __arm_vmovnbq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ - __typeof(p1) __p1 = (p1); \ - _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vmovnbq_m_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vmovnbq_m_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vmovnbq_m_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vmovnbq_m_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) - -#define __arm_vmovntq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ - __typeof(p1) __p1 = (p1); \ - _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vmovntq_m_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vmovntq_m_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vmovntq_m_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vmovntq_m_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) - #define __arm_vmovltq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ @@ -23785,34 +23113,6 @@ extern void *__ARM_undef; int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vrev16q_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vrev16q_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2));}) -#define __arm_vqmovnbq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ - __typeof(p1) __p1 = (p1); \ - _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqmovnbq_m_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqmovnbq_m_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vqmovnbq_m_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vqmovnbq_m_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) - -#define __arm_vqmovntq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ - __typeof(p1) __p1 = (p1); \ - _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqmovntq_m_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqmovntq_m_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vqmovntq_m_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vqmovntq_m_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) - -#define __arm_vqmovunbq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ - __typeof(p1) __p1 = (p1); \ - _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqmovunbq_m_s16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqmovunbq_m_s32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2));}) - -#define __arm_vqmovuntq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ - __typeof(p1) __p1 = (p1); \ - _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqmovuntq_m_s16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqmovuntq_m_s32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2));}) - #define __arm_vcmpgeq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ @@ -24655,22 +23955,6 @@ extern void *__ARM_undef; int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce3(p1, int)), \ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce3(p1, int)));}) -#define __arm_vqmovntq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ - __typeof(p1) __p1 = (p1); \ - _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqmovntq_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t)), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqmovntq_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t)), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vqmovntq_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t)), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vqmovntq_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t)));}) - -#define __arm_vqmovnbq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ - __typeof(p1) __p1 = (p1); \ - _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqmovnbq_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t)), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqmovnbq_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t)), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vqmovnbq_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t)), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vqmovnbq_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t)));}) - #define __arm_vmulltq_poly(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ @@ -24683,34 +23967,12 @@ extern void *__ARM_undef; int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmullbq_poly_p8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmullbq_poly_p16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)));}) -#define __arm_vmovntq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ - __typeof(p1) __p1 = (p1); \ - _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vmovntq_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t)), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vmovntq_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t)), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vmovntq_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t)), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vmovntq_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t)));}) - -#define __arm_vmovnbq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ - __typeof(p1) __p1 = (p1); \ - _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vmovnbq_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t)), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vmovnbq_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t)), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vmovnbq_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t)), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vmovnbq_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t)));}) - #define __arm_vmlaldavxq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlaldavxq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlaldavxq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));}) -#define __arm_vqmovuntq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ - __typeof(p1) __p1 = (p1); \ - _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqmovuntq_s16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int16x8_t)), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqmovuntq_s32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32x4_t)));}) - #define __arm_vshlltq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ int (*)[__ARM_mve_type_int8x16_t]: __arm_vshlltq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), p1), \ @@ -24725,12 +23987,6 @@ extern void *__ARM_undef; int (*)[__ARM_mve_type_uint8x16_t]: __arm_vshllbq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), p1), \ int (*)[__ARM_mve_type_uint16x8_t]: __arm_vshllbq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1));}) -#define __arm_vqmovunbq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ - __typeof(p1) __p1 = (p1); \ - _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqmovunbq_s16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int16x8_t)), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqmovunbq_s32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32x4_t)));}) - #define __arm_vqdmulltq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ @@ -25084,22 +24340,6 @@ extern void *__ARM_undef; int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint8x16_t]: __arm_vmovlbq_m_u8 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint16x8_t]: __arm_vmovlbq_m_u16 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint16x8_t), p2));}) -#define __arm_vmovnbq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ - __typeof(p1) __p1 = (p1); \ - _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vmovnbq_m_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vmovnbq_m_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vmovnbq_m_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vmovnbq_m_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) - -#define __arm_vmovntq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ - __typeof(p1) __p1 = (p1); \ - _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vmovntq_m_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vmovntq_m_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vmovntq_m_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vmovntq_m_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) - #define __arm_vrev32q_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ @@ -25114,28 +24354,6 @@ extern void *__ARM_undef; int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vrev16q_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vrev16q_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2));}) -#define __arm_vqmovuntq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ - __typeof(p1) __p1 = (p1); \ - _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqmovuntq_m_s16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqmovuntq_m_s32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2));}) - -#define __arm_vqmovntq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ - __typeof(p1) __p1 = (p1); \ - _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqmovntq_m_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqmovntq_m_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vqmovntq_m_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vqmovntq_m_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) - -#define __arm_vqmovnbq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ - __typeof(p1) __p1 = (p1); \ - _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqmovnbq_m_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqmovnbq_m_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vqmovnbq_m_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vqmovnbq_m_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) - #define __arm_vmovltq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ @@ -25144,12 +24362,6 @@ extern void *__ARM_undef; int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint8x16_t]: __arm_vmovltq_m_u8 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint16x8_t]: __arm_vmovltq_m_u16 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint16x8_t), p2));}) -#define __arm_vqmovunbq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ - __typeof(p1) __p1 = (p1); \ - _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqmovunbq_m_s16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqmovunbq_m_s32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2));}) - #define __arm_vabavq_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ __typeof(p2) __p2 = (p2); \ -- 2.34.1