From: Christophe Lyon <christophe.lyon@arm.com>
To: <gcc-patches@gcc.gnu.org>, <kyrylo.tkachov@arm.com>,
<richard.earnshaw@arm.com>, <richard.sandiford@arm.com>
Cc: Christophe Lyon <christophe.lyon@arm.com>
Subject: [PATCH 16/16] arm: [MVE intrinsics] rework vmaxaq vminaq
Date: Tue, 9 May 2023 14:19:37 +0200 [thread overview]
Message-ID: <20230509121937.206183-16-christophe.lyon@arm.com> (raw)
In-Reply-To: <20230509121937.206183-1-christophe.lyon@arm.com>
Implement vmaxaq and vminaq using the new MVE builtins framework.
2022-09-08 Christophe Lyon <christophe.lyon@arm.com>
gcc/
* config/arm/arm-mve-builtins-base.cc (vmaxaq, vminaq): New.
* config/arm/arm-mve-builtins-base.def (vmaxaq, vminaq): New.
* config/arm/arm-mve-builtins-base.h (vmaxaq, vminaq): New.
* config/arm/arm-mve-builtins.cc
(function_instance::has_inactive_argument): Handle vmaxaq and
vminaq.
* config/arm/arm_mve.h (vminaq): Remove.
(vmaxaq): Remove.
(vminaq_m): Remove.
(vmaxaq_m): Remove.
(vminaq_s8): Remove.
(vmaxaq_s8): Remove.
(vminaq_s16): Remove.
(vmaxaq_s16): Remove.
(vminaq_s32): Remove.
(vmaxaq_s32): Remove.
(vminaq_m_s8): Remove.
(vmaxaq_m_s8): Remove.
(vminaq_m_s16): Remove.
(vmaxaq_m_s16): Remove.
(vminaq_m_s32): Remove.
(vmaxaq_m_s32): Remove.
(__arm_vminaq_s8): Remove.
(__arm_vmaxaq_s8): Remove.
(__arm_vminaq_s16): Remove.
(__arm_vmaxaq_s16): Remove.
(__arm_vminaq_s32): Remove.
(__arm_vmaxaq_s32): Remove.
(__arm_vminaq_m_s8): Remove.
(__arm_vmaxaq_m_s8): Remove.
(__arm_vminaq_m_s16): Remove.
(__arm_vmaxaq_m_s16): Remove.
(__arm_vminaq_m_s32): Remove.
(__arm_vmaxaq_m_s32): Remove.
(__arm_vminaq): Remove.
(__arm_vmaxaq): Remove.
(__arm_vminaq_m): Remove.
(__arm_vmaxaq_m): Remove.
---
gcc/config/arm/arm-mve-builtins-base.cc | 2 +
gcc/config/arm/arm-mve-builtins-base.def | 2 +
gcc/config/arm/arm-mve-builtins-base.h | 2 +
gcc/config/arm/arm-mve-builtins.cc | 2 +
gcc/config/arm/arm_mve.h | 240 -----------------------
5 files changed, 8 insertions(+), 240 deletions(-)
diff --git a/gcc/config/arm/arm-mve-builtins-base.cc b/gcc/config/arm/arm-mve-builtins-base.cc
index 8082e97a7ea..edca0d9ac6c 100644
--- a/gcc/config/arm/arm-mve-builtins-base.cc
+++ b/gcc/config/arm/arm-mve-builtins-base.cc
@@ -242,6 +242,7 @@ FUNCTION_WITH_RTX_M (veorq, XOR, VEORQ)
FUNCTION_WITH_M_N_NO_F (vhaddq, VHADDQ)
FUNCTION_WITH_M_N_NO_F (vhsubq, VHSUBQ)
FUNCTION_PRED_P_S (vmaxavq, VMAXAVQ)
+FUNCTION_WITHOUT_N_NO_U_F (vmaxaq, VMAXAQ)
FUNCTION_ONLY_F (vmaxnmaq, VMAXNMAQ)
FUNCTION_PRED_P_F (vmaxnmavq, VMAXNMAVQ)
FUNCTION (vmaxnmq, unspec_based_mve_function_exact_insn, (UNKNOWN, UNKNOWN, SMAX, -1, -1, -1, -1, -1, VMAXNMQ_M_F, -1, -1, -1))
@@ -249,6 +250,7 @@ FUNCTION_PRED_P_F (vmaxnmvq, VMAXNMVQ)
FUNCTION_WITH_RTX_M_NO_F (vmaxq, SMAX, UMAX, VMAXQ)
FUNCTION_PRED_P_S_U (vmaxvq, VMAXVQ)
FUNCTION_PRED_P_S (vminavq, VMINAVQ)
+FUNCTION_WITHOUT_N_NO_U_F (vminaq, VMINAQ)
FUNCTION_ONLY_F (vminnmaq, VMINNMAQ)
FUNCTION_PRED_P_F (vminnmavq, VMINNMAVQ)
FUNCTION (vminnmq, unspec_based_mve_function_exact_insn, (UNKNOWN, UNKNOWN, SMIN, -1, -1, -1, -1, -1, VMINNMQ_M_F, -1, -1, -1))
diff --git a/gcc/config/arm/arm-mve-builtins-base.def b/gcc/config/arm/arm-mve-builtins-base.def
index 45e2135452b..48a07c8d888 100644
--- a/gcc/config/arm/arm-mve-builtins-base.def
+++ b/gcc/config/arm/arm-mve-builtins-base.def
@@ -28,9 +28,11 @@ DEF_MVE_FUNCTION (vcreateq, create, all_integer_with_64, none)
DEF_MVE_FUNCTION (veorq, binary, all_integer, mx_or_none)
DEF_MVE_FUNCTION (vhaddq, binary_opt_n, all_integer, mx_or_none)
DEF_MVE_FUNCTION (vhsubq, binary_opt_n, all_integer, mx_or_none)
+DEF_MVE_FUNCTION (vmaxaq, binary_maxamina, all_signed, m_or_none)
DEF_MVE_FUNCTION (vmaxavq, binary_maxavminav, all_signed, p_or_none)
DEF_MVE_FUNCTION (vmaxq, binary, all_integer, mx_or_none)
DEF_MVE_FUNCTION (vmaxvq, binary_maxvminv, all_integer, p_or_none)
+DEF_MVE_FUNCTION (vminaq, binary_maxamina, all_signed, m_or_none)
DEF_MVE_FUNCTION (vminavq, binary_maxavminav, all_signed, p_or_none)
DEF_MVE_FUNCTION (vminq, binary, all_integer, mx_or_none)
DEF_MVE_FUNCTION (vminvq, binary_maxvminv, all_integer, p_or_none)
diff --git a/gcc/config/arm/arm-mve-builtins-base.h b/gcc/config/arm/arm-mve-builtins-base.h
index 0242c33ac94..31417435f6f 100644
--- a/gcc/config/arm/arm-mve-builtins-base.h
+++ b/gcc/config/arm/arm-mve-builtins-base.h
@@ -33,6 +33,7 @@ extern const function_base *const vcreateq;
extern const function_base *const veorq;
extern const function_base *const vhaddq;
extern const function_base *const vhsubq;
+extern const function_base *const vmaxaq;
extern const function_base *const vmaxavq;
extern const function_base *const vmaxnmaq;
extern const function_base *const vmaxnmavq;
@@ -40,6 +41,7 @@ extern const function_base *const vmaxnmq;
extern const function_base *const vmaxnmvq;
extern const function_base *const vmaxq;
extern const function_base *const vmaxvq;
+extern const function_base *const vminaq;
extern const function_base *const vminavq;
extern const function_base *const vminnmaq;
extern const function_base *const vminnmavq;
diff --git a/gcc/config/arm/arm-mve-builtins.cc b/gcc/config/arm/arm-mve-builtins.cc
index 5752434c968..9dc762c9fc0 100644
--- a/gcc/config/arm/arm-mve-builtins.cc
+++ b/gcc/config/arm/arm-mve-builtins.cc
@@ -670,7 +670,9 @@ function_instance::has_inactive_argument () const
return false;
if (mode_suffix_id == MODE_r
+ || base == functions::vmaxaq
|| base == functions::vmaxnmaq
+ || base == functions::vminaq
|| base == functions::vminnmaq
|| base == functions::vmovnbq
|| base == functions::vmovntq
diff --git a/gcc/config/arm/arm_mve.h b/gcc/config/arm/arm_mve.h
index d25a9bf69d1..373797689cc 100644
--- a/gcc/config/arm/arm_mve.h
+++ b/gcc/config/arm/arm_mve.h
@@ -65,8 +65,6 @@
#define vbicq(__a, __b) __arm_vbicq(__a, __b)
#define vaddvq_p(__a, __p) __arm_vaddvq_p(__a, __p)
#define vaddvaq(__a, __b) __arm_vaddvaq(__a, __b)
-#define vminaq(__a, __b) __arm_vminaq(__a, __b)
-#define vmaxaq(__a, __b) __arm_vmaxaq(__a, __b)
#define vbrsrq(__a, __b) __arm_vbrsrq(__a, __b)
#define vcmpltq(__a, __b) __arm_vcmpltq(__a, __b)
#define vcmpleq(__a, __b) __arm_vcmpleq(__a, __b)
@@ -115,8 +113,6 @@
#define vaddvaq_p(__a, __b, __p) __arm_vaddvaq_p(__a, __b, __p)
#define vsriq(__a, __b, __imm) __arm_vsriq(__a, __b, __imm)
#define vsliq(__a, __b, __imm) __arm_vsliq(__a, __b, __imm)
-#define vminaq_m(__a, __b, __p) __arm_vminaq_m(__a, __b, __p)
-#define vmaxaq_m(__a, __b, __p) __arm_vmaxaq_m(__a, __b, __p)
#define vcmpltq_m(__a, __b, __p) __arm_vcmpltq_m(__a, __b, __p)
#define vcmpleq_m(__a, __b, __p) __arm_vcmpleq_m(__a, __b, __p)
#define vcmpgtq_m(__a, __b, __p) __arm_vcmpgtq_m(__a, __b, __p)
@@ -468,8 +464,6 @@
#define vbicq_u8(__a, __b) __arm_vbicq_u8(__a, __b)
#define vaddvq_p_u8(__a, __p) __arm_vaddvq_p_u8(__a, __p)
#define vaddvaq_u8(__a, __b) __arm_vaddvaq_u8(__a, __b)
-#define vminaq_s8(__a, __b) __arm_vminaq_s8(__a, __b)
-#define vmaxaq_s8(__a, __b) __arm_vmaxaq_s8(__a, __b)
#define vbrsrq_n_u8(__a, __b) __arm_vbrsrq_n_u8(__a, __b)
#define vcmpneq_n_s8(__a, __b) __arm_vcmpneq_n_s8(__a, __b)
#define vcmpltq_s8(__a, __b) __arm_vcmpltq_s8(__a, __b)
@@ -514,8 +508,6 @@
#define vbicq_u16(__a, __b) __arm_vbicq_u16(__a, __b)
#define vaddvq_p_u16(__a, __p) __arm_vaddvq_p_u16(__a, __p)
#define vaddvaq_u16(__a, __b) __arm_vaddvaq_u16(__a, __b)
-#define vminaq_s16(__a, __b) __arm_vminaq_s16(__a, __b)
-#define vmaxaq_s16(__a, __b) __arm_vmaxaq_s16(__a, __b)
#define vbrsrq_n_u16(__a, __b) __arm_vbrsrq_n_u16(__a, __b)
#define vcmpneq_n_s16(__a, __b) __arm_vcmpneq_n_s16(__a, __b)
#define vcmpltq_s16(__a, __b) __arm_vcmpltq_s16(__a, __b)
@@ -560,8 +552,6 @@
#define vbicq_u32(__a, __b) __arm_vbicq_u32(__a, __b)
#define vaddvq_p_u32(__a, __p) __arm_vaddvq_p_u32(__a, __p)
#define vaddvaq_u32(__a, __b) __arm_vaddvaq_u32(__a, __b)
-#define vminaq_s32(__a, __b) __arm_vminaq_s32(__a, __b)
-#define vmaxaq_s32(__a, __b) __arm_vmaxaq_s32(__a, __b)
#define vbrsrq_n_u32(__a, __b) __arm_vbrsrq_n_u32(__a, __b)
#define vcmpneq_n_s32(__a, __b) __arm_vcmpneq_n_s32(__a, __b)
#define vcmpltq_s32(__a, __b) __arm_vcmpltq_s32(__a, __b)
@@ -717,8 +707,6 @@
#define vaddvaq_p_u8(__a, __b, __p) __arm_vaddvaq_p_u8(__a, __b, __p)
#define vsriq_n_u8(__a, __b, __imm) __arm_vsriq_n_u8(__a, __b, __imm)
#define vsliq_n_u8(__a, __b, __imm) __arm_vsliq_n_u8(__a, __b, __imm)
-#define vminaq_m_s8(__a, __b, __p) __arm_vminaq_m_s8(__a, __b, __p)
-#define vmaxaq_m_s8(__a, __b, __p) __arm_vmaxaq_m_s8(__a, __b, __p)
#define vcmpneq_m_s8(__a, __b, __p) __arm_vcmpneq_m_s8(__a, __b, __p)
#define vcmpneq_m_n_s8(__a, __b, __p) __arm_vcmpneq_m_n_s8(__a, __b, __p)
#define vcmpltq_m_s8(__a, __b, __p) __arm_vcmpltq_m_s8(__a, __b, __p)
@@ -779,8 +767,6 @@
#define vaddvaq_p_u16(__a, __b, __p) __arm_vaddvaq_p_u16(__a, __b, __p)
#define vsriq_n_u16(__a, __b, __imm) __arm_vsriq_n_u16(__a, __b, __imm)
#define vsliq_n_u16(__a, __b, __imm) __arm_vsliq_n_u16(__a, __b, __imm)
-#define vminaq_m_s16(__a, __b, __p) __arm_vminaq_m_s16(__a, __b, __p)
-#define vmaxaq_m_s16(__a, __b, __p) __arm_vmaxaq_m_s16(__a, __b, __p)
#define vcmpneq_m_s16(__a, __b, __p) __arm_vcmpneq_m_s16(__a, __b, __p)
#define vcmpneq_m_n_s16(__a, __b, __p) __arm_vcmpneq_m_n_s16(__a, __b, __p)
#define vcmpltq_m_s16(__a, __b, __p) __arm_vcmpltq_m_s16(__a, __b, __p)
@@ -841,8 +827,6 @@
#define vaddvaq_p_u32(__a, __b, __p) __arm_vaddvaq_p_u32(__a, __b, __p)
#define vsriq_n_u32(__a, __b, __imm) __arm_vsriq_n_u32(__a, __b, __imm)
#define vsliq_n_u32(__a, __b, __imm) __arm_vsliq_n_u32(__a, __b, __imm)
-#define vminaq_m_s32(__a, __b, __p) __arm_vminaq_m_s32(__a, __b, __p)
-#define vmaxaq_m_s32(__a, __b, __p) __arm_vmaxaq_m_s32(__a, __b, __p)
#define vcmpneq_m_s32(__a, __b, __p) __arm_vcmpneq_m_s32(__a, __b, __p)
#define vcmpneq_m_n_s32(__a, __b, __p) __arm_vcmpneq_m_n_s32(__a, __b, __p)
#define vcmpltq_m_s32(__a, __b, __p) __arm_vcmpltq_m_s32(__a, __b, __p)
@@ -2321,20 +2305,6 @@ __arm_vaddvaq_u8 (uint32_t __a, uint8x16_t __b)
return __builtin_mve_vaddvaq_uv16qi (__a, __b);
}
-__extension__ extern __inline uint8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vminaq_s8 (uint8x16_t __a, int8x16_t __b)
-{
- return __builtin_mve_vminaq_sv16qi (__a, __b);
-}
-
-__extension__ extern __inline uint8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vmaxaq_s8 (uint8x16_t __a, int8x16_t __b)
-{
- return __builtin_mve_vmaxaq_sv16qi (__a, __b);
-}
-
__extension__ extern __inline uint8x16_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vbrsrq_n_u8 (uint8x16_t __a, int32_t __b)
@@ -2645,20 +2615,6 @@ __arm_vaddvaq_u16 (uint32_t __a, uint16x8_t __b)
return __builtin_mve_vaddvaq_uv8hi (__a, __b);
}
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vminaq_s16 (uint16x8_t __a, int16x8_t __b)
-{
- return __builtin_mve_vminaq_sv8hi (__a, __b);
-}
-
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vmaxaq_s16 (uint16x8_t __a, int16x8_t __b)
-{
- return __builtin_mve_vmaxaq_sv8hi (__a, __b);
-}
-
__extension__ extern __inline uint16x8_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vbrsrq_n_u16 (uint16x8_t __a, int32_t __b)
@@ -2969,20 +2925,6 @@ __arm_vaddvaq_u32 (uint32_t __a, uint32x4_t __b)
return __builtin_mve_vaddvaq_uv4si (__a, __b);
}
-__extension__ extern __inline uint32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vminaq_s32 (uint32x4_t __a, int32x4_t __b)
-{
- return __builtin_mve_vminaq_sv4si (__a, __b);
-}
-
-__extension__ extern __inline uint32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vmaxaq_s32 (uint32x4_t __a, int32x4_t __b)
-{
- return __builtin_mve_vmaxaq_sv4si (__a, __b);
-}
-
__extension__ extern __inline uint32x4_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vbrsrq_n_u32 (uint32x4_t __a, int32_t __b)
@@ -3716,20 +3658,6 @@ __arm_vsliq_n_u8 (uint8x16_t __a, uint8x16_t __b, const int __imm)
return __builtin_mve_vsliq_n_uv16qi (__a, __b, __imm);
}
-__extension__ extern __inline uint8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vminaq_m_s8 (uint8x16_t __a, int8x16_t __b, mve_pred16_t __p)
-{
- return __builtin_mve_vminaq_m_sv16qi (__a, __b, __p);
-}
-
-__extension__ extern __inline uint8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vmaxaq_m_s8 (uint8x16_t __a, int8x16_t __b, mve_pred16_t __p)
-{
- return __builtin_mve_vmaxaq_m_sv16qi (__a, __b, __p);
-}
-
__extension__ extern __inline mve_pred16_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vcmpneq_m_s8 (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
@@ -4150,20 +4078,6 @@ __arm_vsliq_n_u16 (uint16x8_t __a, uint16x8_t __b, const int __imm)
return __builtin_mve_vsliq_n_uv8hi (__a, __b, __imm);
}
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vminaq_m_s16 (uint16x8_t __a, int16x8_t __b, mve_pred16_t __p)
-{
- return __builtin_mve_vminaq_m_sv8hi (__a, __b, __p);
-}
-
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vmaxaq_m_s16 (uint16x8_t __a, int16x8_t __b, mve_pred16_t __p)
-{
- return __builtin_mve_vmaxaq_m_sv8hi (__a, __b, __p);
-}
-
__extension__ extern __inline mve_pred16_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vcmpneq_m_s16 (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
@@ -4584,20 +4498,6 @@ __arm_vsliq_n_u32 (uint32x4_t __a, uint32x4_t __b, const int __imm)
return __builtin_mve_vsliq_n_uv4si (__a, __b, __imm);
}
-__extension__ extern __inline uint32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vminaq_m_s32 (uint32x4_t __a, int32x4_t __b, mve_pred16_t __p)
-{
- return __builtin_mve_vminaq_m_sv4si (__a, __b, __p);
-}
-
-__extension__ extern __inline uint32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vmaxaq_m_s32 (uint32x4_t __a, int32x4_t __b, mve_pred16_t __p)
-{
- return __builtin_mve_vmaxaq_m_sv4si (__a, __b, __p);
-}
-
__extension__ extern __inline mve_pred16_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vcmpneq_m_s32 (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
@@ -12254,20 +12154,6 @@ __arm_vaddvaq (uint32_t __a, uint8x16_t __b)
return __arm_vaddvaq_u8 (__a, __b);
}
-__extension__ extern __inline uint8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vminaq (uint8x16_t __a, int8x16_t __b)
-{
- return __arm_vminaq_s8 (__a, __b);
-}
-
-__extension__ extern __inline uint8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vmaxaq (uint8x16_t __a, int8x16_t __b)
-{
- return __arm_vmaxaq_s8 (__a, __b);
-}
-
__extension__ extern __inline uint8x16_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vbrsrq (uint8x16_t __a, int32_t __b)
@@ -12576,20 +12462,6 @@ __arm_vaddvaq (uint32_t __a, uint16x8_t __b)
return __arm_vaddvaq_u16 (__a, __b);
}
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vminaq (uint16x8_t __a, int16x8_t __b)
-{
- return __arm_vminaq_s16 (__a, __b);
-}
-
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vmaxaq (uint16x8_t __a, int16x8_t __b)
-{
- return __arm_vmaxaq_s16 (__a, __b);
-}
-
__extension__ extern __inline uint16x8_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vbrsrq (uint16x8_t __a, int32_t __b)
@@ -12898,20 +12770,6 @@ __arm_vaddvaq (uint32_t __a, uint32x4_t __b)
return __arm_vaddvaq_u32 (__a, __b);
}
-__extension__ extern __inline uint32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vminaq (uint32x4_t __a, int32x4_t __b)
-{
- return __arm_vminaq_s32 (__a, __b);
-}
-
-__extension__ extern __inline uint32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vmaxaq (uint32x4_t __a, int32x4_t __b)
-{
- return __arm_vmaxaq_s32 (__a, __b);
-}
-
__extension__ extern __inline uint32x4_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vbrsrq (uint32x4_t __a, int32_t __b)
@@ -13605,20 +13463,6 @@ __arm_vsliq (uint8x16_t __a, uint8x16_t __b, const int __imm)
return __arm_vsliq_n_u8 (__a, __b, __imm);
}
-__extension__ extern __inline uint8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vminaq_m (uint8x16_t __a, int8x16_t __b, mve_pred16_t __p)
-{
- return __arm_vminaq_m_s8 (__a, __b, __p);
-}
-
-__extension__ extern __inline uint8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vmaxaq_m (uint8x16_t __a, int8x16_t __b, mve_pred16_t __p)
-{
- return __arm_vmaxaq_m_s8 (__a, __b, __p);
-}
-
__extension__ extern __inline mve_pred16_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vcmpneq_m (int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
@@ -14039,20 +13883,6 @@ __arm_vsliq (uint16x8_t __a, uint16x8_t __b, const int __imm)
return __arm_vsliq_n_u16 (__a, __b, __imm);
}
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vminaq_m (uint16x8_t __a, int16x8_t __b, mve_pred16_t __p)
-{
- return __arm_vminaq_m_s16 (__a, __b, __p);
-}
-
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vmaxaq_m (uint16x8_t __a, int16x8_t __b, mve_pred16_t __p)
-{
- return __arm_vmaxaq_m_s16 (__a, __b, __p);
-}
-
__extension__ extern __inline mve_pred16_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vcmpneq_m (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
@@ -14473,20 +14303,6 @@ __arm_vsliq (uint32x4_t __a, uint32x4_t __b, const int __imm)
return __arm_vsliq_n_u32 (__a, __b, __imm);
}
-__extension__ extern __inline uint32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vminaq_m (uint32x4_t __a, int32x4_t __b, mve_pred16_t __p)
-{
- return __arm_vminaq_m_s32 (__a, __b, __p);
-}
-
-__extension__ extern __inline uint32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vmaxaq_m (uint32x4_t __a, int32x4_t __b, mve_pred16_t __p)
-{
- return __arm_vmaxaq_m_s32 (__a, __b, __p);
-}
-
__extension__ extern __inline mve_pred16_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vcmpneq_m (int32x4_t __a, int32x4_t __b, mve_pred16_t __p)
@@ -21069,20 +20885,6 @@ extern void *__ARM_undef;
int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhcaddq_rot90_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhcaddq_rot90_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
-#define __arm_vminaq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
- __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vminaq_s8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vminaq_s16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vminaq_s32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
-
-#define __arm_vmaxaq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
- __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmaxaq_s8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmaxaq_s16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmaxaq_s32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
-
#define __arm_vmullbq_int(p0,p1) ({ __typeof(p0) __p0 = (p0); \
__typeof(p1) __p1 = (p1); \
_Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
@@ -21109,20 +20911,6 @@ extern void *__ARM_undef;
int (*)[__ARM_mve_type_uint16x8_t]: __arm_vshlcq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1, p2), \
int (*)[__ARM_mve_type_uint32x4_t]: __arm_vshlcq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), p1, p2));})
-#define __arm_vmaxaq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
- __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmaxaq_m_s8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmaxaq_m_s16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmaxaq_m_s32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2));})
-
-#define __arm_vminaq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
- __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vminaq_m_s8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vminaq_m_s16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vminaq_m_s32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2));})
-
#define __arm_vmlaq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
__typeof(p1) __p1 = (p1); \
__typeof(p2) __p2 = (p2); \
@@ -22254,20 +22042,6 @@ extern void *__ARM_undef;
int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmullbq_int_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmullbq_int_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
-#define __arm_vminaq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
- __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vminaq_s8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vminaq_s16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vminaq_s32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
-
-#define __arm_vmaxaq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
- __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmaxaq_s8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \
- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmaxaq_s16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmaxaq_s32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
-
#define __arm_vhcaddq_rot90(p0,p1) ({ __typeof(p0) __p0 = (p0); \
__typeof(p1) __p1 = (p1); \
_Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
@@ -22624,13 +22398,6 @@ extern void *__ARM_undef;
int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vdupq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), (uint16_t) __p1, p2), \
int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vdupq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), (uint32_t) __p1, p2));})
-#define __arm_vmaxaq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
- __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmaxaq_m_s8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmaxaq_m_s16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmaxaq_m_s32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2));})
-
#define __arm_vmlaq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
__typeof(p1) __p1 = (p1); \
__typeof(p2) __p2 = (p2); \
@@ -22697,13 +22464,6 @@ extern void *__ARM_undef;
int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmladhq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmladhq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)));})
-#define __arm_vminaq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
- __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vminaq_m_s8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vminaq_m_s16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vminaq_m_s32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2));})
-
#define __arm_vmovlbq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
__typeof(p1) __p1 = (p1); \
_Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
--
2.34.1
next prev parent reply other threads:[~2023-05-09 12:20 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-09 12:19 [PATCH 01/16] arm: [MVE intrinsics] add binary_maxvminv shape Christophe Lyon
2023-05-09 12:19 ` [PATCH 02/16] arm: [MVE intrinsics] add binary_maxavminav shape Christophe Lyon
2023-05-09 12:19 ` [PATCH 03/16] arm: [MVE intrinsics add unspec_mve_function_exact_insn_pred_p Christophe Lyon
2023-05-09 12:19 ` [PATCH 04/16] arm: [MVE intrinsics] factorize vmaxvq vminvq vmaxavq vminavq Christophe Lyon
2023-05-09 12:19 ` [PATCH 05/16] arm: [MVE intrinsics] rework " Christophe Lyon
2023-05-09 12:19 ` [PATCH 06/16] arm: add smax/smin expanders for v*hf Christophe Lyon
2023-05-09 13:48 ` Kyrylo Tkachov
2023-05-09 17:18 ` Christophe Lyon
2023-05-09 17:31 ` Kyrylo Tkachov
2023-05-09 17:33 ` Christophe Lyon
2023-05-09 17:34 ` Kyrylo Tkachov
2023-05-09 18:28 ` [PATCH v2 " Christophe Lyon
2023-05-09 12:19 ` [PATCH 07/16] arm: [MVE intrinsics] factorize vmaxnmq vminnmq Christophe Lyon
2023-05-09 12:19 ` [PATCH 08/16] arm: [MVE intrinsics] rework " Christophe Lyon
2023-05-09 12:19 ` [PATCH 09/16] arm: [MVE intrinsics] factorize vmaxnmavq vmaxnmvq vminnmavq vminnmvq Christophe Lyon
2023-05-09 12:19 ` [PATCH 10/16] arm: [MVE intrinsics] add support for mve_q_p_f Christophe Lyon
2023-05-09 12:19 ` [PATCH 11/16] arm: [MVE intrinsics] rework vmaxnmavq vmaxnmvq vminnmavq vminnmvq Christophe Lyon
2023-05-09 12:19 ` [PATCH 12/16] arm: [MVE intrinsics] factorize vmaxnmaq vminnmaq Christophe Lyon
2023-05-09 12:19 ` [PATCH 13/16] arm: [MVE intrinsics] rework " Christophe Lyon
2023-05-09 12:19 ` [PATCH 14/16] arm: [MVE intrinsics] add binary_maxamina shape Christophe Lyon
2023-05-09 12:19 ` [PATCH 15/16] arm: [MVE intrinsics] factorize vmaxaq vminaq Christophe Lyon
2023-05-09 12:19 ` Christophe Lyon [this message]
2023-05-09 13:50 ` [PATCH 01/16] arm: [MVE intrinsics] add binary_maxvminv shape Kyrylo Tkachov
2023-05-09 18:30 ` Christophe Lyon
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