From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from smtpbg150.qq.com (smtpbg150.qq.com [18.132.163.193]) by sourceware.org (Postfix) with ESMTPS id 8C09E3858CDA for ; Thu, 11 May 2023 23:29:24 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 8C09E3858CDA Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivai.ai Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivai.ai X-QQ-mid: bizesmtp81t1683847759tqkdjumm Received: from rios-cad5.localdomain ( [58.60.1.11]) by bizesmtp.qq.com (ESMTP) with id ; Fri, 12 May 2023 07:29:18 +0800 (CST) X-QQ-SSF: 01400000000000F0Q000000A0000000 X-QQ-FEAT: QityeSR92A06xFouQqgL5OB72gDJYmKhdaJ05AgRtJ0wjYu9VWixwZMAY3BT0 ifncm7kCebNM0Q3F1nbuTiKL27tszrmmeoXUgx9ndg4Ehow44DZ/d1gdk6pl/xNfNFrKYWP RZ6lkxNk1DK2IbSYyzH6EeoWs8WvnamDj6V2/ubZTchelP65Ta7DNf1nmQnkAAGfTwj8Ylz PckhQ0YLh3EqW12/qLP6X17QMM467hPvkwl9Un1IT08t3i7Ct7A+XNkppYGdg56S+rofyY1 tcOurMmK1kJLZD9Neg1ku9pCIf4fAvhAHVSIKpmez8Xjbc/gJgj0MKaW4Nwg2NB6Qrj2g1u 3yeqOkkQ4AQh2vf+30r2e4q0IcYUb7ePMQ/RX2wXXktFwX3FOPiViNswXwc2JN3MwILPzLD X-QQ-GoodBg: 2 X-BIZMAIL-ID: 186734808988662559 From: juzhe.zhong@rivai.ai To: gcc-patches@gcc.gnu.org Cc: kito.cheng@sifive.com, palmer@rivosinc.com, jeffreyalaw@gmail.com, Juzhe-Zhong Subject: [PATCH] RISC-V: Fix RVV binary auto-vectorizaiton test fails Date: Fri, 12 May 2023 07:29:16 +0800 Message-Id: <20230511232916.1596624-1-juzhe.zhong@rivai.ai> X-Mailer: git-send-email 2.36.3 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:rivai.ai:qybglogicsvrgz:qybglogicsvrgz7a-one-0 X-Spam-Status: No, score=-12.5 required=5.0 tests=BAYES_00,GIT_PATCH_0,KAM_DMARC_STATUS,KAM_SHORT,RCVD_IN_DNSWL_NONE,SPF_HELO_PASS,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: From: Juzhe-Zhong In rv32: FAIL: gcc.target/riscv/rvv/autovec/vmax-rv64gcv.c -O3 -ftree-vectorize (test for excess errors) FAIL: gcc.target/riscv/rvv/autovec/vmin-run.c -O3 -ftree-vectorize (test for excess errors) FAIL: gcc.target/riscv/rvv/autovec/vadd-rv64gcv.c -O3 -ftree-vectorize (test for excess errors) FAIL: gcc.target/riscv/rvv/autovec/vand-run.c -O3 -ftree-vectorize (test for excess errors) FAIL: gcc.target/riscv/rvv/autovec/vrem-run.c -O3 -ftree-vectorize (test for excess errors) FAIL: gcc.target/riscv/rvv/autovec/vmin-rv64gcv.c -O3 -ftree-vectorize (test for excess errors) FAIL: gcc.target/riscv/rvv/autovec/vmul-run.c -O3 -ftree-vectorize (test for excess errors) FAIL: gcc.target/riscv/rvv/autovec/shift-run.c -O3 -ftree-vectorize (test for excess errors) FAIL: gcc.target/riscv/rvv/autovec/vrem-rv64gcv.c -O3 -ftree-vectorize (test for excess errors) FAIL: gcc.target/riscv/rvv/autovec/vand-rv64gcv.c -O3 -ftree-vectorize (test for excess errors) FAIL: gcc.target/riscv/rvv/autovec/vdiv-run.c -O3 -ftree-vectorize (test for excess errors) FAIL: gcc.target/riscv/rvv/autovec/vmul-rv64gcv.c -O3 -ftree-vectorize (test for excess errors) FAIL: gcc.target/riscv/rvv/autovec/vor-run.c -O3 -ftree-vectorize (test for excess errors) FAIL: gcc.target/riscv/rvv/autovec/shift-rv64gcv.c -O3 -ftree-vectorize (test for excess errors) FAIL: gcc.target/riscv/rvv/autovec/shift-scalar-run.c -O3 -ftree-vectorize (test for excess errors) FAIL: gcc.target/riscv/rvv/autovec/vdiv-rv64gcv.c -O3 -ftree-vectorize (test for excess errors) FAIL: gcc.target/riscv/rvv/autovec/vmax-run.c -O3 -ftree-vectorize (test for excess errors) FAIL: gcc.target/riscv/rvv/autovec/vor-rv64gcv.c -O3 -ftree-vectorize (test for excess errors) In rv64: FAIL: gcc.target/riscv/rvv/autovec/vsub-rv64gcv.c -O3 -ftree-vectorize (test for excess errors) gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/shift-run.c: Fix fail. * gcc.target/riscv/rvv/autovec/shift-rv64gcv.c: Ditto. * gcc.target/riscv/rvv/autovec/shift-scalar-run.c: Ditto. * gcc.target/riscv/rvv/autovec/shift-scalar-rv64gcv.c: Ditto. * gcc.target/riscv/rvv/autovec/vadd-rv64gcv.c: Ditto. * gcc.target/riscv/rvv/autovec/vand-run.c: Ditto. * gcc.target/riscv/rvv/autovec/vand-rv64gcv.c: Ditto. * gcc.target/riscv/rvv/autovec/vdiv-run.c: Ditto. * gcc.target/riscv/rvv/autovec/vdiv-rv64gcv.c: Ditto. * gcc.target/riscv/rvv/autovec/vmax-run.c: Ditto. * gcc.target/riscv/rvv/autovec/vmax-rv64gcv.c: Ditto. * gcc.target/riscv/rvv/autovec/vmin-run.c: Ditto. * gcc.target/riscv/rvv/autovec/vmin-rv64gcv.c: Ditto. * gcc.target/riscv/rvv/autovec/vmul-run.c: Ditto. * gcc.target/riscv/rvv/autovec/vmul-rv64gcv.c: Ditto. * gcc.target/riscv/rvv/autovec/vor-run.c: Ditto. * gcc.target/riscv/rvv/autovec/vor-rv64gcv.c: Ditto. * gcc.target/riscv/rvv/autovec/vrem-run.c: Ditto. * gcc.target/riscv/rvv/autovec/vrem-rv64gcv.c: Ditto. * gcc.target/riscv/rvv/autovec/vsub-rv64gcv.c: Ditto. * gcc.target/riscv/rvv/autovec/vxor-run.c: Ditto. * gcc.target/riscv/rvv/autovec/vxor-rv64gcv.c: Ditto. --- gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-run.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-rv64gcv.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-scalar-run.c | 2 +- .../gcc.target/riscv/rvv/autovec/shift-scalar-rv64gcv.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/autovec/vadd-rv64gcv.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-run.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-rv64gcv.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-run.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-rv64gcv.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-run.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-rv64gcv.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-run.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-rv64gcv.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-run.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-rv64gcv.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-run.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-rv64gcv.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-run.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-rv64gcv.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/autovec/vsub-rv64gcv.c | 4 ++-- gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-run.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-rv64gcv.c | 2 +- 22 files changed, 23 insertions(+), 23 deletions(-) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-run.c index 67e9f8ca242..159478c6947 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-run.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-run.c @@ -1,5 +1,5 @@ /* { dg-do run { target { riscv_vector } } } */ -/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */ +/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */ #include "shift-template.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-rv64gcv.c index aba9c842b1d..d9109fd8774 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-rv64gcv.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-rv64gcv.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */ +/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */ #include "shift-template.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-scalar-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-scalar-run.c index 1e801743cf9..a8ecf9767e5 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-scalar-run.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-scalar-run.c @@ -1,4 +1,4 @@ /* { dg-do run { target { riscv_vector } } } */ -/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */ +/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */ #include "shift-scalar-template.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-scalar-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-scalar-rv64gcv.c index aabd2e03231..82a5fe23e7d 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-scalar-rv64gcv.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-scalar-rv64gcv.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */ +/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */ #include "shift-scalar-template.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vadd-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vadd-rv64gcv.c index d9ba5a385b9..64c2eeec7cf 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vadd-rv64gcv.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vadd-rv64gcv.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */ +/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */ #include "vadd-template.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-run.c index 1c7def563ac..c13755ed06a 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-run.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-run.c @@ -1,5 +1,5 @@ /* { dg-do run { target { riscv_vector } } } */ -/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */ +/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */ #include "vand-template.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-rv64gcv.c index 3cd766b95a3..67f37c1e170 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-rv64gcv.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-rv64gcv.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */ +/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */ #include "vand-template.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-run.c index c8f4ce88f65..aa9a3c55abe 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-run.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-run.c @@ -1,5 +1,5 @@ /* { dg-do run { target { riscv_vector } } } */ -/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */ +/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */ #include "vdiv-template.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-rv64gcv.c index 40fdfbd8922..7d9b75ae0b1 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-rv64gcv.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-rv64gcv.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */ +/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */ #include "vdiv-template.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-run.c index 90e5c971150..cf184e24b1e 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-run.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-run.c @@ -1,5 +1,5 @@ /* { dg-do run { target { riscv_vector } } } */ -/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */ +/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */ #include "vmax-template.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-rv64gcv.c index 03496305901..9bbaf763157 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-rv64gcv.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-rv64gcv.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */ +/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */ #include "vmax-template.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-run.c index 34f9348498b..b461f8ba484 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-run.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-run.c @@ -1,5 +1,5 @@ /* { dg-do run { target { riscv_vector } } } */ -/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */ +/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */ #include "vmin-template.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-rv64gcv.c index ff1d0bbf32e..07278b22b2d 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-rv64gcv.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-rv64gcv.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */ +/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */ #include "vmin-template.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-run.c index 19e38ca8ff1..e8441c0605b 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-run.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-run.c @@ -1,5 +1,5 @@ /* { dg-do run { target { riscv_vector } } } */ -/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */ +/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */ #include "vmul-template.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-rv64gcv.c index a21bae4708f..f436b8a82a8 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-rv64gcv.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-rv64gcv.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */ +/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */ #include "vmul-template.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-run.c index e5eb1c48f73..5401e8d3ecd 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-run.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-run.c @@ -1,5 +1,5 @@ /* { dg-do run { target { riscv_vector } } } */ -/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */ +/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */ #include "vor-template.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-rv64gcv.c index d364871fd4f..ae115a2f503 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-rv64gcv.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-rv64gcv.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */ +/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */ #include "vor-template.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-run.c index db3bee3c49a..4a4c064e101 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-run.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-run.c @@ -1,5 +1,5 @@ /* { dg-do run { target { riscv_vector } } } */ -/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */ +/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */ #include "vrem-template.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-rv64gcv.c index 68dbdcf021a..5b6961d1f63 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-rv64gcv.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-rv64gcv.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */ +/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */ #include "vrem-template.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vsub-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vsub-rv64gcv.c index 26867a0bbd7..f7a2691b9f3 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vsub-rv64gcv.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vsub-rv64gcv.c @@ -1,5 +1,5 @@ -/* { dg-do run { target { riscv_vector } } } */ -/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */ +/* { dg-do compile } */ +/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */ #include "vsub-template.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-run.c index 68b9648738f..ab0975a6408 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-run.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-run.c @@ -1,5 +1,5 @@ /* { dg-do run { target { riscv_vector } } } */ -/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */ +/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */ #include "vxor-template.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-rv64gcv.c index 3e5885eb659..9729ad14eb1 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-rv64gcv.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-rv64gcv.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */ +/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */ #include "vxor-template.h" -- 2.36.3