From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by sourceware.org (Postfix) with ESMTPS id CAED23857700 for ; Sat, 20 May 2023 02:15:04 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org CAED23857700 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=marvell.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=marvell.com Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 34JMUGcO016997 for ; Fri, 19 May 2023 19:15:04 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=DgBfQMHhVunDkZJQxfoJQUhiML1XgSa7prhGqL0Y6r0=; b=g4gDlaywv/JYLOdK411hMv9peJC4guuoTJYIjvIDsmg8GjNI+RsLVnwbdj5QzysGurz+ 6y3eV4gga/SluABw8NdiH3cow6z+X6/7PxQ4cD+7B/k3DYJFn+hqSmJ/YNaBQWcWuuj9 OYuWtXd7dgqsaVYrHfZFEyOzWd7Cva9yqRnQxqHNCMz5asu4FJ+s3zLiqQ4oPNDnJiQQ JnkXsxQvqEAkBGi1yCl/JrlOeSoqQM/K1Tp/NGiezOXgqnoAcYQnfEyoVbYS5vo6TagY ad1aJ9L2++oU6ujtTb21fwYyija1mmtM+dOmUNoGvr6xzwnaPm93HBjXqOPCewNgIaoQ +Q== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3qmyexj7b1-4 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Fri, 19 May 2023 19:15:04 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Fri, 19 May 2023 19:15:02 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Fri, 19 May 2023 19:15:02 -0700 Received: from vpnclient.wrightpinski.org.com (unknown [10.69.242.187]) by maili.marvell.com (Postfix) with ESMTP id 74C343F70A0; Fri, 19 May 2023 19:15:01 -0700 (PDT) From: Andrew Pinski To: CC: Andrew Pinski Subject: [PATCH 3/7] Use get_def_for_expr in fold_single_bit_test Date: Fri, 19 May 2023 19:14:47 -0700 Message-ID: <20230520021451.1901275-4-apinski@marvell.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20230520021451.1901275-1-apinski@marvell.com> References: <20230520021451.1901275-1-apinski@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-GUID: aQkZgmPd-jVV8khbN1L4y_L5EAmwgBoH X-Proofpoint-ORIG-GUID: aQkZgmPd-jVV8khbN1L4y_L5EAmwgBoH X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-05-19_18,2023-05-17_02,2023-02-09_01 X-Spam-Status: No, score=-14.5 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,GIT_PATCH_0,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE,SPF_NONE,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: The code in fold_single_bit_test, checks if the inner was a right shift and improve the bitnum based on that. But since the inner will always be a SSA_NAME at this point, the code is dead. Move it over to use the helper function get_def_for_expr instead. OK? Bootstrapped and tested on x86_64-linux. gcc/ChangeLog: * expr.cc (fold_single_bit_test): Use get_def_for_expr instead of checking the inner's code. --- gcc/expr.cc | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/gcc/expr.cc b/gcc/expr.cc index 6221b6991c5..a61772b6808 100644 --- a/gcc/expr.cc +++ b/gcc/expr.cc @@ -12920,6 +12920,7 @@ fold_single_bit_test (location_t loc, enum tree_code code, int ops_unsigned; tree signed_type, unsigned_type, intermediate_type; tree one; + gimple *inner_def; /* First, see if we can fold the single bit test into a sign-bit test. */ @@ -12939,14 +12940,14 @@ fold_single_bit_test (location_t loc, enum tree_code code, /* If INNER is a right shift of a constant and it plus BITNUM does not overflow, adjust BITNUM and INNER. */ - if (TREE_CODE (inner) == RSHIFT_EXPR - && TREE_CODE (TREE_OPERAND (inner, 1)) == INTEGER_CST + if ((inner_def = get_def_for_expr (inner, RSHIFT_EXPR)) + && TREE_CODE (gimple_assign_rhs2 (inner_def)) == INTEGER_CST && bitnum < TYPE_PRECISION (type) - && wi::ltu_p (wi::to_wide (TREE_OPERAND (inner, 1)), + && wi::ltu_p (wi::to_wide (gimple_assign_rhs2 (inner_def)), TYPE_PRECISION (type) - bitnum)) { - bitnum += tree_to_uhwi (TREE_OPERAND (inner, 1)); - inner = TREE_OPERAND (inner, 0); + bitnum += tree_to_uhwi (gimple_assign_rhs2 (inner_def)); + inner = gimple_assign_rhs1 (inner_def); } /* If we are going to be able to omit the AND below, we must do our -- 2.17.1