From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from smtpbgbr2.qq.com (smtpbgbr2.qq.com [54.207.22.56]) by sourceware.org (Postfix) with ESMTPS id 7C6903858D37 for ; Wed, 24 May 2023 01:13:34 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 7C6903858D37 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivai.ai Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivai.ai X-QQ-mid: bizesmtp69t1684890805t8hszzk1 Received: from rios-cad5.localdomain ( [58.60.1.11]) by bizesmtp.qq.com (ESMTP) with id ; Wed, 24 May 2023 09:13:24 +0800 (CST) X-QQ-SSF: 01400000000000F0R000000A0000000 X-QQ-FEAT: D2GZf6M6C/hHmv3lE0BM9YbkH8E5fqG+1LEHLaYTGq0FPcegHMtbEA+O8mi7O /LbWhmJ6JJRR2eD/lkvd5aaT1rVo9ANVtzOnDDrrFEmh5VUBdaKu8b22EPWPzCmXAUVrp4w bC/GfJe6N3CNGh/UzwXz5X5nIeO1eeaopn7332M5KX8QCA1FVm+oxfGfRvUZ7Lav4Qm/2qh +/DjSSKqaLyMRb3j/Av2qrJHcthNNIyrAt8Gy6L7oQ5FdQIIkHbi4RgKct4YChc+qeTqpFH ykpGgb8zdT6hseVZFZEDnaUNlJgfWUXY/TNnwIwP/X2j+fiM4hp3/+j+suBLzkQzCKZVjsK sqBLDVtFTEaSvpXFRS3RslB52yUmQowGcUBDxuNjSLLIP0I6hs= X-QQ-GoodBg: 2 X-BIZMAIL-ID: 14467754486587734349 From: juzhe.zhong@rivai.ai To: gcc-patches@gcc.gnu.org Cc: kito.cheng@gmail.com, kito.cheng@sifive.com, palmer@dabbelt.com, palmer@rivosinc.com, jeffreyalaw@gmail.com, rdapp.gcc@gmail.com, Juzhe-Zhong Subject: [PATCH] RISC-V: Fix magic number of RVV auto-vectorization expander Date: Wed, 24 May 2023 09:13:23 +0800 Message-Id: <20230524011323.1046670-1-juzhe.zhong@rivai.ai> X-Mailer: git-send-email 2.36.3 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:rivai.ai:qybglogicsvrgz:qybglogicsvrgz7a-one-0 X-Spam-Status: No, score=-12.3 required=5.0 tests=BAYES_00,GIT_PATCH_0,KAM_DMARC_STATUS,RCVD_IN_DNSWL_NONE,SPF_HELO_PASS,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: From: Juzhe-Zhong This simple patch fixes the magic number, replaced by enum to make code more reasonable. Ok for trunk ? gcc/ChangeLog: * config/riscv/riscv-v.cc (expand_vec_series): Fix magic number. (expand_const_vector): Ditto. (legitimize_move): Ditto. (expand_vector_init_insert_elems): Ditto. --- gcc/config/riscv/riscv-v.cc | 39 +++++++++++++++++-------------------- 1 file changed, 18 insertions(+), 21 deletions(-) diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc index 478a052a779..524e8c7f858 100644 --- a/gcc/config/riscv/riscv-v.cc +++ b/gcc/config/riscv/riscv-v.cc @@ -406,14 +406,14 @@ expand_vec_series (rtx dest, rtx base, rtx step) int shift = exact_log2 (INTVAL (step)); rtx shift_amount = gen_int_mode (shift, Pmode); insn_code icode = code_for_pred_scalar (ASHIFT, mode); - rtx ops[3] = {step_adj, vid, shift_amount}; - emit_vlmax_insn (icode, riscv_vector::RVV_BINOP, ops); + rtx ops[RVV_BINOP] = {step_adj, vid, shift_amount}; + emit_vlmax_insn (icode, RVV_BINOP, ops); } else { insn_code icode = code_for_pred_scalar (MULT, mode); - rtx ops[3] = {step_adj, vid, step}; - emit_vlmax_insn (icode, riscv_vector::RVV_BINOP, ops); + rtx ops[RVV_BINOP] = {step_adj, vid, step}; + emit_vlmax_insn (icode, RVV_BINOP, ops); } } @@ -428,8 +428,8 @@ expand_vec_series (rtx dest, rtx base, rtx step) { rtx result = gen_reg_rtx (mode); insn_code icode = code_for_pred_scalar (PLUS, mode); - rtx ops[3] = {result, step_adj, base}; - emit_vlmax_insn (icode, riscv_vector::RVV_BINOP, ops); + rtx ops[RVV_BINOP] = {result, step_adj, base}; + emit_vlmax_insn (icode, RVV_BINOP, ops); emit_move_insn (dest, result); } } @@ -445,8 +445,8 @@ expand_const_vector (rtx target, rtx src) gcc_assert ( const_vec_duplicate_p (src, &elt) && (rtx_equal_p (elt, const0_rtx) || rtx_equal_p (elt, const1_rtx))); - rtx ops[2] = {target, src}; - emit_vlmax_insn (code_for_pred_mov (mode), riscv_vector::RVV_UNOP, ops); + rtx ops[RVV_UNOP] = {target, src}; + emit_vlmax_insn (code_for_pred_mov (mode), RVV_UNOP, ops); return; } @@ -458,16 +458,14 @@ expand_const_vector (rtx target, rtx src) we use vmv.v.i instruction. */ if (satisfies_constraint_vi (src) || satisfies_constraint_Wc0 (src)) { - rtx ops[2] = {tmp, src}; - emit_vlmax_insn (code_for_pred_mov (mode), riscv_vector::RVV_UNOP, - ops); + rtx ops[RVV_UNOP] = {tmp, src}; + emit_vlmax_insn (code_for_pred_mov (mode), RVV_UNOP, ops); } else { elt = force_reg (elt_mode, elt); - rtx ops[2] = {tmp, elt}; - emit_vlmax_insn (code_for_pred_broadcast (mode), - riscv_vector::RVV_UNOP, ops); + rtx ops[RVV_UNOP] = {tmp, elt}; + emit_vlmax_insn (code_for_pred_broadcast (mode), RVV_UNOP, ops); } if (tmp != target) @@ -536,9 +534,8 @@ legitimize_move (rtx dest, rtx src) rtx tmp = gen_reg_rtx (mode); if (MEM_P (src)) { - rtx ops[2] = {tmp, src}; - emit_vlmax_insn (code_for_pred_mov (mode), riscv_vector::RVV_UNOP, - ops); + rtx ops[RVV_UNOP] = {tmp, src}; + emit_vlmax_insn (code_for_pred_mov (mode), RVV_UNOP, ops); } else emit_move_insn (tmp, src); @@ -548,8 +545,8 @@ legitimize_move (rtx dest, rtx src) if (satisfies_constraint_vu (src)) return false; - rtx ops[2] = {dest, src}; - emit_vlmax_insn (code_for_pred_mov (mode), riscv_vector::RVV_UNOP, ops); + rtx ops[RVV_UNOP] = {dest, src}; + emit_vlmax_insn (code_for_pred_mov (mode), RVV_UNOP, ops); return true; } @@ -1281,8 +1278,8 @@ expand_vector_init_insert_elems (rtx target, const rvv_builder &builder, unsigned int unspec = FLOAT_MODE_P (mode) ? UNSPEC_VFSLIDE1DOWN : UNSPEC_VSLIDE1DOWN; insn_code icode = code_for_pred_slide (unspec, mode); - rtx ops[3] = {target, target, builder.elt (i)}; - emit_vlmax_insn (icode, riscv_vector::RVV_BINOP, ops); + rtx ops[RVV_BINOP] = {target, target, builder.elt (i)}; + emit_vlmax_insn (icode, RVV_BINOP, ops); } } -- 2.36.3