From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from zg8tndyumtaxlji0oc4xnzya.icoremail.net (zg8tndyumtaxlji0oc4xnzya.icoremail.net [46.101.248.176]) by sourceware.org (Postfix) with ESMTP id CC7243858421 for ; Wed, 7 Jun 2023 05:52:38 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org CC7243858421 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=eswincomputing.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=eswincomputing.com Received: from localhost.localdomain (unknown [10.12.130.31]) by app1 (Coremail) with SMTP id EwgMCgBnBcUeG4BkrggjAA--.24178S6; Wed, 07 Jun 2023 13:52:35 +0800 (CST) From: Fei Gao To: gcc-patches@gcc.gnu.org Cc: kito.cheng@gmail.com, palmer@dabbelt.com, jeffreyalaw@gmail.com, sinan.lin@linux.alibaba.com, jiawei@iscas.ac.cn, Fei Gao Subject: [PATCH 2/4] [RISC-V] support cm.popretz in zcmp Date: Wed, 7 Jun 2023 05:52:13 +0000 Message-Id: <20230607055215.29332-3-gaofei@eswincomputing.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230607055215.29332-1-gaofei@eswincomputing.com> References: <20230607055215.29332-1-gaofei@eswincomputing.com> X-CM-TRANSID:EwgMCgBnBcUeG4BkrggjAA--.24178S6 X-Coremail-Antispam: 1UD129KBjvAXoWfAr4rZw13GrWkuFW8XFykGrg_yoW8uFy3Wo W0ganYyw1rGF9ru3s5C3y3t3s5JrWvgrW8WFn5Zr1UAas3try2qr9F93Z5ZFn7tr10qw48 XFs7AF10vay5Jwn8n29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7v73VFW2AGmfu7bjvjm3 AaLaJ3UjIYCTnIWjp_UUUYW7AC8VAFwI0_Wr0E3s1l1xkIjI8I6I8E6xAIw20EY4v20xva j40_Wr0E3s1l1IIY67AEw4v_Jr0_Jr4l82xGYIkIc2x26280x7IE14v26r15M28IrcIa0x kI8VCY1x0267AKxVW8JVW5JwA2ocxC64kIII0Yj41l84x0c7CEw4AK67xGY2AK021l84AC jcxK6xIIjxv20xvE14v26w1j6s0DM28EF7xvwVC0I7IYx2IY6xkF7I0E14v26F4UJVW0ow A2z4x0Y4vEx4A2jsIE14v26rxl6s0DM28EF7xvwVC2z280aVCY1x0267AKxVW0oVCq3wAS 0I0E0xvYzxvE52x082IY62kv0487Mc02F40EFcxC0VAKzVAqx4xG6I80ewAv7VC0I7IYx2 IY67AKxVWUJVWUGwAv7VC2z280aVAFwI0_Jr0_Gr1lOx8S6xCaFVCjc4AY6r1j6r4UM4x0 Y48IcxkI7VAKI48JM4x0x7Aq67IIx4CEVc8vx2IErcIFxwCY02Avz4vE-syl42xK82IYc2 Ij64vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1lx2IqxVAqx4xG67AKxVWUJVWUGwC20s02 6x8GjcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r126r1DMIIYrxkI7VAKI48JMIIF0x vE2Ix0cI8IcVAFwI0_Jr0_JF4lIxAIcVC0I7IYx2IY6xkF7I0E14v26r4j6F4UMIIF0xvE 42xK8VAvwI8IcIk0rVWUJVWUCwCI42IY6I8E87Iv67AKxVWUJVW8JwCI42IY6I8E87Iv6x kF7I0E14v26r4j6r4UJbIYCTnIWIevJa73UjIFyTuYvjfU8BMNUUUUU X-CM-SenderInfo: xjdrwv3l6h245lqf0zpsxwx03jof0z/ X-Spam-Status: No, score=-11.5 required=5.0 tests=BAYES_00,GIT_PATCH_0,KAM_DMARC_STATUS,KAM_SHORT,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Generate cm.popretz instead of cm.popret if return value is 0. Signed-off-by: Fei Gao gcc/ChangeLog: * config/riscv/riscv.cc (riscv_zcmp_can_use_popretz): true if popretz can be used (riscv_gen_multi_pop_insn): interface to generate cm.pop[ret][z] (riscv_expand_epilogue): expand cm.pop[ret][z] in epilogue * config/riscv/riscv.md: * config/riscv/zc.md (@gpr_multi_popretz_up_to_ra_): md for popretz ra (@gpr_multi_popretz_up_to_s0_): md for popretz ra, s0 (@gpr_multi_popretz_up_to_s1_): likewise (@gpr_multi_popretz_up_to_s2_): likewise (@gpr_multi_popretz_up_to_s3_): likewise (@gpr_multi_popretz_up_to_s4_): likewise (@gpr_multi_popretz_up_to_s5_): likewise (@gpr_multi_popretz_up_to_s6_): likewise (@gpr_multi_popretz_up_to_s7_): likewise (@gpr_multi_popretz_up_to_s8_): likewise (@gpr_multi_popretz_up_to_s9_): likewise (@gpr_multi_popretz_up_to_s11_): likewise gcc/testsuite/ChangeLog: * gcc.target/riscv/rv32e_zcmp.c: add testcase for cm.popretz in rv32e * gcc.target/riscv/rv32i_zcmp.c: add testcase for cm.popretz in rv32i --- gcc/config/riscv/riscv.cc | 114 ++++-- gcc/config/riscv/riscv.md | 1 + gcc/config/riscv/zc.md | 393 ++++++++++++++++++++ gcc/testsuite/gcc.target/riscv/rv32e_zcmp.c | 12 + gcc/testsuite/gcc.target/riscv/rv32i_zcmp.c | 12 + 5 files changed, 508 insertions(+), 24 deletions(-) diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc index c476c699f4c..f60c241a526 100644 --- a/gcc/config/riscv/riscv.cc +++ b/gcc/config/riscv/riscv.cc @@ -435,6 +435,7 @@ typedef enum PUSH_IDX = 0, POP_IDX, POPRET_IDX, + POPRETZ_IDX, ZCMP_OP_NUM } riscv_zcmp_op_t; @@ -5535,30 +5536,30 @@ riscv_emit_stack_tie (void) /*zcmp multi push and pop code_for_push_pop function ptr array */ const code_for_push_pop_t code_for_push_pop [ZCMP_MAX_GRP_SLOTS][ZCMP_OP_NUM] = { {code_for_gpr_multi_push_up_to_ra, code_for_gpr_multi_pop_up_to_ra, - code_for_gpr_multi_popret_up_to_ra}, + code_for_gpr_multi_popret_up_to_ra, code_for_gpr_multi_popretz_up_to_ra}, {code_for_gpr_multi_push_up_to_s0, code_for_gpr_multi_pop_up_to_s0, - code_for_gpr_multi_popret_up_to_s0}, + code_for_gpr_multi_popret_up_to_s0, code_for_gpr_multi_popretz_up_to_s0}, {code_for_gpr_multi_push_up_to_s1, code_for_gpr_multi_pop_up_to_s1, - code_for_gpr_multi_popret_up_to_s1}, + code_for_gpr_multi_popret_up_to_s1, code_for_gpr_multi_popretz_up_to_s1}, {code_for_gpr_multi_push_up_to_s2, code_for_gpr_multi_pop_up_to_s2, - code_for_gpr_multi_popret_up_to_s2}, + code_for_gpr_multi_popret_up_to_s2, code_for_gpr_multi_popretz_up_to_s2}, {code_for_gpr_multi_push_up_to_s3, code_for_gpr_multi_pop_up_to_s3, - code_for_gpr_multi_popret_up_to_s3}, + code_for_gpr_multi_popret_up_to_s3, code_for_gpr_multi_popretz_up_to_s3}, {code_for_gpr_multi_push_up_to_s4, code_for_gpr_multi_pop_up_to_s4, - code_for_gpr_multi_popret_up_to_s4}, + code_for_gpr_multi_popret_up_to_s4, code_for_gpr_multi_popretz_up_to_s4}, {code_for_gpr_multi_push_up_to_s5, code_for_gpr_multi_pop_up_to_s5, - code_for_gpr_multi_popret_up_to_s5}, + code_for_gpr_multi_popret_up_to_s5, code_for_gpr_multi_popretz_up_to_s5}, {code_for_gpr_multi_push_up_to_s6, code_for_gpr_multi_pop_up_to_s6, - code_for_gpr_multi_popret_up_to_s6}, + code_for_gpr_multi_popret_up_to_s6, code_for_gpr_multi_popretz_up_to_s6}, {code_for_gpr_multi_push_up_to_s7, code_for_gpr_multi_pop_up_to_s7, - code_for_gpr_multi_popret_up_to_s7}, + code_for_gpr_multi_popret_up_to_s7, code_for_gpr_multi_popretz_up_to_s7}, {code_for_gpr_multi_push_up_to_s8, code_for_gpr_multi_pop_up_to_s8, - code_for_gpr_multi_popret_up_to_s8}, + code_for_gpr_multi_popret_up_to_s8, code_for_gpr_multi_popretz_up_to_s8}, {code_for_gpr_multi_push_up_to_s9, code_for_gpr_multi_pop_up_to_s9, - code_for_gpr_multi_popret_up_to_s9}, - {nullptr, nullptr, nullptr}, + code_for_gpr_multi_popret_up_to_s9, code_for_gpr_multi_popretz_up_to_s9}, + {nullptr, nullptr, nullptr, nullptr}, {code_for_gpr_multi_push_up_to_s11, code_for_gpr_multi_pop_up_to_s11, - code_for_gpr_multi_popret_up_to_s11}}; + code_for_gpr_multi_popret_up_to_s11, code_for_gpr_multi_popretz_up_to_s11}}; static rtx riscv_gen_multi_push_pop_insn (riscv_zcmp_op_t op, HOST_WIDE_INT adj_size, @@ -5747,6 +5748,80 @@ riscv_adjust_libcall_cfi_epilogue () return dwarf; } +/* return true if popretz pattern can be matched. + set (reg 10 a0) (const_int 0) + use (reg 10 a0) + NOTE_INSN_EPILOGUE_BEG */ +static rtx_insn * +riscv_zcmp_can_use_popretz(void) +{ + rtx_insn *insn = NULL, *use = NULL, *clear = NULL; + + /* sequence stack for NOTE_INSN_EPILOGUE_BEG*/ + struct sequence_stack * outer_seq = get_current_sequence ()->next; + if (!outer_seq) + return NULL; + insn = outer_seq->first; + if(!insn || !NOTE_P (insn) || NOTE_KIND (insn) != NOTE_INSN_EPILOGUE_BEG) + return NULL; + + /* sequence stack for the insn before NOTE_INSN_EPILOGUE_BEG*/ + outer_seq = outer_seq->next; + if (outer_seq) + insn = outer_seq->last; + + /* skip notes */ + while (insn && NOTE_P (insn)) + { + insn = PREV_INSN (insn); + } + use = insn; + + /* match use (reg 10 a0) */ + if (use == NULL || !INSN_P (use) + || GET_CODE (PATTERN (use)) != USE + || !REG_P(XEXP(PATTERN (use), 0)) + || REGNO(XEXP(PATTERN (use), 0)) != A0_REGNUM) + return NULL; + + /* match set (reg 10 a0) (const_int 0 [0]) */ + clear = PREV_INSN (use); + if (clear != NULL && INSN_P (clear) + && GET_CODE (PATTERN (clear)) == SET + && REG_P (SET_DEST (PATTERN (clear))) + && REGNO (SET_DEST (PATTERN (clear))) == A0_REGNUM + && SET_SRC (PATTERN (clear)) == const0_rtx) + return clear; + + return NULL; +} + +static void +riscv_gen_multi_pop_insn(bool use_multi_pop_normal, unsigned mask, + unsigned multipop_size) +{ + rtx insn; + unsigned regs_count = riscv_multi_push_regs_count (mask); + + if (!use_multi_pop_normal) + insn= emit_insn ( + riscv_gen_multi_push_pop_insn(POP_IDX, multipop_size, regs_count)); + else if(rtx_insn * clear_a0_insn = riscv_zcmp_can_use_popretz()) + { + delete_insn (NEXT_INSN (clear_a0_insn)); + delete_insn (clear_a0_insn); + insn = emit_jump_insn ( + riscv_gen_multi_push_pop_insn (POPRETZ_IDX, multipop_size, regs_count)); + } + else + insn = emit_jump_insn ( + riscv_gen_multi_push_pop_insn (POPRET_IDX, multipop_size, regs_count)); + + rtx dwarf = riscv_adjust_multi_pop_cfi_epilogue (multipop_size); + RTX_FRAME_RELATED_P (insn) = 1; + REG_NOTES (insn) = dwarf; +} + /* Expand an "epilogue", "sibcall_epilogue", or "eh_return_internal" pattern; style says which. */ @@ -5943,17 +6018,8 @@ riscv_expand_epilogue (int style) if (use_multi_pop) { - unsigned regs_count = riscv_multi_push_regs_count (frame->mask); - if (use_multi_pop_normal) - insn = emit_jump_insn ( - riscv_gen_multi_push_pop_insn (POPRET_IDX, multipop_size, regs_count)); - else - insn= emit_insn ( - riscv_gen_multi_push_pop_insn(POP_IDX, multipop_size, regs_count)); - - rtx dwarf = riscv_adjust_multi_pop_cfi_epilogue (multipop_size); - RTX_FRAME_RELATED_P (insn) = 1; - REG_NOTES (insn) = dwarf; + riscv_gen_multi_pop_insn(use_multi_pop_normal, + frame->mask, multipop_size); if (use_multi_pop_normal) return; } diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md index c858b3bc9ef..b2e1f82f627 100644 --- a/gcc/config/riscv/riscv.md +++ b/gcc/config/riscv/riscv.md @@ -120,6 +120,7 @@ (T1_REGNUM 6) (S0_REGNUM 8) (S1_REGNUM 9) + (A0_REGNUM 10) (S2_REGNUM 18) (S3_REGNUM 19) (S4_REGNUM 20) diff --git a/gcc/config/riscv/zc.md b/gcc/config/riscv/zc.md index 5c1bf031b8d..8d7de97daad 100644 --- a/gcc/config/riscv/zc.md +++ b/gcc/config/riscv/zc.md @@ -708,6 +708,399 @@ "cm.popret {ra, s0-s11}, %0" ) +(define_insn "@gpr_multi_popretz_up_to_ra_" + [(set (reg:X SP_REGNUM) + (plus:X (reg:X SP_REGNUM) + (match_operand 0 "stack_pop_up_to_ra_operand" "I"))) + (set (reg:X RETURN_ADDR_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X A0_REGNUM) + (const_int 0)) + (use (reg:X A0_REGNUM)) + (return) + (use (reg:SI RETURN_ADDR_REGNUM))] + "TARGET_ZCMP" + "cm.popretz {ra}, %0" +) + +(define_insn "@gpr_multi_popretz_up_to_s0_" + [(set (reg:X SP_REGNUM) + (plus:X (reg:X SP_REGNUM) + (match_operand 0 "stack_pop_up_to_s0_operand" "I"))) + (set (reg:X S0_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X RETURN_ADDR_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X A0_REGNUM) + (const_int 0)) + (use (reg:X A0_REGNUM)) + (return) + (use (reg:SI RETURN_ADDR_REGNUM))] + "TARGET_ZCMP" + "cm.popretz {ra, s0}, %0" +) + +(define_insn "@gpr_multi_popretz_up_to_s1_" + [(set (reg:X SP_REGNUM) + (plus:X (reg:X SP_REGNUM) + (match_operand 0 "stack_pop_up_to_s1_operand" "I"))) + (set (reg:X S1_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S0_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X RETURN_ADDR_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X A0_REGNUM) + (const_int 0)) + (use (reg:X A0_REGNUM)) + (return) + (use (reg:SI RETURN_ADDR_REGNUM))] + "TARGET_ZCMP" + "cm.popretz {ra, s0-s1}, %0" +) + +(define_insn "@gpr_multi_popretz_up_to_s2_" + [(set (reg:X SP_REGNUM) + (plus:X (reg:X SP_REGNUM) + (match_operand 0 "stack_pop_up_to_s2_operand" "I"))) + (set (reg:X S2_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S1_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S0_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X RETURN_ADDR_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X A0_REGNUM) + (const_int 0)) + (use (reg:X A0_REGNUM)) + (return) + (use (reg:SI RETURN_ADDR_REGNUM))] + "TARGET_ZCMP" + "cm.popretz {ra, s0-s2}, %0" +) + +(define_insn "@gpr_multi_popretz_up_to_s3_" + [(set (reg:X SP_REGNUM) + (plus:X (reg:X SP_REGNUM) + (match_operand 0 "stack_pop_up_to_s3_operand" "I"))) + (set (reg:X S3_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S2_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S1_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S0_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X RETURN_ADDR_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X A0_REGNUM) + (const_int 0)) + (use (reg:X A0_REGNUM)) + (return) + (use (reg:SI RETURN_ADDR_REGNUM))] + "TARGET_ZCMP" + "cm.popretz {ra, s0-s3}, %0" +) + +(define_insn "@gpr_multi_popretz_up_to_s4_" + [(set (reg:X SP_REGNUM) + (plus:X (reg:X SP_REGNUM) + (match_operand 0 "stack_pop_up_to_s4_operand" "I"))) + (set (reg:X S4_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S3_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S2_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S1_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S0_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X RETURN_ADDR_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X A0_REGNUM) + (const_int 0)) + (use (reg:X A0_REGNUM)) + (return) + (use (reg:SI RETURN_ADDR_REGNUM))] + "TARGET_ZCMP" + "cm.popretz {ra, s0-s4}, %0" +) + +(define_insn "@gpr_multi_popretz_up_to_s5_" + [(set (reg:X SP_REGNUM) + (plus:X (reg:X SP_REGNUM) + (match_operand 0 "stack_pop_up_to_s5_operand" "I"))) + (set (reg:X S5_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S4_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S3_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S2_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S1_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S0_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X RETURN_ADDR_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X A0_REGNUM) + (const_int 0)) + (use (reg:X A0_REGNUM)) + (return) + (use (reg:SI RETURN_ADDR_REGNUM))] + "TARGET_ZCMP" + "cm.popretz {ra, s0-s5}, %0" +) + +(define_insn "@gpr_multi_popretz_up_to_s6_" + [(set (reg:X SP_REGNUM) + (plus:X (reg:X SP_REGNUM) + (match_operand 0 "stack_pop_up_to_s6_operand" "I"))) + (set (reg:X S6_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S5_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S4_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S3_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S2_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S1_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S0_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X RETURN_ADDR_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X A0_REGNUM) + (const_int 0)) + (use (reg:X A0_REGNUM)) + (return) + (use (reg:SI RETURN_ADDR_REGNUM))] + "TARGET_ZCMP" + "cm.popretz {ra, s0-s6}, %0" +) + +(define_insn "@gpr_multi_popretz_up_to_s7_" + [(set (reg:X SP_REGNUM) + (plus:X (reg:X SP_REGNUM) + (match_operand 0 "stack_pop_up_to_s7_operand" "I"))) + (set (reg:X S7_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S6_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S5_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S4_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S3_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S2_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S1_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S0_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X RETURN_ADDR_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X A0_REGNUM) + (const_int 0)) + (use (reg:X A0_REGNUM)) + (return) + (use (reg:SI RETURN_ADDR_REGNUM))] + "TARGET_ZCMP" + "cm.popretz {ra, s0-s7}, %0" +) + +(define_insn "@gpr_multi_popretz_up_to_s8_" + [(set (reg:X SP_REGNUM) + (plus:X (reg:X SP_REGNUM) + (match_operand 0 "stack_pop_up_to_s8_operand" "I"))) + (set (reg:X S8_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S7_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S6_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S5_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S4_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S3_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S2_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S1_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S0_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X RETURN_ADDR_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X A0_REGNUM) + (const_int 0)) + (use (reg:X A0_REGNUM)) + (return) + (use (reg:SI RETURN_ADDR_REGNUM))] + "TARGET_ZCMP" + "cm.popretz {ra, s0-s8}, %0" +) + +(define_insn "@gpr_multi_popretz_up_to_s9_" + [(set (reg:X SP_REGNUM) + (plus:X (reg:X SP_REGNUM) + (match_operand 0 "stack_pop_up_to_s9_operand" "I"))) + (set (reg:X S9_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S8_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S7_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S6_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S5_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S4_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S3_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S2_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S1_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S0_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X RETURN_ADDR_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X A0_REGNUM) + (const_int 0)) + (use (reg:X A0_REGNUM)) + (return) + (use (reg:SI RETURN_ADDR_REGNUM))] + "TARGET_ZCMP" + "cm.popretz {ra, s0-s9}, %0" +) + +(define_insn "@gpr_multi_popretz_up_to_s11_" + [(set (reg:X SP_REGNUM) + (plus:X (reg:X SP_REGNUM) + (match_operand 0 "stack_pop_up_to_s11_operand" "I"))) + (set (reg:X S11_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S10_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S9_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S8_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S7_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S6_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S5_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S4_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S3_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S2_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S1_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X S0_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X RETURN_ADDR_REGNUM) + (mem:X (plus:X (reg:X SP_REGNUM) + (const_int )))) + (set (reg:X A0_REGNUM) + (const_int 0)) + (use (reg:X A0_REGNUM)) + (return) + (use (reg:SI RETURN_ADDR_REGNUM))] + "TARGET_ZCMP" + "cm.popretz {ra, s0-s11}, %0" +) + (define_insn "@gpr_multi_push_up_to_ra_" [(set (mem:X (plus:X (reg:X SP_REGNUM) (const_int ))) diff --git a/gcc/testsuite/gcc.target/riscv/rv32e_zcmp.c b/gcc/testsuite/gcc.target/riscv/rv32e_zcmp.c index 6dbe489da9b..05e52df99c2 100644 --- a/gcc/testsuite/gcc.target/riscv/rv32e_zcmp.c +++ b/gcc/testsuite/gcc.target/riscv/rv32e_zcmp.c @@ -237,3 +237,15 @@ void foo(void) f1(); f2(); } + +/* +**test_popretz: +** cm.push {ra}, -16 +** call f1 +** cm.popretz {ra}, 16 +*/ +long test_popretz() +{ + f1(); + return 0; +} diff --git a/gcc/testsuite/gcc.target/riscv/rv32i_zcmp.c b/gcc/testsuite/gcc.target/riscv/rv32i_zcmp.c index 924197cb3c4..7d5c1121c35 100644 --- a/gcc/testsuite/gcc.target/riscv/rv32i_zcmp.c +++ b/gcc/testsuite/gcc.target/riscv/rv32i_zcmp.c @@ -237,3 +237,15 @@ void foo(void) f1(); f2(); } + +/* +**test_popretz: +** cm.push {ra}, -16 +** call f1 +** cm.popretz {ra}, 16 +*/ +long test_popretz() +{ + f1(); + return 0; +} -- 2.17.1