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From: Richard Biener <rguenther@suse.de>
To: gcc-patches@gcc.gnu.org
Subject: [PATCH] tree-optimization/110332 - fix ICE with phiprop
Date: Thu, 22 Jun 2023 08:13:28 +0000 (UTC)	[thread overview]
Message-ID: <20230622081328.vp6PFGgs9uYKZwCFqMFHzXjLe9NERwSMB9Hz7nh3jdU@z> (raw)

The following fixes an ICE that occurs when we visit an edge
inserted load from the code validating correctness for inserting
an aggregate copy there.  We can simply skip those loads here.

Boostrapped and tested on x86_64-unknown-linux-gnu, pushed.

	PR tree-optimization/110332
	* tree-ssa-phiprop.cc (propagate_with_phi): Always
	check aliasing with edge inserted loads.

	* g++.dg/torture/pr110332.C: New testcase.
	* gcc.dg/torture/pr110332-1.c: Likewise.
	* gcc.dg/torture/pr110332-2.c: Likewise.
---
 gcc/testsuite/g++.dg/torture/pr110332.C   | 16 ++++++++++++++++
 gcc/testsuite/gcc.dg/torture/pr110332-1.c | 13 +++++++++++++
 gcc/testsuite/gcc.dg/torture/pr110332-2.c | 10 ++++++++++
 gcc/tree-ssa-phiprop.cc                   | 10 +++++++---
 4 files changed, 46 insertions(+), 3 deletions(-)
 create mode 100644 gcc/testsuite/g++.dg/torture/pr110332.C
 create mode 100644 gcc/testsuite/gcc.dg/torture/pr110332-1.c
 create mode 100644 gcc/testsuite/gcc.dg/torture/pr110332-2.c

diff --git a/gcc/testsuite/g++.dg/torture/pr110332.C b/gcc/testsuite/g++.dg/torture/pr110332.C
new file mode 100644
index 00000000000..31dc93ecee4
--- /dev/null
+++ b/gcc/testsuite/g++.dg/torture/pr110332.C
@@ -0,0 +1,16 @@
+// { dg-do compile }
+
+struct SlotIndex { int lie; };
+SlotIndex si7, si8;
+
+unsigned u9, u6;
+bool b3, b4;
+unsigned &value() {
+  return b4 ? u6 : u9;
+}
+void transferValues() {
+  unsigned RegIdx;
+  SlotIndex End;
+  RegIdx = value();
+  End = b3 ? si7 : si8;
+}
diff --git a/gcc/testsuite/gcc.dg/torture/pr110332-1.c b/gcc/testsuite/gcc.dg/torture/pr110332-1.c
new file mode 100644
index 00000000000..438993e8daf
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/torture/pr110332-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+
+struct s { int lie; };
+struct s si7, si8;
+unsigned u9, u6;
+_Bool b3, b4;
+unsigned transferValues(struct s *End) {
+  unsigned RegIdx;
+  unsigned *t = b4 ? &u6 : &u9;
+  RegIdx = *t;
+  *End = *(b3 ? &si7 : &si8);
+  return RegIdx;
+}
diff --git a/gcc/testsuite/gcc.dg/torture/pr110332-2.c b/gcc/testsuite/gcc.dg/torture/pr110332-2.c
new file mode 100644
index 00000000000..18b656ffb2d
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/torture/pr110332-2.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+
+_Bool a;
+struct s { int t; } c, d;
+unsigned e, f;
+unsigned transferValues(struct s *End) {
+  unsigned RegIdx = *(a ? &e : &f);
+  *End = *(a ? &c : &d);
+  return RegIdx;
+}
diff --git a/gcc/tree-ssa-phiprop.cc b/gcc/tree-ssa-phiprop.cc
index 21a349a25e2..8c9ce903472 100644
--- a/gcc/tree-ssa-phiprop.cc
+++ b/gcc/tree-ssa-phiprop.cc
@@ -399,14 +399,18 @@ propagate_with_phi (basic_block bb, gphi *phi, struct phiprop_d *phivn,
 	     there are no statements that could read from memory
 	     aliasing the lhs in between the start of bb and use_stmt.
 	     As we require use_stmt to have a VDEF above, loads after
-	     use_stmt will use a different virtual SSA_NAME.  */
+	     use_stmt will use a different virtual SSA_NAME.  When
+	     we reach an edge inserted load the constraints we place
+	     on processing guarantees that program order is preserved
+	     so we can avoid checking those.  */
 	  FOR_EACH_IMM_USE_FAST (vuse_p, vui, vuse)
 	    {
 	      vuse_stmt = USE_STMT (vuse_p);
 	      if (vuse_stmt == use_stmt)
 		continue;
-	      if (!dominated_by_p (CDI_DOMINATORS,
-				   gimple_bb (vuse_stmt), bb))
+	      if (!gimple_bb (vuse_stmt)
+		  || !dominated_by_p (CDI_DOMINATORS,
+				      gimple_bb (vuse_stmt), bb))
 		continue;
 	      if (ref_maybe_used_by_stmt_p (vuse_stmt,
 					    gimple_assign_lhs (use_stmt)))
-- 
2.35.3

                 reply	other threads:[~2023-06-22  8:13 UTC|newest]

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