From: Jan-Benedict Glaw <jbglaw@lug-owl.de>
To: 梅杰 <jie.mei@oss.cipunited.com>
Cc: gcc-patches@gcc.gnu.org, YunQiang Su <yunqiang.su@cipunited.com>,
"Maciej W . Rozycki" <macro@orcam.me.uk>
Subject: Re: [PATCH v4 4/9] MIPS: Add bitwise instructions for mips16e2
Date: Fri, 7 Jul 2023 12:53:18 +0200 [thread overview]
Message-ID: <20230707105317.kn4xv2yasza3ik43@lug-owl.de> (raw)
In-Reply-To: <3ec92640-af21-b70d-ce12-700ef449eb8e@oss.cipunited.com>
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On Fri, 2023-07-07 16:38:51 +0800, 梅杰 <jie.mei@oss.cipunited.com> wrote:
> 在 2023/7/7 07:06, Jan-Benedict Glaw 写道:
> > On Mon, 2023-06-19 16:29:53 +0800, Jie Mei <jie.mei@oss.cipunited.com> wrote:
> > > There are shortened bitwise instructions in the mips16e2 ASE,
> > > for instance, ANDI, ORI/XORI, EXT, INS etc. .
[...]
> > Starting with this patch, I see some new warning:
> >
> > [all 2023-07-06 23:04:01] g++ -c -g -O2 -DIN_GCC -DCROSS_DIRECTORY_STRUCTURE -fno-exceptions -fno-rtti -fasynchronous-unwind-tables -W -Wall -Wno-narrowing -Wwrite-strings -Wcast-qual -Wmissing-format-attribute -Wconditionally-supported -Woverloaded-virtual -pedantic -Wno-long-long -Wno-variadic-macros -Wno-overlength-strings -fno-common -DHAVE_CONFIG_H -DGENERATOR_FILE -I. -Ibuild -I../../gcc/gcc -I../../gcc/gcc/build -I../../gcc/gcc/../include -I../../gcc/gcc/../libcpp/include \
> > [all 2023-07-06 23:04:01] -o build/gencondmd.o build/gencondmd.cc
> > [all 2023-07-06 23:04:02] ../../gcc/gcc/config/mips/mips-msa.md:435:26: warning: 'and' of mutually exclusive equal-tests is always 0
> > [all 2023-07-06 23:04:02] 435 | DONE;
> > [all 2023-07-06 23:04:02] ../../gcc/gcc/config/mips/mips-msa.md:435:26: warning: 'and' of mutually exclusive equal-tests is always 0
> > [all 2023-07-06 23:04:03] ../../gcc/gcc/config/mips/mips.md:822:1: warning: 'and' of mutually exclusive equal-tests is always 0
> > [all 2023-07-06 23:04:03] 822 | ;; conditional-move-type condition is needed.
> > [all 2023-07-06 23:04:03] | ^
> > [all 2023-07-06 23:04:03] g++ -g -O2 -DIN_GCC -DCROSS_DIRECTORY_STRUCTURE -fno-exceptions -fno-rtti -fasynchronous-unwind-tables -W -Wall -Wno-narrowing -Wwrite-strings -Wcast-qual -Wmissing-format-attribute -Wconditionally-supported -Woverloaded-virtual -pedantic -Wno-long-long -Wno-variadic-macros -Wno-overlength-strings -fno-common -DHAVE_CONFIG_H -DGENERATOR_FILE -static-libstdc++ -static-libgcc -o build/gencondmd \
> > [all 2023-07-06 23:04:03] build/gencondmd.o build/errors.o ../build-x86_64-pc-linux-gnu/libiberty/libiberty.a
> > [all 2023-07-06 23:04:03] build/gencondmd > tmp-cond.md
> >
> >
> > (Full build log available as eg. http://toolchain.lug-owl.de/laminar/jobs/gcc-mips-linux/76)
>
> The warning you mentioned above seems gone if I change the condition `ISA_HAS_MIPS16E2` to `TARGET_MIPS16 && ISA_HAS_MIPS16E2` in mips.md.
>
> But it's weird because `ISA_HAS_MIPS16E2` actually contains `TARGET_MIPS16`.
>
> diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
> index b9eb541cf4a..77165778067 100644
> --- a/gcc/config/mips/mips.md
> +++ b/gcc/config/mips/mips.md
> @@ -3436,7 +3436,7 @@
> [(set (match_operand:GPR 0 "register_operand" "=d,d")
> (ior:GPR (match_operand:GPR 1 "register_operand" "%0,0")
> (match_operand:GPR 2 "uns_arith_operand" "d,K")))]
> - "ISA_HAS_MIPS16E2"
> + "TARGET_MIPS16 && ISA_HAS_MIPS16E2"
> "@
> or\t%0,%2
> ori\t%0,%x2"
That's odd. Have you looked at preprocessed output? Maybe some
parentheses aren't as expected? Looks like an opportunity to deep-dive
into the unexpected. OTOH what's with the mips-msa.md warnings? The
pattern actually want !TARGET_MIPS16. (But I haven't really looked
into the dependencies.)
MfG, JBG
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next prev parent reply other threads:[~2023-07-07 10:53 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-19 8:29 [PATCH v4 0/9] MIPS: Add MIPS16e2 ASE instrucions Jie Mei
2023-06-19 8:29 ` [PATCH v4 1/9] MIPS: Add basic support for mips16e2 Jie Mei
2023-06-19 8:29 ` [PATCH v4 2/9] MIPS: Add MOVx instructions " Jie Mei
2023-06-19 8:29 ` [PATCH v4 3/9] MIPS: Add instruction about global pointer register " Jie Mei
2023-06-19 8:29 ` [PATCH v4 4/9] MIPS: Add bitwise instructions " Jie Mei
2023-07-06 23:06 ` Jan-Benedict Glaw
2023-07-07 8:38 ` 梅杰
2023-07-07 10:53 ` Jan-Benedict Glaw [this message]
2023-06-19 8:29 ` [PATCH v4 5/9] MIPS: Add LUI instruction " Jie Mei
2023-06-19 8:29 ` [PATCH v4 6/9] MIPS: Add load/store word left/right instructions " Jie Mei
2023-06-19 8:29 ` [PATCH v4 7/9] MIPS: Use ISA_HAS_9BIT_DISPLACEMENT " Jie Mei
2023-06-19 8:29 ` [PATCH v4 8/9] MIPS: Add CACHE instruction " Jie Mei
2023-06-19 8:29 ` [PATCH v4 9/9] MIPS: Make mips16e2 generating ZEB/ZEH instead of ANDI under certain conditions Jie Mei
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