From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-lf1-x133.google.com (mail-lf1-x133.google.com [IPv6:2a00:1450:4864:20::133]) by sourceware.org (Postfix) with ESMTPS id A91993858C62 for ; Thu, 13 Jul 2023 14:09:21 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org A91993858C62 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=vrull.eu Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=vrull.eu Received: by mail-lf1-x133.google.com with SMTP id 2adb3069b0e04-4fba86f069bso1337996e87.3 for ; Thu, 13 Jul 2023 07:09:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vrull.eu; s=google; t=1689257359; x=1691849359; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=XHPJ8O8QABVZ/BDf/KYyZDsrsMiSKm3ARHb/lc2Tv08=; b=DraNtYSzxOZ6rGgke88/yN0jMEIlsnMfU5Ssxfo9QClgzmidsCxipjsrdcJOxmP/pL 6RF8gZn/jHQze85m1/AHqbJdclhWWA/2h+g4FePW5tYcTqrinbpPScXe8YsoVIyIwTiV x74jl8QM0DaiXF526EFfMk+/BPjFzm5Gh5/CZGyzUDa9d1w2AjjQ+Ag3dQ0t6nQ7Rf5X hasSzxz/kvVcxI+LsMDTaWlrExhBNzMStNni6ekQFwltL6ScnBfvBBemXBn8ymPwzOIe ADBqLTUATQ8JG3rhmYBsvQkf8Wsmwvv6XDpxv0G5/GZMok5KD7WnLbUjL2yfJV0J5Ied ONZg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1689257359; x=1691849359; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=XHPJ8O8QABVZ/BDf/KYyZDsrsMiSKm3ARHb/lc2Tv08=; b=DNwh0w6LH3dt6XTk7CgVSvr/afIpLd0hqra5WsFKqLD//BX+gBBkr2VRrrhokcObUT zOgz0f+sLTWCw55rbLRIHxcK1u2P/UeRaMtXjFAaZwcy6DRCaPAvEJ02ZEr1RCERogBh 47ARcLDrH0Sb2TL7UtxhfAapyhuukSI7HkbgXS/ij5iul6Vp3QQUR6tvUyMzceB+oaSR hmEp9TGGu7vfuOCNL6LZko0y0PirpTRiE36vD65/Wy+p0cqijnUSw4V7+h5wKhHYqrHT NYDJiS1ejxiVbTbbwe5Eqj67dbQWMYy0F72u27Wohk3UnAbmEpgf2QbR2hQ99CvEe9Zo TulQ== X-Gm-Message-State: ABy/qLYLPndbppMh0uL3Z6rC/pPIapjDIiUWSTRkCEXOu7OkhsVsepwu mw84S8VVKcrWDfE/8NkGjAcwbahfdVnufyJNeCUecA== X-Google-Smtp-Source: APBJJlE34gArlyR0SUByY9y2GXH7DsVX9AN7sDg0sxG+rJKFcJxUFiYtuyRk3ud9smT/LEUmBIk1Ew== X-Received: by 2002:a2e:8082:0:b0:2b6:d8d5:15b1 with SMTP id i2-20020a2e8082000000b002b6d8d515b1mr1238760ljg.50.1689257359446; Thu, 13 Jul 2023 07:09:19 -0700 (PDT) Received: from helsinki-03.engr ([2a01:4f9:6b:2a47::2]) by smtp.gmail.com with ESMTPSA id d9-20020a2e8909000000b002b6e3337fd5sm1528181lji.7.2023.07.13.07.09.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Jul 2023 07:09:18 -0700 (PDT) From: Manolis Tsamis To: gcc-patches@gcc.gnu.org Cc: Philipp Tomsich , Jakub Jelinek , Andrew Pinski , Robin Dapp , Manolis Tsamis Subject: [PATCH v2 2/2] ifcvt: Allow more operations in multiple set if conversion Date: Thu, 13 Jul 2023 16:09:04 +0200 Message-Id: <20230713140904.3274306-3-manolis.tsamis@vrull.eu> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230713140904.3274306-1-manolis.tsamis@vrull.eu> References: <20230713140904.3274306-1-manolis.tsamis@vrull.eu> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-11.3 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,GIT_PATCH_0,JMQ_SPF_NEUTRAL,KAM_SHORT,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Currently the operations allowed for if conversion of a basic block with multiple sets are few, namely REG, SUBREG and CONST_INT (as controlled by bb_ok_for_noce_convert_multiple_sets). This commit allows more operations (arithmetic, compare, etc) to participate in if conversion. The target's profitability hook and ifcvt's costing is expected to reject sequences that are unprofitable. This is especially useful for targets which provide a rich selection of conditional instructions (like aarch64 which has cinc, csneg, csinv, ccmp, ...) which are currently not used in basic blocks with more than a single set. gcc/ChangeLog: * ifcvt.cc (try_emit_cmove_seq): Modify comments. (noce_convert_multiple_sets_1): Modify comments. (bb_ok_for_noce_convert_multiple_sets): Allow more operations. gcc/testsuite/ChangeLog: * gcc.target/aarch64/ifcvt_multiple_sets_arithm.c: New test. Signed-off-by: Manolis Tsamis --- Changes in v2: - Change "conditional moves" to "conditional instructions" in bb_ok_for_noce_convert_multiple_sets's comment. gcc/ifcvt.cc | 60 +++++++++++------ .../aarch64/ifcvt_multiple_sets_arithm.c | 67 +++++++++++++++++++ 2 files changed, 108 insertions(+), 19 deletions(-) create mode 100644 gcc/testsuite/gcc.target/aarch64/ifcvt_multiple_sets_arithm.c diff --git a/gcc/ifcvt.cc b/gcc/ifcvt.cc index 3273aeca125..be29403a5b5 100644 --- a/gcc/ifcvt.cc +++ b/gcc/ifcvt.cc @@ -3215,13 +3215,13 @@ try_emit_cmove_seq (struct noce_if_info *if_info, rtx temp, /* We have something like: if (x > y) - { i = a; j = b; k = c; } + { i = EXPR_A; j = EXPR_B; k = EXPR_C; } Make it: - tmp_i = (x > y) ? a : i; - tmp_j = (x > y) ? b : j; - tmp_k = (x > y) ? c : k; + tmp_i = (x > y) ? EXPR_A : i; + tmp_j = (x > y) ? EXPR_B : j; + tmp_k = (x > y) ? EXPR_C : k; i = tmp_i; j = tmp_j; k = tmp_k; @@ -3637,11 +3637,10 @@ noce_convert_multiple_sets_1 (struct noce_if_info *if_info, -/* Return true iff basic block TEST_BB is comprised of only - (SET (REG) (REG)) insns suitable for conversion to a series - of conditional moves. Also check that we have more than one set - (other routines can handle a single set better than we would), and - fewer than PARAM_MAX_RTL_IF_CONVERSION_INSNS sets. While going +/* Return true iff basic block TEST_BB is suitable for conversion to a + series of conditional instructions. Also check that we have more than + one set (other routines can handle a single set better than we would), + and fewer than PARAM_MAX_RTL_IF_CONVERSION_INSNS sets. While going through the insns store the sum of their potential costs in COST. */ static bool @@ -3667,20 +3666,43 @@ bb_ok_for_noce_convert_multiple_sets (basic_block test_bb, unsigned *cost) rtx dest = SET_DEST (set); rtx src = SET_SRC (set); - /* We can possibly relax this, but for now only handle REG to REG - (including subreg) moves. This avoids any issues that might come - from introducing loads/stores that might violate data-race-freedom - guarantees. */ - if (!REG_P (dest)) + /* Do not handle anything involving memory loads/stores since it might + violate data-race-freedom guarantees. */ + if (!REG_P (dest) || contains_mem_rtx_p (src)) return false; - if (!((REG_P (src) || CONSTANT_P (src)) - || (GET_CODE (src) == SUBREG && REG_P (SUBREG_REG (src)) - && subreg_lowpart_p (src)))) + /* Allow a wide range of operations and let the costing function decide + if the conversion is worth it later. */ + enum rtx_code code = GET_CODE (src); + if (!(CONSTANT_P (src) + || code == REG + || code == SUBREG + || code == ZERO_EXTEND + || code == SIGN_EXTEND + || code == NOT + || code == NEG + || code == PLUS + || code == MINUS + || code == AND + || code == IOR + || code == MULT + || code == ASHIFT + || code == ASHIFTRT + || code == NE + || code == EQ + || code == GE + || code == GT + || code == LE + || code == LT + || code == GEU + || code == GTU + || code == LEU + || code == LTU + || code == COMPARE)) return false; - /* Destination must be appropriate for a conditional write. */ - if (!noce_operand_ok (dest)) + /* Destination and source must be appropriate. */ + if (!noce_operand_ok (dest) || !noce_operand_ok (src)) return false; /* We must be able to conditionally move in this mode. */ diff --git a/gcc/testsuite/gcc.target/aarch64/ifcvt_multiple_sets_arithm.c b/gcc/testsuite/gcc.target/aarch64/ifcvt_multiple_sets_arithm.c new file mode 100644 index 00000000000..f29cc72263a --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/ifcvt_multiple_sets_arithm.c @@ -0,0 +1,67 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -fdump-rtl-ce1" } */ + +void sink2(int, int); +void sink3(int, int, int); + +void cond_1(int cond, int x, int y) { + if (cond) { + x = x << 4; + y = 1; + } + + sink2(x, y); +} + +void cond_2(int cond, int x, int y) { + if (cond) { + x++; + y++; + } + + sink2(x, y); +} + +void cond_3(int cond, int x1, int x2, int x3) { + if (cond) { + x1++; + x2++; + x3++; + } + + sink3(x1, x2, x3); +} + +void cond_4(int cond, int x, int y) { + if (cond) { + x += 2; + y += 3; + } + + sink2(x, y); +} + +void cond_5(int cond, int x, int y, int r1, int r2) { + if (cond) { + x = r1 + 2; + y = r2 - 34; + } + + sink2(x, y); +} + +void cond_6(int cond, int x, int y) { + if (cond) { + x = -x; + y = ~y; + } + + sink2(x, y); +} + +/* { dg-final { scan-assembler-times "cinc\t" 5 } } */ +/* { dg-final { scan-assembler-times "csneg\t" 1 } } */ +/* { dg-final { scan-assembler-times "csinv\t" 1 } } */ +/* { dg-final { scan-assembler "csel\t" 1 } } */ + +/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_convert_multiple_sets" 6 "ce1" } } */ \ No newline at end of file -- 2.34.1