From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by sourceware.org (Postfix) with ESMTPS id D4D1C3858D35 for ; Sun, 16 Jul 2023 02:16:36 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org D4D1C3858D35 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=intel.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1689473796; x=1721009796; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=dKcwmf33AKX5yYYd5nlil1GXdnBRP+pYpd1AvbY9ZV0=; b=AOMcNcQoGBlxq+PF4FIyAoLIyzmPeA2v0YETUfwgmOgsSqZgKIvz/37W /qc0xoJP13v5KRe2+yOyli8zTwS6Np+ob+5Sq9FSLK88Dk+J/5J5rLxSU rL6vnvAVDLK7a6uw+zJyoNCBtgm2lSNcx+Y5X0k6rPECKHSArfoCbbmVj ZbqkBheIPPPXcP4nCE9VbeaTslxhbrPl+QHi5a7KXHJfsRpu//8hwFWtd fpDF7mrZ+2hiXpBJuA+KRVxxA9fM0y/8F6NDQHZmgKCFa4pkD9mFnYN/e G8fFPNBYQwhW1XAcvUe0GgMH3H10KMUV83fU1e7XpL3uS8wDM+EJiSHiG A==; X-IronPort-AV: E=McAfee;i="6600,9927,10772"; a="365764658" X-IronPort-AV: E=Sophos;i="6.01,209,1684825200"; d="scan'208";a="365764658" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Jul 2023 19:16:34 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10772"; a="673120876" X-IronPort-AV: E=Sophos;i="6.01,209,1684825200"; d="scan'208";a="673120876" Received: from shvmail03.sh.intel.com ([10.239.245.20]) by orsmga003.jf.intel.com with ESMTP; 15 Jul 2023 19:16:31 -0700 Received: from pli-ubuntu.sh.intel.com (pli-ubuntu.sh.intel.com [10.239.159.47]) by shvmail03.sh.intel.com (Postfix) with ESMTP id 6BBE3100562E; Sun, 16 Jul 2023 10:16:30 +0800 (CST) From: pan2.li@intel.com To: gcc-patches@gcc.gnu.org Cc: juzhe.zhong@rivai.ai, pan2.li@intel.com, kito.cheng@gmail.com Subject: [PATCH v1|GCC-13] RISC-V: Bugfix for riscv-vsetvl pass. Date: Sun, 16 Jul 2023 10:16:22 +0800 Message-Id: <20230716021622.2831938-1-pan2.li@intel.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-11.0 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,GIT_PATCH_0,KAM_SHORT,SPF_HELO_NONE,SPF_NONE,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: From: Ju-Zhe Zhong This patch comes from part of below change, which locate one bug of rvv vsetvel pass when auto-vectorization. https://gcc.gnu.org/pipermail/gcc-patches/2023-July/624523.html Unforunately, It is not easy to reproduce this bug by intrinsic APIs but it is worth to backport to GCC 13. Signed-off-by: Ju-Zhe Zhong gcc/ChangeLog: * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Add vl parameter. (change_vsetvl_insn): Ditto. (change_insn): Add validate change as well as assert. (pass_vsetvl::backward_demand_fusion): Allow forward. --- gcc/config/riscv/riscv-vsetvl.cc | 29 +++++++++++++++++++++++------ 1 file changed, 23 insertions(+), 6 deletions(-) diff --git a/gcc/config/riscv/riscv-vsetvl.cc b/gcc/config/riscv/riscv-vsetvl.cc index 3355ca4e3fb..fbd26988106 100644 --- a/gcc/config/riscv/riscv-vsetvl.cc +++ b/gcc/config/riscv/riscv-vsetvl.cc @@ -633,7 +633,8 @@ gen_vsetvl_pat (enum vsetvl_type insn_type, const vl_vtype_info &info, rtx vl) } static rtx -gen_vsetvl_pat (rtx_insn *rinsn, const vector_insn_info &info) +gen_vsetvl_pat (rtx_insn *rinsn, const vector_insn_info &info, + rtx vl = NULL_RTX) { rtx new_pat; vl_vtype_info new_info = info; @@ -644,7 +645,7 @@ gen_vsetvl_pat (rtx_insn *rinsn, const vector_insn_info &info) if (vsetvl_insn_p (rinsn) || vlmax_avl_p (info.get_avl ())) { rtx dest = get_vl (rinsn); - new_pat = gen_vsetvl_pat (VSETVL_NORMAL, new_info, dest); + new_pat = gen_vsetvl_pat (VSETVL_NORMAL, new_info, vl ? vl : dest); } else if (INSN_CODE (rinsn) == CODE_FOR_vsetvl_vtype_change_only) new_pat = gen_vsetvl_pat (VSETVL_VTYPE_CHANGE_ONLY, new_info, NULL_RTX); @@ -926,7 +927,8 @@ change_insn (rtx_insn *rinsn, rtx new_pat) print_rtl_single (dump_file, PATTERN (rinsn)); } - validate_change (rinsn, &PATTERN (rinsn), new_pat, false); + bool change_p = validate_change (rinsn, &PATTERN (rinsn), new_pat, false); + gcc_assert (change_p); if (dump_file) { @@ -1039,7 +1041,8 @@ change_insn (function_info *ssa, insn_change change, insn_info *insn, } static void -change_vsetvl_insn (const insn_info *insn, const vector_insn_info &info) +change_vsetvl_insn (const insn_info *insn, const vector_insn_info &info, + rtx vl = NULL_RTX) { rtx_insn *rinsn; if (vector_config_insn_p (insn->rtl ())) @@ -1053,7 +1056,7 @@ change_vsetvl_insn (const insn_info *insn, const vector_insn_info &info) rinsn = PREV_INSN (insn->rtl ()); gcc_assert (vector_config_insn_p (rinsn)); } - rtx new_pat = gen_vsetvl_pat (rinsn, info); + rtx new_pat = gen_vsetvl_pat (rinsn, info, vl); change_insn (rinsn, new_pat); } @@ -3331,7 +3334,21 @@ pass_vsetvl::backward_demand_fusion (void) new_info)) continue; - change_vsetvl_insn (new_info.get_insn (), new_info); + rtx vl = NULL_RTX; + /* Backward VLMAX VL: + bb 3: + vsetivli zero, 1 ... -> vsetvli t1, zero + vmv.s.x + bb 5: + vsetvli t1, zero ... -> to be elided. + vlse16.v + + We should forward "t1". */ + if (!block_info.reaching_out.has_avl_reg () + && vlmax_avl_p (new_info.get_avl ())) + vl = get_vl (prop.get_insn ()->rtl ()); + change_vsetvl_insn (new_info.get_insn (), new_info, vl); + if (block_info.local_dem == block_info.reaching_out) block_info.local_dem = new_info; block_info.reaching_out = new_info; -- 2.34.1