From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from smtpbg154.qq.com (smtpbg154.qq.com [15.184.224.54]) by sourceware.org (Postfix) with ESMTPS id 03F323858C74 for ; Wed, 19 Jul 2023 03:13:17 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 03F323858C74 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivai.ai Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivai.ai X-QQ-mid: bizesmtp69t1689736381tff1jaud Received: from server1.localdomain ( [58.60.1.22]) by bizesmtp.qq.com (ESMTP) with id ; Wed, 19 Jul 2023 11:12:59 +0800 (CST) X-QQ-SSF: 01400000000000B0F000000A0000000 X-QQ-FEAT: A3sBdGYZvtUhbLz1LmJu9AUMpz8HxkPXYaCfuQp8V4Z4HbQ4oU0Dbmc0M2976 mjgyYL+kzzKJMxJBNj6vwettwlaJHX6jXeS251Flk6AlYbEaRAbKPLBv5wIS0PDn6ADwNqU PjwYYAGdjaIpjacqmFfRBFU0XXdZKDZMC3h3pgu25HXDEU44QVMsTW26MUtZ5g649ZrIq45 c7uyzfKxPuIx2hwdJEU64mrFTQCKlAdzyWYUodn79M9VmosqEBN+fdp38SQTkNTXzknSAaT BOIGy4+KVd/4hYhUTNyeW7MtUUeFuSLVunExGxMGlMXBpG90YXb0nCtnds6TmVM+cBl1jF6 PdxNpnfJxxmgeoRWeVceUWc/lnKzQ== X-QQ-GoodBg: 2 X-BIZMAIL-ID: 10650200608056478434 From: Lehua Ding To: rdapp.gcc@gmail.com, gcc-patches@gcc.gnu.org Cc: juzhe.zhong@rivai.ai, kito.cheng@gmail.com, palmer@rivosinc.com, jeffreyalaw@gmail.com Subject: Re: [PATCH] RISC-V: Fix testcase failed when default -mcmodel=medany Date: Wed, 19 Jul 2023 11:12:58 +0800 Message-Id: <20230719031258.25644-1-lehua.ding@rivai.ai> X-Mailer: git-send-email 2.36.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:rivai.ai:qybglogicsvrgz:qybglogicsvrgz6a-0 X-Spam-Status: No, score=-9.7 required=5.0 tests=BAYES_00,GIT_PATCH_0,KAM_DMARC_STATUS,KAM_SHORT,RCVD_IN_BARRACUDACENTRAL,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_PASS,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Hi Robin, > In general I'm fine with this small change of course, I just wonder if > the testcase is not brittle anyway. From what I can tell the respective > change is independent of the actual number of registers so maybe it's enough to > not compare the fully body but just make sure the addis are not present? > That way, the test could also work for -march=rv64 (which saves one > register less anyway regardless of mcmodel - but the change still helps) > or maybe even with instruction scheduling. Would you mind checking this still? I think you are rigth, I would like to remove the `-mcmodel=medany` option and relax assert from `__riscv_save/restore_4` to `__riscv_save/restore_(3|4)` to let this testcase not brittle on any -mcmodel. Then I'm also going to add another testcase (I dont known how to run -march=rv32imafc and -march=rv64imafc on the same testcase) that uses -march=rv64imafc. Removing scheduling option will result in a change in the order of the assert assembly, and I don't feel like removing it because the order may be different for different microarchitectures. Best, Lehua V2 patch: gcc/testsuite/ChangeLog: * gcc.target/riscv/stack_save_restore.c: Moved to... * gcc.target/riscv/stack_save_restore_2.c: ...here. * gcc.target/riscv/stack_save_restore_1.c: New test. --- .../gcc.target/riscv/stack_save_restore_1.c | 40 +++++++++++++++++++ ..._save_restore.c => stack_save_restore_2.c} | 6 +-- 2 files changed, 43 insertions(+), 3 deletions(-) create mode 100644 gcc/testsuite/gcc.target/riscv/stack_save_restore_1.c rename gcc/testsuite/gcc.target/riscv/{stack_save_restore.c => stack_save_restore_2.c} (90%) diff --git a/gcc/testsuite/gcc.target/riscv/stack_save_restore_1.c b/gcc/testsuite/gcc.target/riscv/stack_save_restore_1.c new file mode 100644 index 00000000000..255ce5f40c9 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/stack_save_restore_1.c @@ -0,0 +1,40 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64imafc -mabi=lp64f -msave-restore -O2 -fno-schedule-insns -fno-schedule-insns2 -fno-unroll-loops -fno-peel-loops -fno-lto" } */ +/* { dg-final { check-function-bodies "**" "" } } */ + +char my_getchar(); +float getf(); + +/* +** bar: +** call t0,__riscv_save_(3|4) +** addi sp,sp,-2032 +** ... +** li t0,-12288 +** add sp,sp,t0 +** ... +** li t0,12288 +** add sp,sp,t0 +** ... +** addi sp,sp,2032 +** tail __riscv_restore_(3|4) +*/ +int bar() +{ + float volatile farray[3568]; + + float sum = 0; + float f1 = getf(); + float f2 = getf(); + float f3 = getf(); + float f4 = getf(); + + for (int i = 0; i < 3568; i++) + { + farray[i] = my_getchar() * 1.2; + sum += farray[i]; + } + + return sum + f1 + f2 + f3 + f4; +} + diff --git a/gcc/testsuite/gcc.target/riscv/stack_save_restore.c b/gcc/testsuite/gcc.target/riscv/stack_save_restore_2.c similarity index 90% rename from gcc/testsuite/gcc.target/riscv/stack_save_restore.c rename to gcc/testsuite/gcc.target/riscv/stack_save_restore_2.c index 522e706cfbf..4ce5e0118a4 100644 --- a/gcc/testsuite/gcc.target/riscv/stack_save_restore.c +++ b/gcc/testsuite/gcc.target/riscv/stack_save_restore_2.c @@ -6,8 +6,8 @@ char my_getchar(); float getf(); /* -**bar: -** call t0,__riscv_save_4 +** bar: +** call t0,__riscv_save_(3|4) ** addi sp,sp,-2032 ** ... ** li t0,-12288 @@ -17,7 +17,7 @@ float getf(); ** add sp,sp,t0 ** ... ** addi sp,sp,2032 -** tail __riscv_restore_4 +** tail __riscv_restore_(3|4) */ int bar() { -- 2.36.3