From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from zg8tmja2lje4os4yms4ymjma.icoremail.net (zg8tmja2lje4os4yms4ymjma.icoremail.net [206.189.21.223]) by sourceware.org (Postfix) with ESMTP id ED192385735D for ; Wed, 19 Jul 2023 10:12:12 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org ED192385735D Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=eswincomputing.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=eswincomputing.com Received: from localhost.localdomain (unknown [10.12.130.38]) by app1 (Coremail) with SMTP id EwgMCgDHZMTttrdkrKE0AA--.63411S7; Wed, 19 Jul 2023 18:12:08 +0800 (CST) From: Xiao Zeng To: gcc-patches@gcc.gnu.org Cc: jeffreyalaw@gmail.com, research_trasio@irq.a4lg.com, kito.cheng@gmail.com, zhengyu@eswincomputing.com, eri-sw-toolchain@eswincomputing.com, Xiao Zeng Subject: [PATCH 3/5] [RISC-V] Generate Zicond instruction for select pattern with condition eq or neq to 0 Date: Wed, 19 Jul 2023 18:11:54 +0800 Message-Id: <20230719101156.21771-4-zengxiao@eswincomputing.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230719101156.21771-1-zengxiao@eswincomputing.com> References: <20230719101156.21771-1-zengxiao@eswincomputing.com> X-CM-TRANSID:EwgMCgDHZMTttrdkrKE0AA--.63411S7 X-Coremail-Antispam: 1UD129KBjvAXoWfGFyfXF47urW7KFWkZF1UWrg_yoW8Xr1kCo ZY9F4rA3WrJr13ur17Ww17Kr17XFW8urs7Ja98Kw4jkFnrJwnY9ws7K3WDA34jvrn3XrWj vrWFgFWxXa97Jrn8n29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7v73VFW2AGmfu7bjvjm3 AaLaJ3UjIYCTnIWjp_UUUYA7AC8VAFwI0_Wr0E3s1l1xkIjI8I6I8E6xAIw20EY4v20xva j40_Wr0E3s1l1IIY67AEw4v_Jr0_Jr4l82xGYIkIc2x26280x7IE14v26r1rM28IrcIa0x kI8VCY1x0267AKxVW5JVCq3wA2ocxC64kIII0Yj41l84x0c7CEw4AK67xGY2AK021l84AC jcxK6xIIjxv20xvE14v26w1j6s0DM28EF7xvwVC0I7IYx2IY6xkF7I0E14v26r4UJVWxJr 1l84ACjcxK6I8E87Iv67AKxVW0oVCq3wA2z4x0Y4vEx4A2jsIEc7CjxVAFwI0_GcCE3s1l e2I262IYc4CY6c8Ij28IcVAaY2xG8wAqx4xG64xvF2IEw4CE5I8CrVC2j2WlYx0E2Ix0cI 8IcVAFwI0_JrI_JrylYx0Ex4A2jsIE14v26r1j6r4UMcvjeVCFs4IE7xkEbVWUJVW8JwAC jcxG0xvY0x0EwIxGrwACjI8F5VA0II8E6IAqYI8I648v4I1lc2xSY4AK6svPMxAIw28Icx kI7VAKI48JMxC20s026xCaFVCjc4AY6r1j6r4UMI8I3I0E5I8CrVAFwI0_Jr0_Jr4lx2Iq xVCjr7xvwVAFwI0_JrI_JrWlx4CE17CEb7AF67AKxVWUAVWUtwCIc40Y0x0EwIxGrwCI42 IY6xIIjxv20xvE14v26r1j6r1xMIIF0xvE2Ix0cI8IcVCY1x0267AKxVW8JVWxJwCI42IY 6xAIw20EY4v20xvaj40_Jr0_JF4lIxAIcVC2z280aVAFwI0_Jr0_Gr1lIxAIcVC2z280aV CY1x0267AKxVW8JVW8JrUvcSsGvfC2KfnxnUUI43ZEXa7VU1VOJ5UUUUU== X-CM-SenderInfo: p2hqw5xldrqvxvzl0uprps33xlqjhudrp/ X-Spam-Status: No, score=-11.5 required=5.0 tests=BAYES_00,GIT_PATCH_0,KAM_DMARC_STATUS,KAM_NUMSUBJECT,KAM_SHORT,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: This patch completes the recognition of Zicond when the select pattern with condition eq or neq to 0 (using equality as an example), namely: 1 rd = (rs2 == 0) ? non-imm : 0 2 rd = (rs2 == 0) ? non-imm : non-imm 3 rd = (rs2 == 0) ? reg : non-imm 4 rd = (rs2 == 0) ? reg : reg gcc/ChangeLog: * config/riscv/riscv.cc (riscv_rtx_costs): IF_THEN_ELSE costs in Zicond. (riscv_expand_conditional_move): Recognize Zicond. * config/riscv/riscv.md: Zicond patterns. gcc/testsuite/ChangeLog: * gcc.target/riscv/zicond-primitiveSemantics_return_0_imm.c: New test. * gcc.target/riscv/zicond-primitiveSemantics_return_imm_imm.c: New test. * gcc.target/riscv/zicond-primitiveSemantics_return_imm_reg.c: New test. * gcc.target/riscv/zicond-primitiveSemantics_return_reg_reg.c: New test. --- gcc/config/riscv/riscv.cc | 125 ++++++++++++++++++ gcc/config/riscv/riscv.md | 2 +- .../zicond-primitiveSemantics_return_0_imm.c | 65 +++++++++ ...zicond-primitiveSemantics_return_imm_imm.c | 73 ++++++++++ ...zicond-primitiveSemantics_return_imm_reg.c | 65 +++++++++ ...zicond-primitiveSemantics_return_reg_reg.c | 65 +++++++++ 6 files changed, 394 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics_return_0_imm.c create mode 100644 gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics_return_imm_imm.c create mode 100644 gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics_return_imm_reg.c create mode 100644 gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics_return_reg_reg.c diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc index 38d8eb2fcf5..7e6b24bd232 100644 --- a/gcc/config/riscv/riscv.cc +++ b/gcc/config/riscv/riscv.cc @@ -2448,6 +2448,17 @@ riscv_rtx_costs (rtx x, machine_mode mode, int outer_code, int opno ATTRIBUTE_UN *total = COSTS_N_INSNS (1); return true; } + else if (TARGET_ZICOND && outer_code == SET && + ((GET_CODE (XEXP (x, 1)) == REG && XEXP (x, 2) == const0_rtx) || + (GET_CODE (XEXP (x, 2)) == REG && XEXP (x, 1) == const0_rtx) || + (GET_CODE (XEXP (x, 1)) == REG && GET_CODE (XEXP (x, 2)) && + XEXP (x, 1) == XEXP (XEXP (x, 0), 0)) || + (GET_CODE (XEXP (x, 1)) == REG && GET_CODE (XEXP (x, 2)) && + XEXP (x, 2) == XEXP (XEXP (x, 0), 0)))) + { + *total = 0; + return true; + } else if (LABEL_REF_P (XEXP (x, 1)) && XEXP (x, 2) == pc_rtx) { if (equality_operator (XEXP (x, 0), mode) @@ -3501,6 +3512,120 @@ riscv_expand_conditional_move (rtx dest, rtx op, rtx cons, rtx alt) cond, cons, alt))); return true; } + else if (TARGET_ZICOND + && (code == EQ || code == NE) + && GET_MODE_CLASS (mode) == MODE_INT) + { + need_eq_ne_p = true; + /* 0 + imm */ + if (GET_CODE (cons) == CONST_INT && cons == const0_rtx + && GET_CODE (alt) == CONST_INT && alt != const0_rtx) + { + riscv_emit_int_compare (&code, &op0, &op1, need_eq_ne_p); + rtx cond = gen_rtx_fmt_ee (code, GET_MODE (op0), op0, op1); + alt = force_reg (mode, alt); + emit_insn (gen_rtx_SET (dest, + gen_rtx_IF_THEN_ELSE (mode, cond, + cons, alt))); + return true; + } + /* imm + imm */ + else if (GET_CODE (cons) == CONST_INT && cons != const0_rtx + && GET_CODE (alt) == CONST_INT && alt != const0_rtx) + { + riscv_emit_int_compare (&code, &op0, &op1, need_eq_ne_p); + rtx cond = gen_rtx_fmt_ee (code, GET_MODE (op0), op0, op1); + alt = force_reg (mode, alt); + rtx temp1 = gen_reg_rtx (mode); + rtx temp2 = GEN_INT(-1 * INTVAL (cons)); + riscv_emit_binary(PLUS, temp1, alt, temp2); + emit_insn (gen_rtx_SET (dest, + gen_rtx_IF_THEN_ELSE (mode, cond, + const0_rtx, alt))); + riscv_emit_binary(PLUS, dest, dest, cons); + return true; + } + /* imm + reg */ + else if (GET_CODE (cons) == CONST_INT && cons != const0_rtx + && GET_CODE (alt) == REG) + { + /* Optimize for register value of 0. */ + if (op0 == alt && op1 == const0_rtx) + { + rtx cond = gen_rtx_fmt_ee (code, GET_MODE (op0), op0, op1); + cons = force_reg (mode, cons); + emit_insn (gen_rtx_SET (dest, + gen_rtx_IF_THEN_ELSE (mode, cond, + cons, alt))); + return true; + } + riscv_emit_int_compare (&code, &op0, &op1, need_eq_ne_p); + rtx cond = gen_rtx_fmt_ee (code, GET_MODE (op0), op0, op1); + rtx temp1 = gen_reg_rtx (mode); + rtx temp2 = GEN_INT(-1 * INTVAL (cons)); + riscv_emit_binary(PLUS, temp1, alt, temp2); + emit_insn (gen_rtx_SET (dest, + gen_rtx_IF_THEN_ELSE (mode, cond, + const0_rtx, alt))); + riscv_emit_binary(PLUS, dest, dest, cons); + return true; + } + /* imm + 0 */ + else if (GET_CODE (cons) == CONST_INT && cons != const0_rtx + && GET_CODE (alt) == CONST_INT && alt == const0_rtx) + { + riscv_emit_int_compare (&code, &op0, &op1, need_eq_ne_p); + rtx cond = gen_rtx_fmt_ee (code, GET_MODE (op0), op0, op1); + cons = force_reg (mode, cons); + emit_insn (gen_rtx_SET (dest, + gen_rtx_IF_THEN_ELSE (mode, cond, + cons, alt))); + return true; + } + /* reg + imm */ + else if (GET_CODE (cons) == REG + && GET_CODE (alt) == CONST_INT && alt != const0_rtx) + { + /* Optimize for register value of 0. */ + if (op0 == cons && op1 == const0_rtx) + { + rtx cond = gen_rtx_fmt_ee (code, GET_MODE (op0), op0, op1); + alt = force_reg (mode, alt); + emit_insn (gen_rtx_SET (dest, + gen_rtx_IF_THEN_ELSE (mode, cond, + cons, alt))); + return true; + } + riscv_emit_int_compare (&code, &op0, &op1, need_eq_ne_p); + rtx cond = gen_rtx_fmt_ee (code, GET_MODE (op0), op0, op1); + rtx temp1 = gen_reg_rtx (mode); + rtx temp2 = GEN_INT(-1 * INTVAL (alt)); + riscv_emit_binary(PLUS, temp1, cons, temp2); + emit_insn (gen_rtx_SET (dest, + gen_rtx_IF_THEN_ELSE (mode, cond, + temp1, const0_rtx))); + riscv_emit_binary(PLUS, dest, dest, alt); + return true; + } + /* reg + reg */ + else if (GET_CODE (cons) == REG && GET_CODE (alt) == REG) + { + rtx reg1 = gen_reg_rtx (mode); + rtx reg2 = gen_reg_rtx (mode); + riscv_emit_int_compare (&code, &op0, &op1, need_eq_ne_p); + rtx cond1 = gen_rtx_fmt_ee (code, GET_MODE (op0), op0, op1); + rtx cond2 = gen_rtx_fmt_ee (code == NE ? EQ : NE, + GET_MODE (op0), op0, op1); + emit_insn (gen_rtx_SET (reg2, + gen_rtx_IF_THEN_ELSE (mode, cond2, + const0_rtx, cons))); + emit_insn (gen_rtx_SET (reg1, + gen_rtx_IF_THEN_ELSE (mode, cond1, + const0_rtx, alt))); + riscv_emit_binary(IOR, dest, reg1, reg2); + return true; + } + } return false; } diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md index 6b8c2e8e268..b4147c7a79c 100644 --- a/gcc/config/riscv/riscv.md +++ b/gcc/config/riscv/riscv.md @@ -2484,7 +2484,7 @@ (if_then_else:GPR (match_operand 1 "comparison_operator") (match_operand:GPR 2 "reg_or_0_operand") (match_operand:GPR 3 "sfb_alu_operand")))] - "TARGET_SFB_ALU || TARGET_XTHEADCONDMOV" + "TARGET_SFB_ALU || TARGET_XTHEADCONDMOV || TARGET_ZICOND" { if (riscv_expand_conditional_move (operands[0], operands[1], operands[2], operands[3])) diff --git a/gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics_return_0_imm.c b/gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics_return_0_imm.c new file mode 100644 index 00000000000..4948558a187 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics_return_0_imm.c @@ -0,0 +1,65 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gc_zicond -mabi=lp64d" { target { rv64 } } } */ +/* { dg-options "-march=rv32gc_zicond -mabi=ilp32f" { target { rv32 } } } */ +/* { dg-skip-if "" { *-*-* } {"-O0"} } */ + +long primitiveSemantics_return_0_imm_00(long a, long b) { + return a == 0 ? 0 : 3; +} + +long primitiveSemantics_return_0_imm_01(long a, long b) { + return a != 0 ? 0 : 3; +} + +long primitiveSemantics_return_0_imm_02(long a, long b) { + return a == 0 ? 3 : 0; +} + +long primitiveSemantics_return_0_imm_03(long a, long b) { + return a != 0 ? 3 : 0; +} + +long primitiveSemantics_return_0_imm_04(long a, long b) { + if (a) + b = 0; + else + b = 3; + return b; +} + +long primitiveSemantics_return_0_imm_05(long a, long b) { + if (!a) + b = 0; + else + b = 3; + return b; +} + +int primitiveSemantics_return_0_imm_06(int a, int b) { return a == 0 ? 0 : 3; } + +int primitiveSemantics_return_0_imm_07(int a, int b) { return a != 0 ? 0 : 3; } + +int primitiveSemantics_return_0_imm_08(int a, int b) { return a == 0 ? 3 : 0; } + +int primitiveSemantics_return_0_imm_09(int a, int b) { return a != 0 ? 3 : 0; } + +int primitiveSemantics_return_0_imm_10(int a, int b) { + if (a) + b = 0; + else + b = 3; + return b; +} + +int primitiveSemantics_return_0_imm_11(int a, int b) { + if (!a) + b = 0; + else + b = 3; + return b; +} + +/* { dg-final { scan-assembler-times "czero.eqz" 6 } } */ +/* { dg-final { scan-assembler-times "czero.nez" 6 } } */ +/* { dg-final { scan-assembler-not "beq" } } */ +/* { dg-final { scan-assembler-not "bne" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics_return_imm_imm.c b/gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics_return_imm_imm.c new file mode 100644 index 00000000000..ebdca521373 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics_return_imm_imm.c @@ -0,0 +1,73 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gc_zicond -mabi=lp64d" { target { rv64 } } } */ +/* { dg-options "-march=rv32gc_zicond -mabi=ilp32f" { target { rv32 } } } */ +/* { dg-skip-if "" { *-*-* } {"-O0" "-Os"} } */ + +long primitiveSemantics_return_imm_imm_00(long a, long b) { + return a == 0 ? 4 : 6; +} + +long primitiveSemantics_return_imm_imm_01(long a, long b) { + return a != 0 ? 4 : 6; +} + +long primitiveSemantics_return_imm_imm_02(long a, long b) { + return a == 0 ? 6 : 4; +} + +long primitiveSemantics_return_imm_imm_03(long a, long b) { + return a != 0 ? 6 : 4; +} + +long primitiveSemantics_return_imm_imm_04(long a, long b) { + if (a) + b = 4; + else + b = 6; + return b; +} + +long primitiveSemantics_return_imm_imm_05(long a, long b) { + if (!a) + b = 4; + else + b = 6; + return b; +} + +int primitiveSemantics_return_imm_imm_06(int a, int b) { + return a == 0 ? 4 : 6; +} + +int primitiveSemantics_return_imm_imm_07(int a, int b) { + return a != 0 ? 4 : 6; +} + +int primitiveSemantics_return_imm_imm_08(int a, int b) { + return a == 0 ? 6 : 4; +} + +int primitiveSemantics_return_imm_imm_09(int a, int b) { + return a != 0 ? 6 : 4; +} + +int primitiveSemantics_return_imm_imm_10(int a, int b) { + if (a) + b = 4; + else + b = 6; + return b; +} + +int primitiveSemantics_return_imm_imm_11(int a, int b) { + if (!a) + b = 4; + else + b = 6; + return b; +} + +/* { dg-final { scan-assembler-times "czero.eqz" 6 } } */ +/* { dg-final { scan-assembler-times "czero.nez" 6 } } */ +/* { dg-final { scan-assembler-not "beq" } } */ +/* { dg-final { scan-assembler-not "bne" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics_return_imm_reg.c b/gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics_return_imm_reg.c new file mode 100644 index 00000000000..12c351dbc16 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics_return_imm_reg.c @@ -0,0 +1,65 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gc_zicond -mabi=lp64d" { target { rv64 } } } */ +/* { dg-options "-march=rv32gc_zicond -mabi=ilp32f" { target { rv32 } } } */ +/* { dg-skip-if "" { *-*-* } {"-O0" "-Os"} } */ + +long primitiveSemantics_return_imm_reg_00(long a, long b) { + return a == 0 ? 1 : b; +} + +long primitiveSemantics_return_imm_reg_01(long a, long b) { + return a != 0 ? 1 : b; +} + +long primitiveSemantics_return_imm_reg_02(long a, long b) { + return a == 0 ? b : 1; +} + +long primitiveSemantics_return_imm_reg_03(long a, long b) { + return a != 0 ? b : 1; +} + +long primitiveSemantics_return_imm_reg_04(long a, long b) { + if (a) + b = 1; + return b; +} + +long primitiveSemantics_return_imm_reg_05(long a, long b) { + if (!a) + b = 1; + return b; +} + +int primitiveSemantics_return_imm_reg_06(int a, int b) { + return a == 0 ? 1 : b; +} + +int primitiveSemantics_return_imm_reg_07(int a, int b) { + return a != 0 ? 1 : b; +} + +int primitiveSemantics_return_imm_reg_08(int a, int b) { + return a == 0 ? b : 1; +} + +int primitiveSemantics_return_imm_reg_09(int a, int b) { + return a != 0 ? b : 1; +} + +int primitiveSemantics_return_imm_reg_10(int a, int b) { + if (a) + b = 1; + return b; +} + +int primitiveSemantics_return_imm_reg_11(int a, int b) { + if (!a) + b = 1; + return b; +} + +/* { dg-final { scan-assembler-times "czero.eqz" 6 } } */ +/* { dg-final { scan-assembler-times "czero.nez" 6 } } */ +/* { dg-final { scan-assembler-not "beq" } } */ +/* { dg-final { scan-assembler-not "bne" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics_return_reg_reg.c b/gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics_return_reg_reg.c new file mode 100644 index 00000000000..4708afa645b --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics_return_reg_reg.c @@ -0,0 +1,65 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gc_zicond -mabi=lp64d" { target { rv64 } } } */ +/* { dg-options "-march=rv32gc_zicond -mabi=ilp32f" { target { rv32 } } } */ +/* { dg-skip-if "" { *-*-* } {"-O0" "-Os"} } */ + +long primitiveSemantics_return_reg_reg_00(long a, long b, long c) { + return a == 0 ? c : b; +} + +long primitiveSemantics_return_reg_reg_01(long a, long b, long c) { + return a != 0 ? c : b; +} + +long primitiveSemantics_return_reg_reg_02(long a, long b, long c) { + return a == 0 ? b : c; +} + +long primitiveSemantics_return_reg_reg_03(long a, long b, long c) { + return a != 0 ? b : c; +} + +long primitiveSemantics_return_reg_reg_04(long a, long b, long c) { + if (a) + b = c; + return b; +} + +long primitiveSemantics_return_reg_reg_05(long a, long b, long c) { + if (!a) + b = c; + return b; +} + +int primitiveSemantics_return_reg_reg_06(int a, int b, int c) { + return a == 0 ? c : b; +} + +int primitiveSemantics_return_reg_reg_07(int a, int b, int c) { + return a != 0 ? c : b; +} + +int primitiveSemantics_return_reg_reg_08(int a, int b, int c) { + return a == 0 ? b : c; +} + +int primitiveSemantics_return_reg_reg_09(int a, int b, int c) { + return a != 0 ? b : c; +} + +int primitiveSemantics_return_reg_reg_10(int a, int b, int c) { + if (a) + b = c; + return b; +} + +int primitiveSemantics_return_reg_reg_11(int a, int b, int c) { + if (!a) + b = c; + return b; +} + +/* { dg-final { scan-assembler-times "czero.eqz" 12 } } */ +/* { dg-final { scan-assembler-times "czero.nez" 12 } } */ +/* { dg-final { scan-assembler-not "beq" } } */ +/* { dg-final { scan-assembler-not "bne" } } */ -- 2.17.1