From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pl1-x62e.google.com (mail-pl1-x62e.google.com [IPv6:2607:f8b0:4864:20::62e]) by sourceware.org (Postfix) with ESMTPS id 28449385AF94 for ; Tue, 25 Jul 2023 18:02:26 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 28449385AF94 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivosinc.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivosinc.com Received: by mail-pl1-x62e.google.com with SMTP id d9443c01a7336-1b890e2b9b7so30243435ad.3 for ; Tue, 25 Jul 2023 11:02:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20221208.gappssmtp.com; s=20221208; t=1690308144; x=1690912944; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=1OYhuDDTvH5qEgJixBgpo7QyZU81toZzDudvdvFVj6A=; b=Hg/KqVQanHGILGIxEIun2DScLjsl/0u0eAHG7sZLw9AB9o2v3IvmWb7JWVl4Db9/mU 45aSp0WutgnhrxfCgQKf/22FxOCUXMAb4qHSrV3Ykfn7Hl0x9z3+oqfFcA4avidjHSGd iIzE7mj1NXLuiw3R4mFLR4VfBRNKuhBYlDBgoDdKgOS49hOVvVmfnwZ6z46jlmuYQzOV rONfHXFZJfJW0lA2kwYr2SncqNNYX3N0tb/GVnZ/Q5yIfw7sPZXT6UAAymQ1PROpF7nD eGt6kcrH67rQgVDlrsT4EsV+ai5JOpngApT3bVyeJhfwsYQRr4XFPKdrMH5LDnUg3pnx 2HQg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1690308144; x=1690912944; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=1OYhuDDTvH5qEgJixBgpo7QyZU81toZzDudvdvFVj6A=; b=K0+u87YN9v/+IznHGjly3v871ize/HzyDOPy0KZ3Gm2Kz5mR3Glk+UqG4NyYYTT4eg 4bGmU9hsuAMmlTwst9PxhsXPMPsKSoUE9gLgwFtbnG/c1L7wEtHhZEdEh30guTNMA7Cs hQ3/zCgBZxftL11DiY97iglvcTdKpk2OFTP0uD+G4GFGVzfCjzH18mbCgUagzK8oftNY 0E1Tmq9I4v9rtUpZKHisGj8KDqK+FC6sb2e9CyBqeE/vGhbytWjW+QPy2eabYgehSK6R x+vrXc/dzr1rq0lRrBjPX/iJs4KuGcwAUvZShCNW4rqGUuGeHnFvinhsrOQ9FJNBPLvW ujFQ== X-Gm-Message-State: ABy/qLYmie0mxEBIlZXUdLfKhto5ENtVyK2d+ESmODg2Y1jvCbMcvRV0 q0vZEfSsqKAKMZ07HfcsZYe5xB7ofH0u1LTDx0g= X-Google-Smtp-Source: APBJJlFf3L1gdg2wK/WjkT09CjVlV8ffhsSpIXlkML6icWocTSb05mFzQ77ajAYakXDA3JHroGMJsw== X-Received: by 2002:a17:903:1208:b0:1b9:e591:db38 with SMTP id l8-20020a170903120800b001b9e591db38mr30767plh.8.1690308144502; Tue, 25 Jul 2023 11:02:24 -0700 (PDT) Received: from patrick-ThinkPad-X1-Carbon-Gen-8.hq.rivosinc.com ([50.221.140.188]) by smtp.gmail.com with ESMTPSA id p1-20020a1709028a8100b001b3ce619e2esm11283352plo.179.2023.07.25.11.02.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 Jul 2023 11:02:24 -0700 (PDT) From: Patrick O'Neill To: gcc-patches@gcc.gnu.org Cc: jeffreyalaw@gmail.com, palmer@rivosinc.com, vineetg@rivosinc.com, andrew@sifive.com, kito.cheng@sifive.com, dlustig@nvidia.com, cmuellner@gcc.gnu.org, andrea@rivosinc.com, hboehm@google.com, Patrick O'Neill Subject: [gcc13 backport 00/12] RISC-V: Implement ISA Manual Table A.6 Mappings Date: Tue, 25 Jul 2023 11:01:54 -0700 Message-Id: <20230725180206.284777-1-patrick@rivosinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230427162301.1151333-1-patrick@rivosinc.com> References: <20230427162301.1151333-1-patrick@rivosinc.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-5.6 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,KAM_SHORT,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Discussed during the weekly RISC-V GCC meeting[1] and pre-approved by Jeff Law. If there aren't any objections I'll commit this cherry-picked series on Thursday (July 27th). Patchset on trunk: https://inbox.sourceware.org/gcc-patches/20230427162301.1151333-1-patrick@rivosinc.com/ First commit: f37a36bce81b50a43ec1613c1d08d803642f7506 Also includes bugfix from: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109713 commit: 4bd434fbfc7865961a8e10d7e9601b28765ce7be [1] https://inbox.sourceware.org/gcc/mhng-b7423fca-67ec-4ce4-9694-4e062632ceb0@palmer-ri-x1c9/T/#t Martin Liska (1): riscv: fix error: control reaches end of non-void function Patrick O'Neill (11): RISC-V: Eliminate SYNC memory models RISC-V: Enforce Libatomic LR/SC SEQ_CST RISC-V: Enforce subword atomic LR/SC SEQ_CST RISC-V: Enforce atomic compare_exchange SEQ_CST RISC-V: Add AMO release bits RISC-V: Strengthen atomic stores RISC-V: Eliminate AMO op fences RISC-V: Weaken LR/SC pairs RISC-V: Weaken mem_thread_fence RISC-V: Weaken atomic loads RISC-V: Table A.6 conformance tests gcc/config/riscv/riscv-protos.h | 3 + gcc/config/riscv/riscv.cc | 66 ++++-- gcc/config/riscv/sync.md | 196 ++++++++++++------ .../riscv/amo-table-a-6-amo-add-1.c | 15 ++ .../riscv/amo-table-a-6-amo-add-2.c | 15 ++ .../riscv/amo-table-a-6-amo-add-3.c | 15 ++ .../riscv/amo-table-a-6-amo-add-4.c | 15 ++ .../riscv/amo-table-a-6-amo-add-5.c | 15 ++ .../riscv/amo-table-a-6-compare-exchange-1.c | 9 + .../riscv/amo-table-a-6-compare-exchange-2.c | 9 + .../riscv/amo-table-a-6-compare-exchange-3.c | 9 + .../riscv/amo-table-a-6-compare-exchange-4.c | 9 + .../riscv/amo-table-a-6-compare-exchange-5.c | 9 + .../riscv/amo-table-a-6-compare-exchange-6.c | 10 + .../riscv/amo-table-a-6-compare-exchange-7.c | 9 + .../gcc.target/riscv/amo-table-a-6-fence-1.c | 14 ++ .../gcc.target/riscv/amo-table-a-6-fence-2.c | 15 ++ .../gcc.target/riscv/amo-table-a-6-fence-3.c | 15 ++ .../gcc.target/riscv/amo-table-a-6-fence-4.c | 15 ++ .../gcc.target/riscv/amo-table-a-6-fence-5.c | 15 ++ .../gcc.target/riscv/amo-table-a-6-load-1.c | 16 ++ .../gcc.target/riscv/amo-table-a-6-load-2.c | 17 ++ .../gcc.target/riscv/amo-table-a-6-load-3.c | 18 ++ .../gcc.target/riscv/amo-table-a-6-store-1.c | 16 ++ .../gcc.target/riscv/amo-table-a-6-store-2.c | 17 ++ .../riscv/amo-table-a-6-store-compat-3.c | 18 ++ .../riscv/amo-table-a-6-subword-amo-add-1.c | 9 + .../riscv/amo-table-a-6-subword-amo-add-2.c | 9 + .../riscv/amo-table-a-6-subword-amo-add-3.c | 9 + .../riscv/amo-table-a-6-subword-amo-add-4.c | 9 + .../riscv/amo-table-a-6-subword-amo-add-5.c | 9 + gcc/testsuite/gcc.target/riscv/pr89835.c | 9 + libgcc/config/riscv/atomic.c | 4 +- 33 files changed, 563 insertions(+), 75 deletions(-) create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-3.c create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-4.c create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-5.c create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-3.c create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-4.c create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-5.c create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-6.c create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-7.c create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-fence-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-fence-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-fence-3.c create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-fence-4.c create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-fence-5.c create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-load-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-load-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-load-3.c create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-store-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-store-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-store-compat-3.c create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-3.c create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-4.c create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-5.c create mode 100644 gcc/testsuite/gcc.target/riscv/pr89835.c -- 2.34.1