From: Edwin Lu <ewlu@rivosinc.com>
To: gcc-patches@gcc.gnu.org
Cc: gnu-toolchain@rivosinc.com, Edwin Lu <ewlu@rivosinc.com>,
Vineet Gupta <vineetg@rivosinc.com>
Subject: [PATCH V3] riscv: generate builtin macro for compilation with strict alignment:
Date: Tue, 15 Aug 2023 11:29:10 -0700 [thread overview]
Message-ID: <20230815182913.2824479-1-ewlu@rivosinc.com> (raw)
This patch is a modification of
https://gcc.gnu.org/pipermail/gcc-patches/2023-January/610115.html
following the discussion on
https://github.com/riscv-non-isa/riscv-c-api-doc/issues/32
Distinguish between explicit -mstrict-align and cpu tune param
for slow_unaligned_access=true/false.
Tested for regressions using rv32/64 multilib with newlib/linux
gcc/ChangeLog:
* config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins):
Generate __riscv_unaligned_avoid with value 1 or
__riscv_unaligned_slow with value 1 or
__riscv_unaligned_fast with value 1
* config/riscv/riscv.cc (riscv_option_override):
Define riscv_user_wants_strict_align. Set
riscv_user_wants_strict_align to TARGET_STRICT_ALIGN
* config/riscv/riscv.h: Declare riscv_user_wants_strict_align
gcc/testsuite/ChangeLog:
* gcc.target/riscv/attribute-1.c: Check for
__riscv_unaligned_slow or __riscv_unaligned_fast
* gcc.target/riscv/attribute-4.c: Check for
__riscv_unaligned_avoid
* gcc.target/riscv/attribute-5.c: Check for
__riscv_unaligned_slow or __riscv_unaligned_fast
* gcc.target/riscv/predef-align-1.c: New test.
* gcc.target/riscv/predef-align-2.c: New test.
* gcc.target/riscv/predef-align-3.c: New test.
* gcc.target/riscv/predef-align-4.c: New test.
* gcc.target/riscv/predef-align-5.c: New test.
* gcc.target/riscv/predef-align-6.c: New test.
Signed-off-by: Edwin Lu <ewlu@rivosinc.com>
Co-authored-by: Vineet Gupta <vineetg@rivosinc.com>
---
Changes in V3:
- Clean up tests to be less verbose
- Fix style, comments, and consistency
Changes in V2:
- Updated naming conventions
- Updated tests when -m[no-]strict-align is not explicitly added
---
gcc/config/riscv/riscv-c.cc | 7 +++++++
gcc/config/riscv/riscv.cc | 9 +++++++++
gcc/config/riscv/riscv.h | 1 +
gcc/testsuite/gcc.target/riscv/attribute-1.c | 12 ++++++++++++
gcc/testsuite/gcc.target/riscv/attribute-4.c | 10 ++++++++++
gcc/testsuite/gcc.target/riscv/attribute-5.c | 11 +++++++++++
gcc/testsuite/gcc.target/riscv/predef-align-1.c | 16 ++++++++++++++++
gcc/testsuite/gcc.target/riscv/predef-align-2.c | 15 +++++++++++++++
gcc/testsuite/gcc.target/riscv/predef-align-3.c | 16 ++++++++++++++++
gcc/testsuite/gcc.target/riscv/predef-align-4.c | 16 ++++++++++++++++
gcc/testsuite/gcc.target/riscv/predef-align-5.c | 15 +++++++++++++++
gcc/testsuite/gcc.target/riscv/predef-align-6.c | 16 ++++++++++++++++
12 files changed, 144 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/riscv/predef-align-1.c
create mode 100644 gcc/testsuite/gcc.target/riscv/predef-align-2.c
create mode 100644 gcc/testsuite/gcc.target/riscv/predef-align-3.c
create mode 100644 gcc/testsuite/gcc.target/riscv/predef-align-4.c
create mode 100644 gcc/testsuite/gcc.target/riscv/predef-align-5.c
create mode 100644 gcc/testsuite/gcc.target/riscv/predef-align-6.c
diff --git a/gcc/config/riscv/riscv-c.cc b/gcc/config/riscv/riscv-c.cc
index 2937c160071..283052ae313 100644
--- a/gcc/config/riscv/riscv-c.cc
+++ b/gcc/config/riscv/riscv-c.cc
@@ -108,6 +108,13 @@ riscv_cpu_cpp_builtins (cpp_reader *pfile)
}
+ if (riscv_user_wants_strict_align)
+ builtin_define_with_int_value ("__riscv_unaligned_avoid", 1);
+ else if (riscv_slow_unaligned_access_p)
+ builtin_define_with_int_value ("__riscv_unaligned_slow", 1);
+ else
+ builtin_define_with_int_value ("__riscv_unaligned_fast", 1);
+
if (TARGET_MIN_VLEN != 0)
builtin_define_with_int_value ("__riscv_v_min_vlen", TARGET_MIN_VLEN);
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 49062bef9fc..705b750aaad 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -247,6 +247,9 @@ struct riscv_tune_info {
/* Whether unaligned accesses execute very slowly. */
bool riscv_slow_unaligned_access_p;
+/* Whether user explicitly passed -mstrict-align. */
+bool riscv_user_wants_strict_align;
+
/* Stack alignment to assume/maintain. */
unsigned riscv_stack_boundary;
@@ -6962,6 +6965,12 @@ riscv_option_override (void)
-m[no-]strict-align is left unspecified, heed -mtune's advice. */
riscv_slow_unaligned_access_p = (cpu->tune_param->slow_unaligned_access
|| TARGET_STRICT_ALIGN);
+
+ /* Make a note if user explicity passed -mstrict-align for later
+ builtin macro generation. Can't use target_flags_explicitly since
+ it is set even for -mno-strict-align. */
+ riscv_user_wants_strict_align = TARGET_STRICT_ALIGN;
+
if ((target_flags_explicit & MASK_STRICT_ALIGN) == 0
&& cpu->tune_param->slow_unaligned_access)
target_flags |= MASK_STRICT_ALIGN;
diff --git a/gcc/config/riscv/riscv.h b/gcc/config/riscv/riscv.h
index e18a0081297..e093db09d31 100644
--- a/gcc/config/riscv/riscv.h
+++ b/gcc/config/riscv/riscv.h
@@ -1036,6 +1036,7 @@ while (0)
#ifndef USED_FOR_TARGET
extern const enum reg_class riscv_regno_to_class[];
extern bool riscv_slow_unaligned_access_p;
+extern bool riscv_user_wants_strict_align;
extern unsigned riscv_stack_boundary;
extern unsigned riscv_bytes_per_vector_chunk;
extern poly_uint16 riscv_vector_chunks;
diff --git a/gcc/testsuite/gcc.target/riscv/attribute-1.c b/gcc/testsuite/gcc.target/riscv/attribute-1.c
index bc919c586b6..abfb0b498e0 100644
--- a/gcc/testsuite/gcc.target/riscv/attribute-1.c
+++ b/gcc/testsuite/gcc.target/riscv/attribute-1.c
@@ -2,5 +2,17 @@
/* { dg-options "-mriscv-attribute" } */
int foo()
{
+
+/* In absence of -m[no-]strict-align, default mcpu is currently
+ set to rocket. rocket has slow_unaligned_access=true. */
+#if !defined(__riscv_unaligned_slow)
+#error "__riscv_unaligned_slow is not set"
+#endif
+
+#if defined(__riscv_unaligned_avoid) || defined(__riscv_unaligned_fast)
+#error "__riscv_unaligned_avoid or __riscv_unaligned_fast is unexpectedly set"
+#endif
+
+return 0;
}
/* { dg-final { scan-assembler ".attribute arch" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/attribute-4.c b/gcc/testsuite/gcc.target/riscv/attribute-4.c
index 7c565c4963e..545f87cb899 100644
--- a/gcc/testsuite/gcc.target/riscv/attribute-4.c
+++ b/gcc/testsuite/gcc.target/riscv/attribute-4.c
@@ -2,5 +2,15 @@
/* { dg-options "-mriscv-attribute -mstrict-align" } */
int foo()
{
+
+#if !defined(__riscv_unaligned_avoid)
+#error "__riscv_unaligned_avoid is not set"
+#endif
+
+#if defined(__riscv_unaligned_fast) || defined(__riscv_unaligned_slow)
+#error "__riscv_unaligned_fast or __riscv_unaligned_slow is unexpectedly set"
+#endif
+
+ return 0;
}
/* { dg-final { scan-assembler ".attribute unaligned_access, 0" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/attribute-5.c b/gcc/testsuite/gcc.target/riscv/attribute-5.c
index ee9cf693be6..753043c31e9 100644
--- a/gcc/testsuite/gcc.target/riscv/attribute-5.c
+++ b/gcc/testsuite/gcc.target/riscv/attribute-5.c
@@ -2,5 +2,16 @@
/* { dg-options "-mriscv-attribute -mno-strict-align" } */
int foo()
{
+
+/* Default mcpu is rocket which has slow_unaligned_access=true. */
+#if !defined(__riscv_unaligned_slow)
+#error "__riscv_unaligned_slow is not set"
+#endif
+
+#if defined(__riscv_unaligned_avoid) || defined(__riscv_unaligned_fast)
+#error "__riscv_unaligned_avoid or __riscv_unaligned_fast is unexpectedly set"
+#endif
+
+return 0;
}
/* { dg-final { scan-assembler ".attribute unaligned_access, 1" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/predef-align-1.c b/gcc/testsuite/gcc.target/riscv/predef-align-1.c
new file mode 100644
index 00000000000..9dde37a721e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/predef-align-1.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-mtune=thead-c906" } */
+
+int main() {
+
+/* thead-c906 default is cpu tune param unaligned access fast */
+#if !defined(__riscv_unaligned_fast)
+#error "__riscv_unaligned_fast is not set"
+#endif
+
+#if defined(__riscv_unaligned_avoid) || defined(__riscv_unaligned_slow)
+#error "__riscv_unaligned_avoid or __riscv_unaligned_slow is unexpectedly set"
+#endif
+
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.target/riscv/predef-align-2.c b/gcc/testsuite/gcc.target/riscv/predef-align-2.c
new file mode 100644
index 00000000000..33d604f5aa0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/predef-align-2.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-mtune=thead-c906 -mstrict-align" } */
+
+int main() {
+
+#if !defined(__riscv_unaligned_avoid)
+#error "__riscv_unaligned_avoid is not set"
+#endif
+
+#if defined(__riscv_unaligned_fast) || defined(__riscv_unaligned_slow)
+#error "__riscv_unaligned_fast or __riscv_unaligned_slow is unexpectedly set"
+#endif
+
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.target/riscv/predef-align-3.c b/gcc/testsuite/gcc.target/riscv/predef-align-3.c
new file mode 100644
index 00000000000..daf5718a39f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/predef-align-3.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-mtune=thead-c906 -mno-strict-align" } */
+
+int main() {
+
+/* thead-c906 default is cpu tune param unaligned access fast */
+#if !defined(__riscv_unaligned_fast)
+#error "__riscv_unaligned_fast is not set"
+#endif
+
+#if defined(__riscv_unaligned_avoid) || defined(__riscv_unaligned_slow)
+#error "__riscv_unaligned_avoid or __riscv_unaligned_slow is unexpectedly set"
+#endif
+
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.target/riscv/predef-align-4.c b/gcc/testsuite/gcc.target/riscv/predef-align-4.c
new file mode 100644
index 00000000000..d46a46f252d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/predef-align-4.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-mtune=rocket" } */
+
+int main() {
+
+/* rocket default is cpu tune param unaligned access slow */
+#if !defined(__riscv_unaligned_slow)
+#error "__riscv_unaligned_slow is not set"
+#endif
+
+#if defined(__riscv_unaligned_avoid) || defined(__riscv_unaligned_fast)
+#error "__riscv_unaligned_avoid or __riscv_unaligned_fast is unexpectedly set"
+#endif
+
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.target/riscv/predef-align-5.c b/gcc/testsuite/gcc.target/riscv/predef-align-5.c
new file mode 100644
index 00000000000..3aa25f8e0e0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/predef-align-5.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-mtune=rocket -mstrict-align" } */
+
+int main() {
+
+#if !defined(__riscv_unaligned_avoid)
+#error "__riscv_unaligned_avoid is not set"
+#endif
+
+#if defined(__riscv_unaligned_fast) || defined(__riscv_unaligned_slow)
+#error "__riscv_unaligned_fast or __riscv_unaligned_slow is unexpectedly set"
+#endif
+
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.target/riscv/predef-align-6.c b/gcc/testsuite/gcc.target/riscv/predef-align-6.c
new file mode 100644
index 00000000000..cb64d7e7778
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/predef-align-6.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-mtune=rocket -mno-strict-align" } */
+
+int main() {
+
+/* rocket default is cpu tune param unaligned access slow */
+#if !defined(__riscv_unaligned_slow)
+#error "__riscv_unaligned_slow is not set"
+#endif
+
+#if defined(__riscv_unaligned_avoid) || defined(__riscv_unaligned_fast)
+#error "__riscv_unaligned_avoid or __riscv_unaligned_fast is unexpectedly set"
+#endif
+
+ return 0;
+}
--
2.34.1
next reply other threads:[~2023-08-15 18:29 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-15 18:29 Edwin Lu [this message]
2023-08-28 22:40 ` Jeff Law
2023-08-29 15:48 ` [Committed] " Edwin Lu
2023-08-29 15:53 ` Palmer Dabbelt
2023-08-29 16:12 ` Edwin Lu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230815182913.2824479-1-ewlu@rivosinc.com \
--to=ewlu@rivosinc.com \
--cc=gcc-patches@gcc.gnu.org \
--cc=gnu-toolchain@rivosinc.com \
--cc=vineetg@rivosinc.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).