* [PATCH] RISC-V: Add rotate immediate regression test
@ 2023-08-16 23:14 Patrick O'Neill
2023-08-16 23:18 ` Andrew Pinski
2023-08-17 1:17 ` [PATCH v2] RISCV: " Patrick O'Neill
0 siblings, 2 replies; 6+ messages in thread
From: Patrick O'Neill @ 2023-08-16 23:14 UTC (permalink / raw)
To: gcc-patches
Cc: wangfeng, jeffreyalaw, gnu-toolchain, palmer, charlie,
Patrick O'Neill
This adds new regression tests to ensure half-register rotations are
correctly optimized into rori instructions.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/zbb-rol-ror-04.c: Add half-register rotation
cases.
* gcc.target/riscv/zbb-rol-ror-05.c: Add half-register rotation
case.
Co-authored-by: Charlie Jenkins <charlie@rivosinc.com>
Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
---
Trunk optimized these added testcases correctly.
GCC 13.2 and earlier do not optimize these cases correctly.
Expands on testcases added in:
https://gcc.gnu.org/git/?p=gcc.git;a=commit;f=gcc/testsuite/gcc.target/riscv/zbb-rol-ror-04.c;h=0ccf520d349a82dafca0deb3d307a1080e8589a0
---
.../gcc.target/riscv/zbb-rol-ror-04.c | 20 +++++++++++++++++++
.../gcc.target/riscv/zbb-rol-ror-05.c | 10 ++++++++++
2 files changed, 30 insertions(+)
diff --git a/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-04.c b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-04.c
index 7ef4c29dd5b..dcd7be874ab 100644
--- a/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-04.c
+++ b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-04.c
@@ -51,3 +51,23 @@ unsigned int foo5(unsigned int rs1, unsigned int rs2)
{
return (rs1 >> rs2) | (rs1 << (32 - rs2));
}
+
+/*
+**foo6:
+** rori a0,a0,32
+** ret
+*/
+unsigned long foo6(unsigned long rotate)
+{
+ return (rotate << 32) | (rotate >> 32);
+}
+
+/*
+**foo7:
+** roriw a0,a0,16
+** ret
+*/
+unsigned int foo7(unsigned int rotate)
+{
+ return (rotate << 16) | (rotate >> 16);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-05.c b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-05.c
index 2108ccc3e77..5ae1d4a92d9 100644
--- a/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-05.c
+++ b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-05.c
@@ -23,3 +23,13 @@ unsigned int foo2(unsigned int rs1)
{
return (rs1 << 10) | (rs1 >> 22);
}
+
+/*
+**foo3:
+** rori a0,a0,16
+** ret
+*/
+unsigned int foo3(unsigned int rs1)
+{
+ return (rs1 << 16) | (rs1 >> 16);
+}
--
2.34.1
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH] RISC-V: Add rotate immediate regression test
2023-08-16 23:14 [PATCH] RISC-V: Add rotate immediate regression test Patrick O'Neill
@ 2023-08-16 23:18 ` Andrew Pinski
2023-08-17 1:17 ` [PATCH v2] RISCV: " Patrick O'Neill
1 sibling, 0 replies; 6+ messages in thread
From: Andrew Pinski @ 2023-08-16 23:18 UTC (permalink / raw)
To: Patrick O'Neill
Cc: gcc-patches, wangfeng, jeffreyalaw, gnu-toolchain, palmer, charlie
On Wed, Aug 16, 2023 at 4:15 PM Patrick O'Neill <patrick@rivosinc.com> wrote:
>
> This adds new regression tests to ensure half-register rotations are
> correctly optimized into rori instructions.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/riscv/zbb-rol-ror-04.c: Add half-register rotation
> cases.
> * gcc.target/riscv/zbb-rol-ror-05.c: Add half-register rotation
> case.
My suggestion is to add a new file instead of appending the testcase.
Thanks,
Andrew Pinski
>
> Co-authored-by: Charlie Jenkins <charlie@rivosinc.com>
> Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
> ---
> Trunk optimized these added testcases correctly.
> GCC 13.2 and earlier do not optimize these cases correctly.
>
> Expands on testcases added in:
> https://gcc.gnu.org/git/?p=gcc.git;a=commit;f=gcc/testsuite/gcc.target/riscv/zbb-rol-ror-04.c;h=0ccf520d349a82dafca0deb3d307a1080e8589a0
> ---
> .../gcc.target/riscv/zbb-rol-ror-04.c | 20 +++++++++++++++++++
> .../gcc.target/riscv/zbb-rol-ror-05.c | 10 ++++++++++
> 2 files changed, 30 insertions(+)
>
> diff --git a/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-04.c b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-04.c
> index 7ef4c29dd5b..dcd7be874ab 100644
> --- a/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-04.c
> +++ b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-04.c
> @@ -51,3 +51,23 @@ unsigned int foo5(unsigned int rs1, unsigned int rs2)
> {
> return (rs1 >> rs2) | (rs1 << (32 - rs2));
> }
> +
> +/*
> +**foo6:
> +** rori a0,a0,32
> +** ret
> +*/
> +unsigned long foo6(unsigned long rotate)
> +{
> + return (rotate << 32) | (rotate >> 32);
> +}
> +
> +/*
> +**foo7:
> +** roriw a0,a0,16
> +** ret
> +*/
> +unsigned int foo7(unsigned int rotate)
> +{
> + return (rotate << 16) | (rotate >> 16);
> +}
> diff --git a/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-05.c b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-05.c
> index 2108ccc3e77..5ae1d4a92d9 100644
> --- a/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-05.c
> +++ b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-05.c
> @@ -23,3 +23,13 @@ unsigned int foo2(unsigned int rs1)
> {
> return (rs1 << 10) | (rs1 >> 22);
> }
> +
> +/*
> +**foo3:
> +** rori a0,a0,16
> +** ret
> +*/
> +unsigned int foo3(unsigned int rs1)
> +{
> + return (rs1 << 16) | (rs1 >> 16);
> +}
> --
> 2.34.1
>
>
^ permalink raw reply [flat|nested] 6+ messages in thread* [PATCH v2] RISCV: Add rotate immediate regression test
2023-08-16 23:14 [PATCH] RISC-V: Add rotate immediate regression test Patrick O'Neill
2023-08-16 23:18 ` Andrew Pinski
@ 2023-08-17 1:17 ` Patrick O'Neill
2023-08-17 4:36 ` Jeff Law
1 sibling, 1 reply; 6+ messages in thread
From: Patrick O'Neill @ 2023-08-17 1:17 UTC (permalink / raw)
To: gcc-patches, pinskia
Cc: wangfeng, jeffreyalaw, gnu-toolchain, palmer, charlie,
Patrick O'Neill
This adds new regression tests to ensure half-register rotations are
correctly optimized into rori instructions.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/zbb-rol-ror-08.c: New test.
* gcc.target/riscv/zbb-rol-ror-09.c: New test.
Co-authored-by: Charlie Jenkins <charlie@rivosinc.com>
Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
---
Trunk optimized these added testcases correctly.
GCC 13.2 and earlier do not optimize these cases correctly.
Expands on testcases added in:
https://gcc.gnu.org/git/?p=gcc.git;a=commit;f=gcc/testsuite/gcc.target/riscv/zbb-rol-ror-04.c;h=0ccf520d349a82dafca0deb3d307a1080e8589a0
---
V2 Changes:
Move testcases to new files.
---
.../gcc.target/riscv/zbb-rol-ror-08.c | 25 +++++++++++++++++++
.../gcc.target/riscv/zbb-rol-ror-09.c | 15 +++++++++++
2 files changed, 40 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/riscv/zbb-rol-ror-08.c
create mode 100644 gcc/testsuite/gcc.target/riscv/zbb-rol-ror-09.c
diff --git a/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-08.c b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-08.c
new file mode 100644
index 00000000000..30696f3bb32
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-08.c
@@ -0,0 +1,25 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc_zbb -mabi=lp64d -fno-lto -O2" } */
+/* { dg-skip-if "" { *-*-* } { "-g" } } */
+/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-final { scan-assembler-not "and" } } */
+
+/*
+**foo1:
+** rori a0,a0,32
+** ret
+*/
+unsigned long foo1(unsigned long rotate)
+{
+ return (rotate << 32) | (rotate >> 32);
+}
+
+/*
+**foo2:
+** roriw a0,a0,16
+** ret
+*/
+unsigned int foo2(unsigned int rotate)
+{
+ return (rotate << 16) | (rotate >> 16);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-09.c b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-09.c
new file mode 100644
index 00000000000..a3054553e18
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-09.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gc_zbb -mabi=ilp32 -fno-lto -O2" } */
+/* { dg-skip-if "" { *-*-* } { "-g" } } */
+/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-final { scan-assembler-not "and" } } */
+
+/*
+**foo1:
+** rori a0,a0,16
+** ret
+*/
+unsigned int foo1(unsigned int rs1)
+{
+ return (rs1 << 16) | (rs1 >> 16);
+}
--
2.34.1
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH v2] RISCV: Add rotate immediate regression test
2023-08-17 1:17 ` [PATCH v2] RISCV: " Patrick O'Neill
@ 2023-08-17 4:36 ` Jeff Law
2023-08-17 17:10 ` [Committed] " Patrick O'Neill
0 siblings, 1 reply; 6+ messages in thread
From: Jeff Law @ 2023-08-17 4:36 UTC (permalink / raw)
To: Patrick O'Neill, gcc-patches, pinskia
Cc: wangfeng, gnu-toolchain, palmer, charlie
On 8/16/23 19:17, Patrick O'Neill wrote:
> This adds new regression tests to ensure half-register rotations are
> correctly optimized into rori instructions.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/riscv/zbb-rol-ror-08.c: New test.
> * gcc.target/riscv/zbb-rol-ror-09.c: New test.
>
> Co-authored-by: Charlie Jenkins <charlie@rivosinc.com>
> Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
OK
jeff
^ permalink raw reply [flat|nested] 6+ messages in thread
* [Committed] RISCV: Add rotate immediate regression test
2023-08-17 4:36 ` Jeff Law
@ 2023-08-17 17:10 ` Patrick O'Neill
2023-08-17 17:40 ` Palmer Dabbelt
0 siblings, 1 reply; 6+ messages in thread
From: Patrick O'Neill @ 2023-08-17 17:10 UTC (permalink / raw)
To: Jeff Law, gcc-patches, pinskia; +Cc: wangfeng, gnu-toolchain, palmer, charlie
On 8/16/23 21:36, Jeff Law wrote:
>
>
> On 8/16/23 19:17, Patrick O'Neill wrote:
>> This adds new regression tests to ensure half-register rotations are
>> correctly optimized into rori instructions.
>>
>> gcc/testsuite/ChangeLog:
>>
>> * gcc.target/riscv/zbb-rol-ror-08.c: New test.
>> * gcc.target/riscv/zbb-rol-ror-09.c: New test.
>>
>> Co-authored-by: Charlie Jenkins <charlie@rivosinc.com>
>> Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
> OK
> jeff
Committed
Patrick
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [Committed] RISCV: Add rotate immediate regression test
2023-08-17 17:10 ` [Committed] " Patrick O'Neill
@ 2023-08-17 17:40 ` Palmer Dabbelt
0 siblings, 0 replies; 6+ messages in thread
From: Palmer Dabbelt @ 2023-08-17 17:40 UTC (permalink / raw)
To: Patrick O'Neill
Cc: jeffreyalaw, gcc-patches, pinskia, wangfeng, gnu-toolchain,
Charlie Jenkins
On Thu, 17 Aug 2023 10:10:38 PDT (-0700), Patrick O'Neill wrote:
> On 8/16/23 21:36, Jeff Law wrote:
>
>>
>>
>> On 8/16/23 19:17, Patrick O'Neill wrote:
>>> This adds new regression tests to ensure half-register rotations are
>>> correctly optimized into rori instructions.
>>>
>>> gcc/testsuite/ChangeLog:
>>>
>>> * gcc.target/riscv/zbb-rol-ror-08.c: New test.
>>> * gcc.target/riscv/zbb-rol-ror-09.c: New test.
>>>
>>> Co-authored-by: Charlie Jenkins <charlie@rivosinc.com>
>>> Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
>> OK
>> jeff
> Committed
IIRC this came up in the context of Linux's TCP checksum code.
> Patrick
^ permalink raw reply [flat|nested] 6+ messages in thread
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2023-08-16 23:14 [PATCH] RISC-V: Add rotate immediate regression test Patrick O'Neill
2023-08-16 23:18 ` Andrew Pinski
2023-08-17 1:17 ` [PATCH v2] RISCV: " Patrick O'Neill
2023-08-17 4:36 ` Jeff Law
2023-08-17 17:10 ` [Committed] " Patrick O'Neill
2023-08-17 17:40 ` Palmer Dabbelt
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