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From: "Fei Gao" <gaofei@eswincomputing.com>
To: "Kito Cheng" <kito.cheng@gmail.com>
Cc: gcc-patches <gcc-patches@gcc.gnu.org>,
	 "Palmer Dabbelt" <palmer@dabbelt.com>,
	 jeffreyalaw <jeffreyalaw@gmail.com>,
	 Sinan <sinan.lin@linux.alibaba.com>,
	 jiawei <jiawei@iscas.ac.cn>,
	 eri-sw-toolchain <eri-sw-toolchain@eswincomputing.com>
Subject: Re: Re: [PATCH 1/4][V4][RISC-V] support cm.push cm.pop cm.popret in zcmp
Date: Sun, 20 Aug 2023 18:53:48 +0800	[thread overview]
Message-ID: <20230820185347870694172@eswincomputing.com> (raw)
In-Reply-To: <CA+yXCZBX7L3fGodDJuF1ZO6MCt349UeuQEMaft1g5Ayc7-eBzA@mail.gmail.com>


Hi Kito

This issue is due to zcmp and shrink-wrap-separate conflict,
which has been addressed by an under-review patch.
[PATCH 0/2] resolve confilct between RISC-V zcmp and shrink-wrap-separate
https://patchwork.sourceware.org/project/gcc/list/?series=21577
https://www.mail-archive.com/gcc-patches@gcc.gnu.org/msg311487.html

I'm making  [PATCH 1/4][V5][RISC-V] support cm.push cm.pop cm.popret in zcmp for the 1st issue you catched.
Please let me know if you want me to merge 
https://www.mail-archive.com/gcc-patches@gcc.gnu.org/msg311486.html
into [PATCH 1/4][V5][RISC-V].

BR, 
Fei
On 2023-08-16 16:38  Kito Cheng <kito.cheng@gmail.com> wrote:
>
>Another fail case for CFI:
>
>$ riscv64-unknown-elf-gcc _mulhc3.i
>-march=rv64imafd_zicsr_zifencei_zca_zcmp -mabi=lp64d -g  -O2  -o
>_mulhc3.s
>
>typedef float a __attribute__((mode(HF)));
>b, c;
>f() {
> a a, d, e = a + d;
> if (g() && e)
>   c = b;
>}
>
>
>0x10e508a maybe_record_trace_start
>       ../../../../riscv-gnu-toolchain-trunk/gcc/gcc/dwarf2cfi.cc:2584
>0x10e58fb scan_trace
>       ../../../../riscv-gnu-toolchain-trunk/gcc/gcc/dwarf2cfi.cc:2784
>0x10e5fab create_cfi_notes
>       ../../../../riscv-gnu-toolchain-trunk/gcc/gcc/dwarf2cfi.cc:2938
>0x10e6ee4 execute_dwarf2_frame
>       ../../../../riscv-gnu-toolchain-trunk/gcc/gcc/dwarf2cfi.cc:3309
>0x10e7c5a execute
>       ../../../../riscv-gnu-toolchain-trunk/gcc/gcc/dwarf2cfi.cc:3797
>
>On Wed, Aug 16, 2023 at 4:33 PM Kito Cheng <kito.cheng@gmail.com> wrote:
>>
>> Hi Fei:
>>
>> Tried to use Jiawei's patch to test this patch and found some issue:
>>
>>
>> > @@ -5430,13 +5632,15 @@ riscv_expand_prologue (void)
>> >    /* Save the registers.  */
>> >    if ((frame->mask | frame->fmask) != 0)
>> >      {
>> > -      HOST_WIDE_INT step1 = riscv_first_stack_step (frame, remaining_size);
>> > -
>> > -      insn = gen_add3_insn (stack_pointer_rtx,
>> > -                           stack_pointer_rtx,
>> > -                           GEN_INT (-step1));
>> > -      RTX_FRAME_RELATED_P (emit_insn (insn)) = 1;
>> > -      remaining_size -= step1;
>> > +      if (known_gt (remaining_size, frame->frame_pointer_offset))
>> > +        {
>> > +          HOST_WIDE_INT step1 = riscv_first_stack_step (frame, remaining_size);
>> > +          remaining_size -= step1;
>> > +          insn = gen_add3_insn (stack_pointer_rtx,
>> > +                                stack_pointer_rtx,
>> > +                                GEN_INT (-step1));
>> > +          RTX_FRAME_RELATED_P (emit_insn (insn)) = 1;
>> > +        }
>> >        riscv_for_each_saved_reg (remaining_size, riscv_save_reg, false, false);
>> >      }
>> >
>>
>> I hit some issue here during building libgcc, I use
>> riscv-gnu-toolchain with --with-arch=rv64gzca_zcmp
>>
>> And the error message is:
>>
>> In file included from
>> ../../../../../riscv-gnu-toolchain-trunk/gcc/libgcc/unwind-dw2.c:1471:
>> ../../../../../riscv-gnu-toolchain-trunk/gcc/libgcc/unwind.inc: In
>> function '_Unwind_Backtrace':
>> ../../../../../riscv-gnu-toolchain-trunk/gcc/libgcc/unwind.inc:330:1:
>> internal compiler error: in gen_reg_rtx, at emit-rtl.cc:1176
>>  330 | }
>>      | ^
>> 0x83753a gen_reg_rtx(machine_mode)
>>        ../../../../riscv-gnu-toolchain-trunk/gcc/gcc/emit-rtl.cc:1176
>> 0xf5566f maybe_legitimize_operand
>>        ../../../../riscv-gnu-toolchain-trunk/gcc/gcc/optabs.cc:8047
>> 0xf5566f maybe_legitimize_operands(insn_code, unsigned int, unsigned
>> int, expand_operand*)
>>        ../../../../riscv-gnu-toolchain-trunk/gcc/gcc/optabs.cc:8191
>> 0xf511d9 maybe_gen_insn(insn_code, unsigned int, expand_operand*)
>>        ../../../../riscv-gnu-toolchain-trunk/gcc/gcc/optabs.cc:8210
>> 0xf58539 expand_binop_directly
>>        ../../../../riscv-gnu-toolchain-trunk/gcc/gcc/optabs.cc:1452
>> 0xf56666 expand_binop(machine_mode, optab_tag, rtx_def*, rtx_def*,
>> rtx_def*, int, optab_methods)
>>        ../../../../riscv-gnu-toolchain-trunk/gcc/gcc/optabs.cc:1539
>> 0xcbfdd0 force_operand(rtx_def*, rtx_def*)
>>        ../../../../riscv-gnu-toolchain-trunk/gcc/gcc/expr.cc:8231
>> 0xc8fca1 force_reg(machine_mode, rtx_def*)
>>        ../../../../riscv-gnu-toolchain-trunk/gcc/gcc/explow.cc:687
>> 0x144b8cd riscv_force_temporary
>>        ../../../../riscv-gnu-toolchain-trunk/gcc/gcc/config/riscv/riscv.cc:1531
>> 0x144b8cd riscv_force_address
>>        ../../../../riscv-gnu-toolchain-trunk/gcc/gcc/config/riscv/riscv.cc:1528
>> 0x144b8cd riscv_legitimize_move(machine_mode, rtx_def*, rtx_def*)
>>        ../../../../riscv-gnu-toolchain-trunk/gcc/gcc/config/riscv/riscv.cc:2387
>> 0x1af063e gen_movdf(rtx_def*, rtx_def*)
>>        ../../../../riscv-gnu-toolchain-trunk/gcc/gcc/config/riscv/riscv.md:2107
>> 0xcba503 rtx_insn* insn_gen_fn::operator()<rtx_def*,
>> rtx_def*>(rtx_def*, rtx_def*) const
>>        ../../../../riscv-gnu-toolchain-trunk/gcc/gcc/recog.h:411
>> 0xcba503 emit_move_insn_1(rtx_def*, rtx_def*)
>>        ../../../../riscv-gnu-toolchain-trunk/gcc/gcc/expr.cc:4164
>> 0x143d6c4 riscv_emit_move(rtx_def*, rtx_def*)
>>        ../../../../riscv-gnu-toolchain-trunk/gcc/gcc/config/riscv/riscv.cc:1486
>> 0x143d6c4 riscv_save_reg
>>        ../../../../riscv-gnu-toolchain-trunk/gcc/gcc/config/riscv/riscv.cc:5715
>> 0x143e2b9 riscv_for_each_saved_reg
>>        ../../../../riscv-gnu-toolchain-trunk/gcc/gcc/config/riscv/riscv.cc:5904
>> 0x14480d0 riscv_expand_prologue()
>>        ../../../../riscv-gnu-toolchain-trunk/gcc/gcc/config/riscv/riscv.cc:6156
>> 0x1af57fb gen_prologue()
>>        ../../../../riscv-gnu-toolchain-trunk/gcc/gcc/config/riscv/riscv.md:2816
>> 0x143c746 target_gen_prologue
>>        ../../../../riscv-gnu-toolchain-trunk/gcc/gcc/config/riscv/riscv.md:3302
>>
>>
>> Reduced case:
>>
>> $ riscv64-unknown-elf-gcc -march=rv64imafd_zicsr_zifencei_zca_zcmp
>> -mabi=lp64d  unwind-dw2.i -Os
>>
>> typedef struct {
>>  struct {
>>    struct {
>>      struct {
>>        long a
>>      }
>>    } a[129]
>>  }
>> } b;
>> struct c {
>>  void *a[129]
>> } d() {
>>  struct c a;
>>  __builtin_unwind_init();
>>  b e;
>>  f(a, &e);
>> }

  parent reply	other threads:[~2023-08-20 10:53 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-07  5:52 [PATCH 0/4] [RISC-V] support zcmp extention Fei Gao
2023-06-07  5:52 ` [PATCH 1/4][V4][RISC-V] support cm.push cm.pop cm.popret in zcmp Fei Gao
2023-06-07 10:11   ` jiawei
2023-08-16  8:33   ` Kito Cheng
2023-08-16  8:38     ` Kito Cheng
2023-08-16  9:03       ` Fei Gao
2023-08-20 10:53       ` Fei Gao [this message]
2023-08-28  8:04         ` Fei Gao
2023-08-17 11:39     ` Fei Gao
2023-06-07  5:52 ` [PATCH 2/4] [RISC-V] support cm.popretz " Fei Gao
2023-07-13  8:31   ` Kito Cheng
2023-06-07  5:52 ` [PATCH 3/4] [RISC-V] resolve confilct between zcmp multi push/pop and shrink-wrap-separate Fei Gao
2023-06-12 15:17   ` Kito Cheng
2023-06-12 19:26   ` Jeff Law
2023-06-13  2:35     ` Fei Gao
2023-06-07  5:52 ` [PATCH 4/4] [RISC-V] support cm.mva01s cm.mvsa01 in zcmp Fei Gao
2023-07-13  8:18   ` Kito Cheng

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