From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.120]) by sourceware.org (Postfix) with ESMTPS id 723B93858D33 for ; Tue, 22 Aug 2023 04:19:34 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 723B93858D33 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=intel.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1692677974; x=1724213974; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=w0KDUuehteGTcJ8uAI39CKccUelEen0z+hEHctvbO0M=; b=PPrc+1A3++6piuZviq2OEwG3LPIFXUJTuudRu7eti1N00onWh2MrhX9f 9HZ8WuXdXH5PAgDm4cUUIjx+aF3wA4en2Jt2vH1Es0FftozYL4GSoLdXV 2xm0NG1n8Y0MjtBfYYgLzqxyIDH1WUCVhXLLVeIYRgbTAyAe85A4iuzes 2nqw+ytV5+N85DGBZt+k4chBWVM8kLsSkQboqfihbl/w/MWZo3vV7M1/B UxoVMmUc6V2ehHTQVKOKAJv6vdiMwqNxd8nIrtk5ta5oQUp6wvorbjoEP xa7zAXje7WW2nXYH8g1kiTTid+ViGaA82onkCc7EyQ/oedNYovaGYthzc Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10809"; a="372666413" X-IronPort-AV: E=Sophos;i="6.01,192,1684825200"; d="scan'208";a="372666413" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Aug 2023 21:19:33 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10809"; a="982728361" X-IronPort-AV: E=Sophos;i="6.01,192,1684825200"; d="scan'208";a="982728361" Received: from shvmail03.sh.intel.com ([10.239.245.20]) by fmsmga006.fm.intel.com with ESMTP; 21 Aug 2023 21:19:26 -0700 Received: from pli-ubuntu.sh.intel.com (pli-ubuntu.sh.intel.com [10.239.159.47]) by shvmail03.sh.intel.com (Postfix) with ESMTP id 3900010056FA; Tue, 22 Aug 2023 12:19:26 +0800 (CST) From: pan2.li@intel.com To: gcc-patches@gcc.gnu.org Cc: juzhe.zhong@rivai.ai, rdapp.gcc@gmail.com, jeffreyalaw@gmail.com, pan2.li@intel.com, yanzhang.wang@intel.com, kito.cheng@gmail.com Subject: [PATCH v2] RISC-V: Refactor RVV class by frm_op_type template arg Date: Tue, 22 Aug 2023 12:19:24 +0800 Message-Id: <20230822041924.1861884-1-pan2.li@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230818025355.3280223-1-pan2.li@intel.com> References: <20230818025355.3280223-1-pan2.li@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-11.2 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,GIT_PATCH_0,SPF_HELO_NONE,SPF_NONE,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: From: Pan Li Update in v2: * Added gcc_assert for vx format in binop. * Passed riscv/rvv.exp test. Original Log: As suggested by kito, we will add new frm_opt_type template arg to the op class, to avoid the duplicated function expand. Signed-off-by: Pan Li gcc/ChangeLog: * config/riscv/riscv-vector-builtins-bases.cc (class binop_frm): Removed. (class reverse_binop_frm): Ditto. (class widen_binop_frm): Ditto. (class vfmacc_frm): Ditto. (class vfnmacc_frm): Ditto. (class vfmsac_frm): Ditto. (class vfnmsac_frm): Ditto. (class vfmadd_frm): Ditto. (class vfnmadd_frm): Ditto. (class vfmsub_frm): Ditto. (class vfnmsub_frm): Ditto. (class vfwmacc_frm): Ditto. (class vfwnmacc_frm): Ditto. (class vfwmsac_frm): Ditto. (class vfwnmsac_frm): Ditto. (class unop_frm): Ditto. (class vfrec7_frm): Ditto. (class binop): Add frm_op_type template arg. (class unop): Ditto. (class widen_binop): Ditto. (class widen_binop_fp): Ditto. (class reverse_binop): Ditto. (class vfmacc): Ditto. (class vfnmsac): Ditto. (class vfmadd): Ditto. (class vfnmsub): Ditto. (class vfnmacc): Ditto. (class vfmsac): Ditto. (class vfnmadd): Ditto. (class vfmsub): Ditto. (class vfwmacc): Ditto. (class vfwnmacc): Ditto. (class vfwmsac): Ditto. (class vfwnmsac): Ditto. (class float_misc): Ditto. --- .../riscv/riscv-vector-builtins-bases.cc | 571 +++++------------- 1 file changed, 143 insertions(+), 428 deletions(-) diff --git a/gcc/config/riscv/riscv-vector-builtins-bases.cc b/gcc/config/riscv/riscv-vector-builtins-bases.cc index 5ee7d3119db..54582ee130c 100644 --- a/gcc/config/riscv/riscv-vector-builtins-bases.cc +++ b/gcc/config/riscv/riscv-vector-builtins-bases.cc @@ -262,41 +262,21 @@ public: vremu/vsadd/vsaddu/vssub/vssubu vfadd/vfsub/ */ -template +template class binop : public function_base { public: - rtx expand (function_expander &e) const override + bool has_rounding_mode_operand_p () const override { - switch (e.op_info->op) - { - case OP_TYPE_vx: - case OP_TYPE_vf: - return e.use_exact_insn (code_for_pred_scalar (CODE, e.vector_mode ())); - case OP_TYPE_vv: - return e.use_exact_insn (code_for_pred (CODE, e.vector_mode ())); - default: - gcc_unreachable (); - } + return FRM_OP == HAS_FRM; } -}; - -/* Implements below instructions for now. - - vfadd - - vfsub - - vfmul - - vfdiv -*/ -template -class binop_frm : public function_base -{ -public: - bool has_rounding_mode_operand_p () const override { return true; } rtx expand (function_expander &e) const override { switch (e.op_info->op) { + case OP_TYPE_vx: + gcc_assert (FRM_OP == NO_FRM); case OP_TYPE_vf: return e.use_exact_insn (code_for_pred_scalar (CODE, e.vector_mode ())); case OP_TYPE_vv: @@ -307,365 +287,6 @@ public: } }; -/* Implements below instructions for frm - - vfrsub - - vfrdiv -*/ -template -class reverse_binop_frm : public function_base -{ -public: - bool has_rounding_mode_operand_p () const override { return true; } - -public: - rtx expand (function_expander &e) const override - { - return e.use_exact_insn ( - code_for_pred_reverse_scalar (CODE, e.vector_mode ())); - } -}; - -/* Implements below instructions for frm - - vfwadd - - vfwsub - - vfwmul -*/ -template -class widen_binop_frm : public function_base -{ -public: - bool has_rounding_mode_operand_p () const override { return true; } - - rtx expand (function_expander &e) const override - { - switch (e.op_info->op) - { - case OP_TYPE_vv: - return e.use_exact_insn ( - code_for_pred_dual_widen (CODE, e.vector_mode ())); - case OP_TYPE_vf: - return e.use_exact_insn ( - code_for_pred_dual_widen_scalar (CODE, e.vector_mode ())); - case OP_TYPE_wv: - if (CODE == PLUS) - return e.use_exact_insn ( - code_for_pred_single_widen_add (e.vector_mode ())); - else - return e.use_exact_insn ( - code_for_pred_single_widen_sub (e.vector_mode ())); - case OP_TYPE_wf: - return e.use_exact_insn ( - code_for_pred_single_widen_scalar (CODE, e.vector_mode ())); - default: - gcc_unreachable (); - } - } -}; - -/* Implements below instructions for frm - - vfmacc -*/ -class vfmacc_frm : public function_base -{ -public: - bool has_rounding_mode_operand_p () const override { return true; } - - bool has_merge_operand_p () const override { return false; } - - rtx expand (function_expander &e) const override - { - if (e.op_info->op == OP_TYPE_vf) - return e.use_ternop_insn (true, - code_for_pred_mul_scalar (PLUS, - e.vector_mode ())); - if (e.op_info->op == OP_TYPE_vv) - return e.use_ternop_insn (true, - code_for_pred_mul (PLUS, e.vector_mode ())); - gcc_unreachable (); - } -}; - -/* Implements below instructions for frm - - vfnmacc -*/ -class vfnmacc_frm : public function_base -{ -public: - bool has_rounding_mode_operand_p () const override { return true; } - - bool has_merge_operand_p () const override { return false; } - - rtx expand (function_expander &e) const override - { - if (e.op_info->op == OP_TYPE_vf) - return e.use_ternop_insn ( - true, code_for_pred_mul_neg_scalar (MINUS, e.vector_mode ())); - if (e.op_info->op == OP_TYPE_vv) - return e.use_ternop_insn ( - true, code_for_pred_mul_neg (MINUS, e.vector_mode ())); - gcc_unreachable (); - } -}; - -/* Implements below instructions for frm - - vfmsac -*/ -class vfmsac_frm : public function_base -{ -public: - bool has_rounding_mode_operand_p () const override { return true; } - - bool has_merge_operand_p () const override { return false; } - - rtx expand (function_expander &e) const override - { - if (e.op_info->op == OP_TYPE_vf) - return e.use_ternop_insn ( - true, code_for_pred_mul_scalar (MINUS, e.vector_mode ())); - if (e.op_info->op == OP_TYPE_vv) - return e.use_ternop_insn ( - true, code_for_pred_mul (MINUS, e.vector_mode ())); - - gcc_unreachable (); - } -}; - -/* Implements below instructions for frm - - vfnmsac -*/ -class vfnmsac_frm : public function_base -{ -public: - bool has_rounding_mode_operand_p () const override { return true; } - - bool has_merge_operand_p () const override { return false; } - - rtx expand (function_expander &e) const override - { - if (e.op_info->op == OP_TYPE_vf) - return e.use_ternop_insn ( - true, code_for_pred_mul_neg_scalar (PLUS, e.vector_mode ())); - if (e.op_info->op == OP_TYPE_vv) - return e.use_ternop_insn ( - true, code_for_pred_mul_neg (PLUS, e.vector_mode ())); - - gcc_unreachable (); - } -}; - -/* Implements below instructions for frm - - vfmadd -*/ -class vfmadd_frm : public function_base -{ -public: - bool has_rounding_mode_operand_p () const override { return true; } - - bool has_merge_operand_p () const override { return false; } - - rtx expand (function_expander &e) const override - { - if (e.op_info->op == OP_TYPE_vf) - return e.use_ternop_insn ( - false, code_for_pred_mul_scalar (PLUS, e.vector_mode ())); - if (e.op_info->op == OP_TYPE_vv) - return e.use_ternop_insn ( - false, code_for_pred_mul (PLUS, e.vector_mode ())); - - gcc_unreachable (); - } -}; - -/* Implements below instructions for frm - - vfnmadd -*/ -class vfnmadd_frm : public function_base -{ -public: - bool has_rounding_mode_operand_p () const override { return true; } - - bool has_merge_operand_p () const override { return false; } - - rtx expand (function_expander &e) const override - { - if (e.op_info->op == OP_TYPE_vf) - return e.use_ternop_insn ( - false, code_for_pred_mul_neg_scalar (MINUS, e.vector_mode ())); - if (e.op_info->op == OP_TYPE_vv) - return e.use_ternop_insn ( - false, code_for_pred_mul_neg (MINUS, e.vector_mode ())); - - gcc_unreachable (); - } -}; - -/* Implements below instructions for frm - - vfmsub -*/ -class vfmsub_frm : public function_base -{ -public: - bool has_rounding_mode_operand_p () const override { return true; } - - bool has_merge_operand_p () const override { return false; } - - rtx expand (function_expander &e) const override - { - if (e.op_info->op == OP_TYPE_vf) - return e.use_ternop_insn ( - false, code_for_pred_mul_scalar (MINUS, e.vector_mode ())); - if (e.op_info->op == OP_TYPE_vv) - return e.use_ternop_insn ( - false, code_for_pred_mul (MINUS, e.vector_mode ())); - - gcc_unreachable (); - } -}; - -/* Implements below instructions for frm - - vfnmsub -*/ -class vfnmsub_frm : public function_base -{ -public: - bool has_rounding_mode_operand_p () const override { return true; } - - bool has_merge_operand_p () const override { return false; } - - rtx expand (function_expander &e) const override - { - if (e.op_info->op == OP_TYPE_vf) - return e.use_ternop_insn ( - false, code_for_pred_mul_neg_scalar (PLUS, e.vector_mode ())); - if (e.op_info->op == OP_TYPE_vv) - return e.use_ternop_insn ( - false, code_for_pred_mul_neg (PLUS, e.vector_mode ())); - - gcc_unreachable (); - } -}; - -/* Implements below instructions for frm - - vfwmacc -*/ -class vfwmacc_frm : public function_base -{ -public: - bool has_rounding_mode_operand_p () const override { return true; } - - bool has_merge_operand_p () const override { return false; } - - rtx expand (function_expander &e) const override - { - if (e.op_info->op == OP_TYPE_vf) - return e.use_widen_ternop_insn ( - code_for_pred_widen_mul_scalar (PLUS, e.vector_mode ())); - if (e.op_info->op == OP_TYPE_vv) - return e.use_widen_ternop_insn ( - code_for_pred_widen_mul (PLUS, e.vector_mode ())); - - gcc_unreachable (); - } -}; - -/* Implements below instructions for frm - - vfwnmacc -*/ -class vfwnmacc_frm : public function_base -{ -public: - bool has_rounding_mode_operand_p () const override { return true; } - - bool has_merge_operand_p () const override { return false; } - - rtx expand (function_expander &e) const override - { - if (e.op_info->op == OP_TYPE_vf) - return e.use_widen_ternop_insn ( - code_for_pred_widen_mul_neg_scalar (MINUS, e.vector_mode ())); - if (e.op_info->op == OP_TYPE_vv) - return e.use_widen_ternop_insn ( - code_for_pred_widen_mul_neg (MINUS, e.vector_mode ())); - - gcc_unreachable (); - } -}; - -/* Implements below instructions for frm - - vfwmsac -*/ -class vfwmsac_frm : public function_base -{ -public: - bool has_rounding_mode_operand_p () const override { return true; } - - bool has_merge_operand_p () const override { return false; } - - rtx expand (function_expander &e) const override - { - if (e.op_info->op == OP_TYPE_vf) - return e.use_widen_ternop_insn ( - code_for_pred_widen_mul_scalar (MINUS, e.vector_mode ())); - if (e.op_info->op == OP_TYPE_vv) - return e.use_widen_ternop_insn ( - code_for_pred_widen_mul (MINUS, e.vector_mode ())); - - gcc_unreachable (); - } -}; - -/* Implements below instructions for frm - - vfwnmsac -*/ -class vfwnmsac_frm : public function_base -{ -public: - bool has_rounding_mode_operand_p () const override { return true; } - - bool has_merge_operand_p () const override { return false; } - - rtx expand (function_expander &e) const override - { - if (e.op_info->op == OP_TYPE_vf) - return e.use_widen_ternop_insn ( - code_for_pred_widen_mul_neg_scalar (PLUS, e.vector_mode ())); - if (e.op_info->op == OP_TYPE_vv) - return e.use_widen_ternop_insn ( - code_for_pred_widen_mul_neg (PLUS, e.vector_mode ())); - - gcc_unreachable (); - } -}; - -/* Implements below instructions for frm - - vfsqrt -*/ -template -class unop_frm : public function_base -{ -public: - bool has_rounding_mode_operand_p () const override { return true; } - - rtx expand (function_expander &e) const override - { - return e.use_exact_insn (code_for_pred (CODE, e.vector_mode ())); - } -}; - -/* Implements below instructions for frm - - vfrec7 -*/ -class vfrec7_frm : public function_base -{ -public: - bool has_rounding_mode_operand_p () const override { return true; } - - rtx expand (function_expander &e) const override - { - return e.use_exact_insn (code_for_pred (UNSPEC_VFREC7, e.vector_mode ())); - } -}; - /* Implements vrsub. */ class vrsub : public function_base { @@ -678,10 +299,15 @@ public: }; /* Implements vneg/vnot. */ -template +template class unop : public function_base { public: + bool has_rounding_mode_operand_p () const override + { + return FRM_OP == HAS_FRM; + } + rtx expand (function_expander &e) const override { return e.use_exact_insn (code_for_pred (CODE, e.vector_mode ())); @@ -730,7 +356,7 @@ public: } }; -/* Implements vwadd/vwsub/vwmul/vfwadd/vfwsub/vfwmul. */ +/* Implements vwadd/vwsub/vwmul. */ template class widen_binop : public function_base { @@ -760,10 +386,17 @@ public: } } }; -template -class widen_binop : public function_base + +/* Implement vfwadd/vfwsub/vfwmul. */ +template +class widen_binop_fp : public function_base { public: + bool has_rounding_mode_operand_p () const override + { + return FRM_OP == HAS_FRM; + } + rtx expand (function_expander &e) const override { switch (e.op_info->op) @@ -1382,10 +1015,15 @@ public: }; /* Implements vfrsub/vfrdiv. */ -template +template class reverse_binop : public function_base { public: + bool has_rounding_mode_operand_p () const override + { + return FRM_OP == HAS_FRM; + } + rtx expand (function_expander &e) const override { return e.use_exact_insn ( @@ -1393,9 +1031,15 @@ public: } }; +template class vfmacc : public function_base { public: + bool has_rounding_mode_operand_p () const override + { + return FRM_OP == HAS_FRM; + } + bool has_merge_operand_p () const override { return false; } rtx expand (function_expander &e) const override @@ -1411,9 +1055,15 @@ public: } }; +template class vfnmsac : public function_base { public: + bool has_rounding_mode_operand_p () const override + { + return FRM_OP == HAS_FRM; + } + bool has_merge_operand_p () const override { return false; } rtx expand (function_expander &e) const override @@ -1428,9 +1078,15 @@ public: } }; +template class vfmadd : public function_base { public: + bool has_rounding_mode_operand_p () const override + { + return FRM_OP == HAS_FRM; + } + bool has_merge_operand_p () const override { return false; } rtx expand (function_expander &e) const override @@ -1446,9 +1102,15 @@ public: } }; +template class vfnmsub : public function_base { public: + bool has_rounding_mode_operand_p () const override + { + return FRM_OP == HAS_FRM; + } + bool has_merge_operand_p () const override { return false; } rtx expand (function_expander &e) const override @@ -1463,9 +1125,15 @@ public: } }; +template class vfnmacc : public function_base { public: + bool has_rounding_mode_operand_p () const override + { + return FRM_OP == HAS_FRM; + } + bool has_merge_operand_p () const override { return false; } rtx expand (function_expander &e) const override @@ -1480,9 +1148,15 @@ public: } }; +template class vfmsac : public function_base { public: + bool has_rounding_mode_operand_p () const override + { + return FRM_OP == HAS_FRM; + } + bool has_merge_operand_p () const override { return false; } rtx expand (function_expander &e) const override @@ -1498,9 +1172,15 @@ public: } }; +template class vfnmadd : public function_base { public: + bool has_rounding_mode_operand_p () const override + { + return FRM_OP == HAS_FRM; + } + bool has_merge_operand_p () const override { return false; } rtx expand (function_expander &e) const override @@ -1515,9 +1195,15 @@ public: } }; +template class vfmsub : public function_base { public: + bool has_rounding_mode_operand_p () const override + { + return FRM_OP == HAS_FRM; + } + bool has_merge_operand_p () const override { return false; } rtx expand (function_expander &e) const override @@ -1533,9 +1219,15 @@ public: } }; +template class vfwmacc : public function_base { public: + bool has_rounding_mode_operand_p () const override + { + return FRM_OP == HAS_FRM; + } + bool has_merge_operand_p () const override { return false; } rtx expand (function_expander &e) const override @@ -1550,9 +1242,15 @@ public: } }; +template class vfwnmacc : public function_base { public: + bool has_rounding_mode_operand_p () const override + { + return FRM_OP == HAS_FRM; + } + bool has_merge_operand_p () const override { return false; } rtx expand (function_expander &e) const override @@ -1567,9 +1265,15 @@ public: } }; +template class vfwmsac : public function_base { public: + bool has_rounding_mode_operand_p () const override + { + return FRM_OP == HAS_FRM; + } + bool has_merge_operand_p () const override { return false; } rtx expand (function_expander &e) const override @@ -1584,9 +1288,15 @@ public: } }; +template class vfwnmsac : public function_base { public: + bool has_rounding_mode_operand_p () const override + { + return FRM_OP == HAS_FRM; + } + bool has_merge_operand_p () const override { return false; } rtx expand (function_expander &e) const override @@ -1602,10 +1312,15 @@ public: }; /* Implements vfsqrt7/vfrec7/vfclass/vfsgnj/vfsgnjx. */ -template +template class float_misc : public function_base { public: + bool has_rounding_mode_operand_p () const override + { + return FRM_OP == HAS_FRM; + } + rtx expand (function_expander &e) const override { if (e.op_info->op == OP_TYPE_vf) @@ -2446,51 +2161,51 @@ static CONSTEXPR const viota viota_obj; static CONSTEXPR const vid vid_obj; static CONSTEXPR const binop vfadd_obj; static CONSTEXPR const binop vfsub_obj; -static CONSTEXPR const binop_frm vfadd_frm_obj; -static CONSTEXPR const binop_frm vfsub_frm_obj; +static CONSTEXPR const binop vfadd_frm_obj; +static CONSTEXPR const binop vfsub_frm_obj; static CONSTEXPR const reverse_binop vfrsub_obj; -static CONSTEXPR const reverse_binop_frm vfrsub_frm_obj; -static CONSTEXPR const widen_binop vfwadd_obj; -static CONSTEXPR const widen_binop_frm vfwadd_frm_obj; -static CONSTEXPR const widen_binop vfwsub_obj; -static CONSTEXPR const widen_binop_frm vfwsub_frm_obj; +static CONSTEXPR const reverse_binop vfrsub_frm_obj; +static CONSTEXPR const widen_binop_fp vfwadd_obj; +static CONSTEXPR const widen_binop_fp vfwadd_frm_obj; +static CONSTEXPR const widen_binop_fp vfwsub_obj; +static CONSTEXPR const widen_binop_fp vfwsub_frm_obj; static CONSTEXPR const binop vfmul_obj; -static CONSTEXPR const binop_frm vfmul_frm_obj; +static CONSTEXPR const binop vfmul_frm_obj; static CONSTEXPR const binop
vfdiv_obj; -static CONSTEXPR const binop_frm
vfdiv_frm_obj; +static CONSTEXPR const binop vfdiv_frm_obj; static CONSTEXPR const reverse_binop
vfrdiv_obj; -static CONSTEXPR const reverse_binop_frm
vfrdiv_frm_obj; -static CONSTEXPR const widen_binop vfwmul_obj; -static CONSTEXPR const widen_binop_frm vfwmul_frm_obj; -static CONSTEXPR const vfmacc vfmacc_obj; -static CONSTEXPR const vfmacc_frm vfmacc_frm_obj; -static CONSTEXPR const vfnmsac vfnmsac_obj; -static CONSTEXPR const vfnmsac_frm vfnmsac_frm_obj; -static CONSTEXPR const vfmadd vfmadd_obj; -static CONSTEXPR const vfmadd_frm vfmadd_frm_obj; -static CONSTEXPR const vfnmsub vfnmsub_obj; -static CONSTEXPR const vfnmsub_frm vfnmsub_frm_obj; -static CONSTEXPR const vfnmacc vfnmacc_obj; -static CONSTEXPR const vfnmacc_frm vfnmacc_frm_obj; -static CONSTEXPR const vfmsac vfmsac_obj; -static CONSTEXPR const vfmsac_frm vfmsac_frm_obj; -static CONSTEXPR const vfnmadd vfnmadd_obj; -static CONSTEXPR const vfnmadd_frm vfnmadd_frm_obj; -static CONSTEXPR const vfmsub vfmsub_obj; -static CONSTEXPR const vfmsub_frm vfmsub_frm_obj; -static CONSTEXPR const vfwmacc vfwmacc_obj; -static CONSTEXPR const vfwmacc_frm vfwmacc_frm_obj; -static CONSTEXPR const vfwnmacc vfwnmacc_obj; -static CONSTEXPR const vfwnmacc_frm vfwnmacc_frm_obj; -static CONSTEXPR const vfwmsac vfwmsac_obj; -static CONSTEXPR const vfwmsac_frm vfwmsac_frm_obj; -static CONSTEXPR const vfwnmsac vfwnmsac_obj; -static CONSTEXPR const vfwnmsac_frm vfwnmsac_frm_obj; +static CONSTEXPR const reverse_binop vfrdiv_frm_obj; +static CONSTEXPR const widen_binop_fp vfwmul_obj; +static CONSTEXPR const widen_binop_fp vfwmul_frm_obj; +static CONSTEXPR const vfmacc vfmacc_obj; +static CONSTEXPR const vfmacc vfmacc_frm_obj; +static CONSTEXPR const vfnmsac vfnmsac_obj; +static CONSTEXPR const vfnmsac vfnmsac_frm_obj; +static CONSTEXPR const vfmadd vfmadd_obj; +static CONSTEXPR const vfmadd vfmadd_frm_obj; +static CONSTEXPR const vfnmsub vfnmsub_obj; +static CONSTEXPR const vfnmsub vfnmsub_frm_obj; +static CONSTEXPR const vfnmacc vfnmacc_obj; +static CONSTEXPR const vfnmacc vfnmacc_frm_obj; +static CONSTEXPR const vfmsac vfmsac_obj; +static CONSTEXPR const vfmsac vfmsac_frm_obj; +static CONSTEXPR const vfnmadd vfnmadd_obj; +static CONSTEXPR const vfnmadd vfnmadd_frm_obj; +static CONSTEXPR const vfmsub vfmsub_obj; +static CONSTEXPR const vfmsub vfmsub_frm_obj; +static CONSTEXPR const vfwmacc vfwmacc_obj; +static CONSTEXPR const vfwmacc vfwmacc_frm_obj; +static CONSTEXPR const vfwnmacc vfwnmacc_obj; +static CONSTEXPR const vfwnmacc vfwnmacc_frm_obj; +static CONSTEXPR const vfwmsac vfwmsac_obj; +static CONSTEXPR const vfwmsac vfwmsac_frm_obj; +static CONSTEXPR const vfwnmsac vfwnmsac_obj; +static CONSTEXPR const vfwnmsac vfwnmsac_frm_obj; static CONSTEXPR const unop vfsqrt_obj; -static CONSTEXPR const unop_frm vfsqrt_frm_obj; +static CONSTEXPR const unop vfsqrt_frm_obj; static CONSTEXPR const float_misc vfrsqrt7_obj; static CONSTEXPR const float_misc vfrec7_obj; -static CONSTEXPR const vfrec7_frm vfrec7_frm_obj; +static CONSTEXPR const float_misc vfrec7_frm_obj; static CONSTEXPR const binop vfmin_obj; static CONSTEXPR const binop vfmax_obj; static CONSTEXPR const float_misc vfsgnj_obj; -- 2.34.1