From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from smtpbgbr1.qq.com (smtpbgbr1.qq.com [54.207.19.206]) by sourceware.org (Postfix) with ESMTPS id 0445B3858D20 for ; Tue, 22 Aug 2023 23:22:33 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 0445B3858D20 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivai.ai Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivai.ai X-QQ-mid: bizesmtp83t1692746547tennir5i Received: from rios-cad121.hadoop.rioslab.org ( [58.60.1.7]) by bizesmtp.qq.com (ESMTP) with id ; Wed, 23 Aug 2023 07:22:26 +0800 (CST) X-QQ-SSF: 01400000000000G0V000000A0000000 X-QQ-FEAT: lm7sZZPcOdZRaiRXv/CPf8JQyvYWaAErRzQIhNJumBNe5KgiDNQULhj6Z1E/E fdMziaHfJ0Wp6NpnpblmaG43mclR1WFc0s680BwU2d0e55pjqvisrw8M5QPNcy0bFX1AJ1Y P7rnUElPmYqi32n7InJojR6wra44+AIX9ox53nQgzrk8jGCfb5rz4ogy88KjCLrh/oyMZyB UnsfaYlCqRxrxRoDLLJic7J0LDUWz7VbcBkhE9KysPUEf6AuWgTQqmKV60HKPVt+5SzZFUB tdaulEmmH9fyVusgiU9IHUPuofB9qSq9ijbh0BNHcn9ebUWeIOyAAFAyaPRV3tKGpXOMnER e3dSsXne28koICbQGxp6iXxF0h3oyQiuvevNxGwUig+OOE2Wpji+Q19iEG3wQC+tcwN5/D8 X-QQ-GoodBg: 2 X-BIZMAIL-ID: 16570333319970346992 From: Juzhe-Zhong To: gcc-patches@gcc.gnu.org Cc: kito.cheng@gmail.com, kito.cheng@sifive.com, jeffreyalaw@gmail.com, rdapp.gcc@gmail.com, Juzhe-Zhong Subject: [PATCH] RISC-V: Clang format riscv-vsetvl.cc[NFC] Date: Wed, 23 Aug 2023 07:22:25 +0800 Message-Id: <20230822232225.1385301-1-juzhe.zhong@rivai.ai> X-Mailer: git-send-email 2.36.3 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:rivai.ai:qybglogicsvrgz:qybglogicsvrgz7a-one-0 X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00,GIT_PATCH_0,KAM_DMARC_STATUS,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H4,RCVD_IN_MSPIKE_WL,SPF_HELO_PASS,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Commited. gcc/ChangeLog: * config/riscv/riscv-vsetvl.cc (change_insn): Clang format. (vector_infos_manager::all_same_ratio_p): Ditto. (vector_infos_manager::all_same_avl_p): Ditto. (pass_vsetvl::refine_vsetvls): Ditto. (pass_vsetvl::cleanup_vsetvls): Ditto. (pass_vsetvl::commit_vsetvls): Ditto. (pass_vsetvl::local_eliminate_vsetvl_insn): Ditto. (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto. (pass_vsetvl::compute_probabilities): Ditto. --- gcc/config/riscv/riscv-vsetvl.cc | 65 ++++++++++++++------------------ 1 file changed, 29 insertions(+), 36 deletions(-) diff --git a/gcc/config/riscv/riscv-vsetvl.cc b/gcc/config/riscv/riscv-vsetvl.cc index 2d8fa754ea0..819a3918b3e 100644 --- a/gcc/config/riscv/riscv-vsetvl.cc +++ b/gcc/config/riscv/riscv-vsetvl.cc @@ -907,8 +907,8 @@ change_insn (function_info *ssa, insn_change change, insn_info *insn, ] UNSPEC_VPREDICATE) (plus:RVVM4DI (reg/v:RVVM4DI 104 v8 [orig:137 op1 ] [137]) (sign_extend:RVVM4DI (vec_duplicate:RVVM4SI (reg:SI 15 a5 - [140])))) (unspec:RVVM4DI [ (const_int 0 [0]) ] UNSPEC_VUNDEF))) "rvv.c":8:12 - 2784 {pred_single_widen_addsvnx8di_scalar} (expr_list:REG_EQUIV + [140])))) (unspec:RVVM4DI [ (const_int 0 [0]) ] UNSPEC_VUNDEF))) + "rvv.c":8:12 2784 {pred_single_widen_addsvnx8di_scalar} (expr_list:REG_EQUIV (mem/c:RVVM4DI (reg:DI 10 a0 [142]) [1 +0 S[64, 64] A128]) (expr_list:REG_EQUAL (if_then_else:RVVM4DI (unspec:RVVMF8BI [ (const_vector:RVVMF8BI repeat [ @@ -2428,12 +2428,12 @@ vector_infos_manager::all_same_ratio_p (sbitmap bitdata) const sbitmap_iterator sbi; EXECUTE_IF_SET_IN_BITMAP (bitdata, 0, bb_index, sbi) - { - if (ratio == -1) - ratio = vector_exprs[bb_index]->get_ratio (); - else if (vector_exprs[bb_index]->get_ratio () != ratio) - return false; - } + { + if (ratio == -1) + ratio = vector_exprs[bb_index]->get_ratio (); + else if (vector_exprs[bb_index]->get_ratio () != ratio) + return false; + } return true; } @@ -2473,10 +2473,10 @@ vector_infos_manager::all_same_avl_p (const basic_block cfg_bb, sbitmap_iterator sbi; EXECUTE_IF_SET_IN_BITMAP (bitdata, 0, bb_index, sbi) - { - if (vector_exprs[bb_index]->get_avl_info () != avl) - return false; - } + { + if (vector_exprs[bb_index]->get_avl_info () != avl) + return false; + } return true; } @@ -3892,7 +3892,7 @@ pass_vsetvl::refine_vsetvls (void) const basic_block cfg_bb; FOR_EACH_BB_FN (cfg_bb, cfun) { - auto info = get_block_info(cfg_bb).local_dem; + auto info = get_block_info (cfg_bb).local_dem; insn_info *insn = info.get_insn (); if (!info.valid_p ()) continue; @@ -3938,8 +3938,7 @@ pass_vsetvl::cleanup_vsetvls () basic_block cfg_bb; FOR_EACH_BB_FN (cfg_bb, cfun) { - auto &info - = get_block_info(cfg_bb).reaching_out; + auto &info = get_block_info (cfg_bb).reaching_out; gcc_assert (m_vector_manager->expr_set_num ( m_vector_manager->vector_del[cfg_bb->index]) <= 1); @@ -3951,9 +3950,7 @@ pass_vsetvl::cleanup_vsetvls () info.set_unknown (); else { - const auto dem - = get_block_info(cfg_bb) - .local_dem; + const auto dem = get_block_info (cfg_bb).local_dem; gcc_assert (dem == *m_vector_manager->vector_exprs[i]); insn_info *insn = dem.get_insn (); gcc_assert (insn && insn->rtl ()); @@ -4020,8 +4017,7 @@ pass_vsetvl::commit_vsetvls (void) for (const bb_info *bb : crtl->ssa->bbs ()) { basic_block cfg_bb = bb->cfg_bb (); - const auto reaching_out - = get_block_info(cfg_bb).reaching_out; + const auto reaching_out = get_block_info (cfg_bb).reaching_out; if (!reaching_out.dirty_p ()) continue; @@ -4035,14 +4031,14 @@ pass_vsetvl::commit_vsetvls (void) sbitmap avin = m_vector_manager->vector_avin[cfg_bb->index]; bool available_p = false; EXECUTE_IF_SET_IN_BITMAP (avin, 0, bb_index, sbi) - { - if (m_vector_manager->vector_exprs[bb_index]->available_p ( - reaching_out)) - { - available_p = true; - break; - } - } + { + if (m_vector_manager->vector_exprs[bb_index]->available_p ( + reaching_out)) + { + available_p = true; + break; + } + } if (available_p) continue; } @@ -4263,7 +4259,8 @@ pass_vsetvl::local_eliminate_vsetvl_insn (const bb_info *bb) const /* Local AVL compatibility checking is simpler than global, we only need to check the REGNO is same. */ - if (prev_dem.valid_or_dirty_p () && prev_dem.skip_avl_compatible_p (curr_dem) + if (prev_dem.valid_or_dirty_p () + && prev_dem.skip_avl_compatible_p (curr_dem) && local_avl_compatible_p (prev_avl, curr_avl)) { /* curr_dem and prev_dem is compatible! */ @@ -4365,9 +4362,7 @@ pass_vsetvl::global_eliminate_vsetvl_insn (const bb_info *bb) const vsetvl_rinsn = get_vsetvl_at_end (bb, &dem); /* No need to optimize if block doesn't have vsetvl instructions. */ - if (!dem.valid_or_dirty_p () - || !vsetvl_rinsn - || !dem.get_avl_source () + if (!dem.valid_or_dirty_p () || !vsetvl_rinsn || !dem.get_avl_source () || !dem.has_avl_reg ()) return false; @@ -4655,8 +4650,7 @@ pass_vsetvl::compute_probabilities (void) for (const bb_info *bb : crtl->ssa->bbs ()) { basic_block cfg_bb = bb->cfg_bb (); - auto &curr_prob - = get_block_info(cfg_bb).probability; + auto &curr_prob = get_block_info (cfg_bb).probability; /* GCC assume entry block (bb 0) are always so executed so set its probability as "always". */ @@ -4669,8 +4663,7 @@ pass_vsetvl::compute_probabilities (void) gcc_assert (curr_prob.initialized_p ()); FOR_EACH_EDGE (e, ei, cfg_bb->succs) { - auto &new_prob - = get_block_info(e->dest).probability; + auto &new_prob = get_block_info (e->dest).probability; if (!new_prob.initialized_p ()) new_prob = curr_prob * e->probability; else if (new_prob == profile_probability::always ()) -- 2.36.3