* [PATCH] RISC-V: Fix gather_load_run-12.c test
@ 2023-08-23 2:21 Juzhe-Zhong
0 siblings, 0 replies; only message in thread
From: Juzhe-Zhong @ 2023-08-23 2:21 UTC (permalink / raw)
To: gcc-patches; +Cc: kito.cheng, kito.cheng, Juzhe-Zhong
FAIL: gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-12.c
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-12.c: Add vsetvli asm.
---
.../riscv/rvv/autovec/gather-scatter/gather_load_run-12.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-12.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-12.c
index b4e2ead8ca9..2fb525d8ffc 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-12.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-12.c
@@ -7,6 +7,12 @@
int
main (void)
{
+ /* FIXME: The purpose of this assembly is to ensure that the vtype register is
+ initialized befor instructions such as vmv1r.v are executed. Otherwise you
+ will get illegal instruction errors when running with spike+pk. This is an
+ interim solution for reduce unnecessary failures and a unified solution
+ will come later. */
+ asm volatile("vsetivli x0, 0, e8, m1, ta, ma");
#define RUN_LOOP(DATA_TYPE, INDEX_TYPE) \
DATA_TYPE dest_##DATA_TYPE##_##INDEX_TYPE[202] = {0}; \
DATA_TYPE src_##DATA_TYPE##_##INDEX_TYPE[202] = {0}; \
--
2.36.3
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2023-08-23 2:21 [PATCH] RISC-V: Fix gather_load_run-12.c test Juzhe-Zhong
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