From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from smtpbgau1.qq.com (smtpbgau1.qq.com [54.206.16.166]) by sourceware.org (Postfix) with ESMTPS id 7ACF7385840F for ; Wed, 30 Aug 2023 01:54:55 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 7ACF7385840F Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivai.ai Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivai.ai X-QQ-mid: bizesmtp76t1693360487tr0rg008 Received: from rios-cad121.hadoop.rioslab.org ( [58.60.1.9]) by bizesmtp.qq.com (ESMTP) with id ; Wed, 30 Aug 2023 09:54:46 +0800 (CST) X-QQ-SSF: 01400000000000C0F000000A0000000 X-QQ-FEAT: ILHsT53NKPiy5435laZrR4l+1vJO0pz+SDi/9wV6KPIUFcf6vcg5FVpaowcog EhoSHurdZxEivFnKbrtGlmQYrDS8VlJ/ZoafFfVuHBoKWDCf05cDGr6jHE2hxeiO/6s4q0D p7Bnw7Rn4WnanTqjkR6LGl3u9J+cLJdI12zEYCulpl1U7nGurlwNNHl1xwGP8RIblCz9L30 D++wSqUMD1OzGN3IlvqFO+FEMsnb1ahYR66FwAV6k1hMGg0fZgjCbuyNoaEIoRMEFAdeZKq J2GkdsZtWJ6/SXhsM4ba+0FeZtK+Sv/7g/9JDt7nOMxYvZ+TcnRlTYpSKw70QPxVL9XH8v/ r+g0iFdv86IJ1nbzb52YrXedn0Zkg62Cyr17Tj/z3+qRa+V0vM= X-QQ-GoodBg: 2 X-BIZMAIL-ID: 10174098579861263322 From: Lehua Ding To: gcc-patches@gcc.gnu.org Cc: juzhe.zhong@rivai.ai, kito.cheng@gmail.com, rdapp.gcc@gmail.com, palmer@rivosinc.com, jeffreyalaw@gmail.com Subject: [PATCH V3 0/3] RISC-V: Add an experimental vector calling convention Date: Wed, 30 Aug 2023 09:54:42 +0800 Message-Id: <20230830015445.597055-1-lehua.ding@rivai.ai> X-Mailer: git-send-email 2.36.3 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:rivai.ai:qybglogicsvrgz:qybglogicsvrgz6a-0 X-Spam-Status: No, score=-4.9 required=5.0 tests=BAYES_00,KAM_ASCII_DIVIDERS,KAM_DMARC_STATUS,KAM_SHORT,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS,TXREP autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: V3 change: Rebasing. Hi RISC-V folks, This patch implement the proposal of RISC-V vector calling convention[1] and this feature can be enabled by `--param=riscv-vector-abi` option. Currently, all vector type arguments and return values are pass by reference. With this patch, these arguments and return values can pass through vector registers. Currently only vector types defined in the RISC-V Vector Extension Intrinsic Document[2] are supported. GNU-ext vector types are unsupported for now since the corresponding proposal was not presented. The proposal introduce a new calling convention variant, functions which follow this variant need follow the bellow vector register convention. | Name | ABI Mnemonic | Meaning | Preserved across calls? ================================================================================= | v0 | | Argument register | No | v1-v7 | | Callee-saved registers | Yes | v8-v23 | | Argument registers | No | v24-v31 | | Callee-saved registers | Yes If a functions follow this vector calling convention, then the function symbole must be annotated with .variant_cc directive[3] (used to indicate that it is a calling convention variant). This implementation split into three parts, each part corresponds to a sub-patch. - Part-1: Select suitable vector regsiters for vector type arguments and return values according to the proposal. - Part-2: Allocate frame area for callee-saved vector registers and save/restore them in prologue and epilogue. - Part-3: Generate .variant_cc directive for vector function in assembly code. Best, Lehua [1] https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/389 [2] https://github.com/riscv-non-isa/rvv-intrinsic-doc/blob/master/rvv-intrinsic-rfc.md#type-system [3] https://github.com/riscv-non-isa/riscv-asm-manual/blob/master/riscv-asm.md#pseudo-ops Lehua Ding (3): RISC-V: Part-1: Select suitable vector registers for vector type args and returns RISC-V: Part-2: Save/Restore vector registers which need to be preversed RISC-V: Part-3: Output .variant_cc directive for vector function gcc/config/riscv/riscv-protos.h | 4 + gcc/config/riscv/riscv-sr.cc | 12 +- gcc/config/riscv/riscv-vector-builtins.cc | 10 + gcc/config/riscv/riscv.cc | 505 ++++++++++++++++-- gcc/config/riscv/riscv.h | 40 ++ gcc/config/riscv/riscv.md | 43 +- gcc/config/riscv/riscv.opt | 5 + .../riscv/rvv/base/abi-call-args-1-run.c | 127 +++++ .../riscv/rvv/base/abi-call-args-1.c | 197 +++++++ .../riscv/rvv/base/abi-call-args-2-run.c | 34 ++ .../riscv/rvv/base/abi-call-args-2.c | 27 + .../riscv/rvv/base/abi-call-args-3-run.c | 260 +++++++++ .../riscv/rvv/base/abi-call-args-3.c | 116 ++++ .../riscv/rvv/base/abi-call-args-4-run.c | 145 +++++ .../riscv/rvv/base/abi-call-args-4.c | 111 ++++ .../riscv/rvv/base/abi-call-error-1.c | 11 + .../riscv/rvv/base/abi-call-return-run.c | 127 +++++ .../riscv/rvv/base/abi-call-return.c | 197 +++++++ .../riscv/rvv/base/abi-call-variant_cc.c | 39 ++ .../rvv/base/abi-callee-saved-1-fixed-1.c | 85 +++ .../rvv/base/abi-callee-saved-1-fixed-2.c | 85 +++ .../riscv/rvv/base/abi-callee-saved-1.c | 87 +++ .../riscv/rvv/base/abi-callee-saved-2.c | 117 ++++ 23 files changed, 2322 insertions(+), 62 deletions(-) create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/abi-call-args-1-run.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/abi-call-args-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/abi-call-args-2-run.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/abi-call-args-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/abi-call-args-3-run.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/abi-call-args-3.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/abi-call-args-4-run.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/abi-call-args-4.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/abi-call-error-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/abi-call-return-run.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/abi-call-return.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/abi-call-variant_cc.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-1-fixed-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-1-fixed-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-2.c -- 2.36.3