From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.126]) by sourceware.org (Postfix) with ESMTPS id 39CB43858D33 for ; Mon, 4 Sep 2023 10:17:15 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 39CB43858D33 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=intel.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1693822635; x=1725358635; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=RBOpep/+t/G6/xryL85Fyl6vUySnQZRNAGUIkagrf0M=; b=A5oFGOptTqpysm+aVWyxK+gC6Y34xMaSC8yxbFnwidB9xk+qarBaiGnk yua8SehJnbvLbJeR+X+5h5TQu9b1vyPY60uMzl5wFq0LY3dI5OH3jrVq/ JBa8JO8l9RmqV86PKnelMdxsmcb4SrOlk/Q9duP9XQJNQRWM/qNOzien2 NhR/VktKHZL/zsKA8Mc3zwP4p+QOi7WVZPpmj/DWP1KhV/LXmSvCsqYbH L+kE3q+h8tnnWaZ+Fx6LdXlOeFsdFLWH6CwM6woGrqEmn3J32QtwrA4Ll Tx4WpMW8OcJEDWJvtuKedjecdx1c9vUG2jItMgaWOCcBlS7TAVEH4/ImQ w==; X-IronPort-AV: E=McAfee;i="6600,9927,10822"; a="361589098" X-IronPort-AV: E=Sophos;i="6.02,226,1688454000"; d="scan'208";a="361589098" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Sep 2023 03:17:13 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10822"; a="883987436" X-IronPort-AV: E=Sophos;i="6.02,226,1688454000"; d="scan'208";a="883987436" Received: from shvmail03.sh.intel.com ([10.239.245.20]) by fmsmga001.fm.intel.com with ESMTP; 04 Sep 2023 03:17:06 -0700 Received: from shliclel4217.sh.intel.com (shliclel4217.sh.intel.com [10.239.240.127]) by shvmail03.sh.intel.com (Postfix) with ESMTP id 972D7100566F; Mon, 4 Sep 2023 18:17:10 +0800 (CST) From: liuhongt To: gcc-patches@gcc.gnu.org Cc: crazylht@gmail.com, hjl.tools@gmail.com Subject: [PATCH] Generate vmovsh instead of vpblendw for specific vec_merge. Date: Mon, 4 Sep 2023 18:15:10 +0800 Message-Id: <20230904101510.1380787-1-hongtao.liu@intel.com> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-12.0 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,GIT_PATCH_0,KAM_SHORT,SPF_HELO_NONE,SPF_NONE,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On SPR, vmovsh can be execute on 3 ports, vpblendw can only be executed on 2 ports. On znver4, vpblendw can be executed on 4 ports, if vmovsh is similar as vmovss, then it can also be executed on 4 ports. So there's no difference for znver? but vmovsh is more optimized on SPR. Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}. Ready push to trunk. gcc/ChangeLog: * config/i386/sse.md: (V8BFH_128): Renamed to .. (VHFBF_128): .. this. (V16BFH_256): Renamed to .. (VHFBF_256): .. this. (avx512f_mov): Extend to V_128. (vcvtnee2ps_): Changed to VHFBF_128. (vcvtneo2ps_): Ditto. (vcvtnee2ps_): Changed to VHFBF_256. (vcvtneo2ps_): Ditto. * config/i386/i386-expand.cc (expand_vec_perm_blend): Canonicalize vec_merge. gcc/testsuite/ChangeLog: * gcc.target/i386/avx512fp16-vmovsh-1a.c: Remove xfail. --- gcc/config/i386/i386-expand.cc | 17 +++++++++++++ gcc/config/i386/sse.md | 25 ++++++++----------- .../gcc.target/i386/avx512fp16-vmovsh-1a.c | 2 +- 3 files changed, 29 insertions(+), 15 deletions(-) diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc index cbd51a0f362..e42ff27c6ef 100644 --- a/gcc/config/i386/i386-expand.cc +++ b/gcc/config/i386/i386-expand.cc @@ -19433,6 +19433,23 @@ expand_vec_perm_blend (struct expand_vec_perm_d *d) mmode = VOIDmode; } + /* Canonicalize vec_merge. */ + if (swap_commutative_operands_p (op1, op0) + /* Two operands have same precedence, then + first bit of mask select first operand. */ + || (!swap_commutative_operands_p (op0, op1) + && !(mask & 1))) + { + unsigned n_elts = GET_MODE_NUNITS (vmode); + std::swap (op0, op1); + unsigned HOST_WIDE_INT mask_all = HOST_WIDE_INT_1U; + if (n_elts == HOST_BITS_PER_WIDE_INT) + mask_all = -1; + else + mask_all = (HOST_WIDE_INT_1U << n_elts) - 1; + mask = ~mask & mask_all; + } + if (mmode != VOIDmode) maskop = force_reg (mmode, gen_int_mode (mask, mmode)); else diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index e282d978a01..6d3ae8dea0c 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -459,8 +459,9 @@ (define_mode_iterator VF2_AVX512VL (define_mode_iterator VF1_AVX512VL [V16SF (V8SF "TARGET_AVX512VL") (V4SF "TARGET_AVX512VL")]) -(define_mode_iterator VHFBF - [V32HF V16HF V8HF V32BF V16BF V8BF]) +(define_mode_iterator VHFBF [V32HF V16HF V8HF V32BF V16BF V8BF]) +(define_mode_iterator VHFBF_256 [V16HF V16BF]) +(define_mode_iterator VHFBF_128 [V8HF V8BF]) (define_mode_iterator VHF_AVX512VL [V32HF (V16HF "TARGET_AVX512VL") (V8HF "TARGET_AVX512VL")]) @@ -11134,13 +11135,11 @@ (define_insn_and_split "*vec_setv2di_0_zero_extendhi_1" DONE; }) -(define_mode_iterator V8BFH_128 [V8HF V8BF]) - (define_insn "avx512fp16_mov" - [(set (match_operand:V8BFH_128 0 "register_operand" "=v") - (vec_merge:V8BFH_128 - (match_operand:V8BFH_128 2 "register_operand" "v") - (match_operand:V8BFH_128 1 "register_operand" "v") + [(set (match_operand:V8_128 0 "register_operand" "=v") + (vec_merge:V8_128 + (match_operand:V8_128 2 "register_operand" "v") + (match_operand:V8_128 1 "register_operand" "v") (const_int 1)))] "TARGET_AVX512FP16" "vmovsh\t{%2, %1, %0|%0, %1, %2}" @@ -30358,8 +30357,6 @@ (define_insn "vbcstnesh2ps_" [(set_attr "prefix" "vex") (set_attr "mode" "")]) -(define_mode_iterator V16BFH_256 [V16HF V16BF]) - (define_mode_attr bf16_ph [(V8HF "ph") (V16HF "ph") (V8BF "bf16") (V16BF "bf16")]) @@ -30368,7 +30365,7 @@ (define_insn "vcvtnee2ps_" [(set (match_operand:V4SF 0 "register_operand" "=x") (float_extend:V4SF (vec_select: - (match_operand:V8BFH_128 1 "memory_operand" "m") + (match_operand:VHFBF_128 1 "memory_operand" "m") (parallel [(const_int 0) (const_int 2) (const_int 4) (const_int 6)]))))] "TARGET_AVXNECONVERT" @@ -30380,7 +30377,7 @@ (define_insn "vcvtnee2ps_" [(set (match_operand:V8SF 0 "register_operand" "=x") (float_extend:V8SF (vec_select: - (match_operand:V16BFH_256 1 "memory_operand" "m") + (match_operand:VHFBF_256 1 "memory_operand" "m") (parallel [(const_int 0) (const_int 2) (const_int 4) (const_int 6) (const_int 8) (const_int 10) @@ -30394,7 +30391,7 @@ (define_insn "vcvtneo2ps_" [(set (match_operand:V4SF 0 "register_operand" "=x") (float_extend:V4SF (vec_select: - (match_operand:V8BFH_128 1 "memory_operand" "m") + (match_operand:VHFBF_128 1 "memory_operand" "m") (parallel [(const_int 1) (const_int 3) (const_int 5) (const_int 7)]))))] "TARGET_AVXNECONVERT" @@ -30406,7 +30403,7 @@ (define_insn "vcvtneo2ps_" [(set (match_operand:V8SF 0 "register_operand" "=x") (float_extend:V8SF (vec_select: - (match_operand:V16BFH_256 1 "memory_operand" "m") + (match_operand:VHFBF_256 1 "memory_operand" "m") (parallel [(const_int 1) (const_int 3) (const_int 5) (const_int 7) (const_int 9) (const_int 11) diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vmovsh-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vmovsh-1a.c index 38bf5cc0395..ba10096aa20 100644 --- a/gcc/testsuite/gcc.target/i386/avx512fp16-vmovsh-1a.c +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vmovsh-1a.c @@ -3,7 +3,7 @@ /* { dg-final { scan-assembler-times "vmovsh\[ \\t\]+%xmm\[0-9\]+\[^\n\r\]*%\[er\]\[ad]x+\[^\n\r]*\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vmovsh\[ \\t\]+\[^\n\r\]*%\[er\]\[ad]x+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vmovsh\[ \\t\]+\[^\n\r\]*%\[er\]\[ad]x+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vmovsh\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 { xfail *-*-* } } } */ +/* { dg-final { scan-assembler-times "vmovsh\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vmovsh\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^z\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vmovsh\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -- 2.31.1