From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from eggs.gnu.org (eggs.gnu.org [IPv6:2001:470:142:3::10]) by sourceware.org (Postfix) with ESMTPS id BE6423858C3A for ; Wed, 6 Sep 2023 10:43:24 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org BE6423858C3A Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: sourceware.org; spf=fail smtp.mailfrom=loongson.cn Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qdq0H-0006h5-K5 for gcc-patches@gcc.gnu.org; Wed, 06 Sep 2023 06:43:24 -0400 Received: from loongson.cn (unknown [10.10.130.252]) by gateway (Coremail) with SMTP id _____8Ax1fC9V_hkWVAgAA--.64888S3; Wed, 06 Sep 2023 18:43:10 +0800 (CST) Received: from slurm-master.loongson.cn (unknown [10.10.130.252]) by localhost.localdomain (Coremail) with SMTP id AQAAf8CxriO8V_hkPXpuAA--.28525S4; Wed, 06 Sep 2023 18:43:09 +0800 (CST) From: Xiaolong Chen To: gcc-patches@gcc.gnu.org Cc: xry111@xry111.site, i@xen0n.name, xuchenghua@loongson.cn, chenglulu@loongson.cn, Xiaolong Chen Subject: [PATCH v1 0/4] Add Loongson SX/ASX instruction support to LoongArch Date: Wed, 6 Sep 2023 18:43:03 +0800 Message-Id: <20230906104307.37244-1-chenxiaolong@loongson.cn> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CM-TRANSID:AQAAf8CxriO8V_hkPXpuAA--.28525S4 X-CM-SenderInfo: hfkh05xldrz0tqj6z05rqj20fqof0/1tbiAQAGBWT3-DUEoAABs9 X-Coremail-Antispam: 1Uk129KBj93XoWxCr17WF13Cw45Gw1UXr47trc_yoW5XF43pw 47Ary5t3W8WFZ3Xr1kJay5Xrs5tan7G3yS93WfJry8C34xJr9xZ3Z7tFnxXFy3Ga45Jryr XwnY9w1UWas0qacCm3ZEXasCq-sJn29KB7ZKAUJUUUU5529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU 0xBIdaVrnRJUUUk0b4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2 IYs7xG6rWj6s0DM7CIcVAFz4kK6r1j6r18M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Xr0_Ar1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI 0_Gr0_Cr1l84ACjcxK6I8E87Iv67AKxVWxJr0_GcWl84ACjcxK6I8E87Iv6xkF7I0E14v2 6F4UJVW0owAS0I0E0xvYzxvE52x082IY62kv0487Mc804VCY07AIYIkI8VC2zVCFFI0UMc 02F40EFcxC0VAKzVAqx4xG6I80ewAv7VC0I7IYx2IY67AKxVWUXVWUAwAv7VC2z280aVAF wI0_Jr0_Gr1lOx8S6xCaFVCjc4AY6r1j6r4UM4x0Y48IcxkI7VAKI48JMxAIw28IcxkI7V AKI48JMxC20s026xCaFVCjc4AY6r1j6r4UMI8I3I0E5I8CrVAFwI0_Jr0_Jr4lx2IqxVCj r7xvwVAFwI0_JrI_JrWlx4CE17CEb7AF67AKxVWUAVWUtwCIc40Y0x0EwIxGrwCI42IY6x IIjxv20xvE14v26r1j6r1xMIIF0xvE2Ix0cI8IcVCY1x0267AKxVWUJVW8JwCI42IY6xAI w20EY4v20xvaj40_Jr0_JF4lIxAIcVC2z280aVAFwI0_Jr0_Gr1lIxAIcVC2z280aVCY1x 0267AKxVWUJVW8JbIYCTnIWIevJa73UjIFyTuYvjxUwmhFDUUUU Received-SPF: pass client-ip=114.242.206.163; envelope-from=chenxiaolong@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9,SPF_HELO_NONE=0.001,SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-Spam-Status: No, score=-7.3 required=5.0 tests=BAYES_00,KAM_DMARC_STATUS,KAM_SHORT,SPF_FAIL,SPF_HELO_PASS,TXREP autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: In order to better test the function of the vector instruction, the 128 and 256 bit test cases are further split according to the function of the instruction. Xiaolong Chen (4): LoongArch: Add tests of -mstrict-align option. LoongArch: Add testsuite framework for Loongson SX/ASX. LoongArch: Add tests for Loongson SX builtin functions. LoongArch: Add tests for Loongson SX floating-point conversion instructions. .../gcc.target/loongarch/strict-align.c | 13 + .../loongarch/vector/loongarch-vector.exp | 42 + .../loongarch/vector/lsx/lsx-builtin.c | 1461 +++++++++++++++++ .../loongarch/vector/lsx/lsx-vfcvt-1.c | 397 +++++ .../loongarch/vector/lsx/lsx-vfcvt-2.c | 277 ++++ .../loongarch/vector/lsx/lsx-vffint-1.c | 160 ++ .../loongarch/vector/lsx/lsx-vffint-2.c | 263 +++ .../loongarch/vector/lsx/lsx-vffint-3.c | 101 ++ .../loongarch/vector/lsx/lsx-vfrint_d.c | 229 +++ .../loongarch/vector/lsx/lsx-vfrint_s.c | 349 ++++ .../loongarch/vector/lsx/lsx-vftint-1.c | 348 ++++ .../loongarch/vector/lsx/lsx-vftint-2.c | 694 ++++++++ .../loongarch/vector/lsx/lsx-vftint-3.c | 1027 ++++++++++++ .../loongarch/vector/lsx/lsx-vftint-4.c | 344 ++++ .../loongarch/vector/simd_correctness_check.h | 39 + 15 files changed, 5744 insertions(+) create mode 100644 gcc/testsuite/gcc.target/loongarch/strict-align.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/loongarch-vector.exp create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-builtin.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vfcvt-1.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vfcvt-2.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vffint-1.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vffint-2.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vffint-3.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vfrint_d.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vfrint_s.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vftint-1.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vftint-2.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vftint-3.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-vftint-4.c create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/simd_correctness_check.h -- 2.20.1