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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Oct 2023 15:19:45.3915 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 481e4d67-6ae5-4c0d-45da-08dbc4242ceb X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: AM7EUR03FT061.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB9PR08MB7868 X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,FORGED_SPF_HELO,KAM_DMARC_NONE,KAM_SHORT,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE,TXREP,UNPARSEABLE_RELAY autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: This patch series adds support for reading and writing to and from system registers via the relevant ACLE-defined builtins [1], making a series of additions to the aarch64-specific areas of the compiler to make this possible. Firstly, a mechanism for defining system registers is established via a new .def file and the new SYSREG macro. This macro is the same as is used in Binutils and system register entries are compatible with either code-base. Given the information contained in this system register definition file, a compile-time validation mechanism is implemented, such that any system register name passed as a string literal argument to these builtins can be checked against known system registers and its use for a given target architecture validated. Finally, patterns for each of these builtins are added to the back-end such that, if all validation criteria are met, the correct assembly is emitted. Thus, the following example of system register access is now valid for GCC: long long old = __arm_rsr("trcseqstr"); __arm_wsr("trcseqstr", new); Testing: - Bootstrap/regtest on aarch64-linux-gnu done. [1] https://arm-software.github.io/acle/main/acle.html Victor Do Nascimento (6): aarch64: Sync system register information with Binutils aarch64: Add support for aarch64-sys-regs.def aarch64: Implement system register validation tools aarch64: Add basic target_print_operand support for CONST_STRING aarch64: Implement system register r/w arm ACLE intrinsic functions aarch64: Add front-end argument type checking for target builtins gcc/config/aarch64/aarch64-builtins.cc | 233 ++++ gcc/config/aarch64/aarch64-c.cc | 4 +- gcc/config/aarch64/aarch64-protos.h | 5 + gcc/config/aarch64/aarch64-sys-regs.def | 1059 +++++++++++++++++ gcc/config/aarch64/aarch64.cc | 182 +++ gcc/config/aarch64/aarch64.h | 36 + gcc/config/aarch64/aarch64.md | 17 + gcc/config/aarch64/arm_acle.h | 30 + gcc/config/aarch64/predicates.md | 4 + .../gcc.target/aarch64/acle/rwsr-1.c | 20 + .../gcc.target/aarch64/acle/rwsr-2.c | 15 + gcc/testsuite/gcc.target/aarch64/acle/rwsr.c | 144 +++ 12 files changed, 1747 insertions(+), 2 deletions(-) create mode 100644 gcc/config/aarch64/aarch64-sys-regs.def create mode 100644 gcc/testsuite/gcc.target/aarch64/acle/rwsr-1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/acle/rwsr-2.c create mode 100644 gcc/testsuite/gcc.target/aarch64/acle/rwsr.c -- 2.41.0