From: Lulu Cheng <chenglulu@loongson.cn>
To: gcc-patches@gcc.gnu.org
Cc: xry111@xry111.site, i@xen0n.name, xuchenghua@loongson.cn,
Lulu Cheng <chenglulu@loongson.cn>
Subject: [PATCH] LoongArch: Define macro CLEAR_INSN_CACHE.
Date: Fri, 20 Oct 2023 15:15:06 +0800 [thread overview]
Message-ID: <20231020071506.27021-1-chenglulu@loongson.cn> (raw)
LoongArch's microstructure ensures cache consistency by hardware.
Due to out-of-order execution, ibar is required to ensure the visibility of the
store (invalidated icache) executed by this CPU before ibar (to the instance).
ibar will not invalidate the icache, so the start and end parameters are not Affect
ibar performance.
gcc/ChangeLog:
* config/loongarch/loongarch.h (CLEAR_INSN_CACHE): New definition.
---
gcc/config/loongarch/loongarch.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/gcc/config/loongarch/loongarch.h b/gcc/config/loongarch/loongarch.h
index 22912018a0d..0c15c79bc4c 100644
--- a/gcc/config/loongarch/loongarch.h
+++ b/gcc/config/loongarch/loongarch.h
@@ -1239,3 +1239,6 @@ struct GTY (()) machine_function
#define TARGET_EXPLICIT_RELOCS \
(la_opt_explicit_relocs == EXPLICIT_RELOCS_ALWAYS)
+
+#undef CLEAR_INSN_CACHE
+#define CLEAR_INSN_CACHE(beg, end) __builtin_loongarch_ibar (0)
--
2.31.1
next reply other threads:[~2023-10-20 7:15 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-20 7:15 Lulu Cheng [this message]
2023-10-23 1:28 ` chenglulu
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