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From: Haochen Jiang
To: gcc-patches@gcc.gnu.org
Cc: gerald@pfeifer.com,
ubizjak@gmail.com,
hongtao.liu@intel.com
Subject: [gccwwwdocs PATCH] gcc-13/14: Mention Intel new ISA and march support
Date: Mon, 23 Oct 2023 10:18:10 +0800
Message-Id: <20231023021810.2134824-1-haochen.jiang@intel.com>
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Hi all,
This patch mentions recent update for x86-64 backend, including ISAs enabled
update on previous introduced CPU and newly introduced options/ISAs/CPUs.
Ok for wwwdocs?
Thx,
Haochen
---
htdocs/gcc-13/changes.html | 8 ++++----
htdocs/gcc-14/changes.html | 19 +++++++++++++++++++
2 files changed, 23 insertions(+), 4 deletions(-)
diff --git a/htdocs/gcc-13/changes.html b/htdocs/gcc-13/changes.html
index 10c54689..8ef3d639 100644
--- a/htdocs/gcc-13/changes.html
+++ b/htdocs/gcc-13/changes.html
@@ -579,13 +579,13 @@ You may also want to check out our
GCC now supports the Intel CPU named Sierra Forest through
-march=sierraforest
.
- The switch enables the AVX-IFMA, AVX-VNNI-INT8, AVX-NE-CONVERT and
- CMPccXADD ISA extensions.
+ The switch enables the AVX-IFMA, AVX-VNNI-INT8, AVX-NE-CONVERT, CMPccXADD,
+ ENQCMD and UINTR ISA extensions.
GCC now supports the Intel CPU named Grand Ridge through
-march=grandridge
.
- The switch enables the AVX-IFMA, AVX-VNNI-INT8, AVX-NE-CONVERT, CMPccXADD
- and RAO-INT ISA extensions.
+ The switch enables the AVX-IFMA, AVX-VNNI-INT8, AVX-NE-CONVERT, CMPccXADD,
+ ENQCMD, UINTR and RAO-INT ISA extensions.
GCC now supports the Intel CPU named Emerald Rapids through
-march=emeraldrapids
.
diff --git a/htdocs/gcc-14/changes.html b/htdocs/gcc-14/changes.html
index c817dde4..4f71061f 100644
--- a/htdocs/gcc-14/changes.html
+++ b/htdocs/gcc-14/changes.html
@@ -186,6 +186,10 @@ a work-in-progress.
IA-32/x86-64
+ - New compiler option
-m[no-]evex512
was added.
+ The compiler switch enables/disables 512 bit vector and 64 bit mask
+ register. It will be default on if AVX512F is enabled.
+
- New ISA extension support for Intel AVX-VNNI-INT16 was added.
AVX-VNNI-INT16 intrinsics are available via the
-mavxvnniint16
compiler switch.
@@ -202,6 +206,16 @@ a work-in-progress.
SM4 intrinsics are available via the -msm4
compiler switch.
+ - New ISA extension support for Intel USER_MSR was added.
+ USER_MSR intrinsics are available via the
-muser_msr
+ compiler switch.
+
+ - GCC now supports the Intel CPU named Clearwater Forest through
+
-march=clearwaterforest
.
+ Based on Sierra Forest, the switch further enables the AVX-VNNI-INT16,
+ SHA512, SM3, SM4, USER_MSR and PREFETCHI ISA extensions.
+ extensions.
+
- GCC now supports the Intel CPU named Arrow Lake through
-march=arrowlake
.
Based on Alder Lake, the switch further enables the AVX-IFMA,
@@ -216,6 +230,11 @@ a work-in-progress.
-march=lunarlake
.
Lunar Lake is based on Arrow Lake S.
+ - GCC now supports the Intel CPU named Panther Lake through
+
-march=pantherlake
.
+ Based on Arrow Lake S, the switch further enables the PREFETCHI ISA
+ extensions.
+
--
2.31.1