From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from zg8tndyumtaxlji0oc4xnzya.icoremail.net (zg8tndyumtaxlji0oc4xnzya.icoremail.net [46.101.248.176]) by sourceware.org (Postfix) with ESMTP id 59A553858D33 for ; Mon, 30 Oct 2023 07:25:54 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 59A553858D33 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=eswincomputing.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=eswincomputing.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 59A553858D33 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=46.101.248.176 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1698650756; cv=none; b=d0oBTzkDftxG25w/YXDKpm8GM/Xd0AKPd56fkIiLlfLH6/0CdJNCA8XZgZvTN0Ky9g8NNl25V2t0+vXZ5M7LffXzIsH9asuHHO+42O1JWF8zUS9GBEDIy7bYT4EYydmmcwfkFb4O82XMZFmiagN0cRoITDvu4iGQNBc9BsuQ0w4= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1698650756; c=relaxed/simple; bh=fjzh37cZLB2+xVV4CxAIKo0qcMw3McZmbiXoREr7NIs=; h=From:To:Subject:Date:Message-Id; b=uF3ytrZz7/O9nuj5q/aatGpeWizlM1kCekqKfHR89h34HXD4/6grI9eNr7jR6MvoDaIYJRBfyHMqO34EF1aqjjn5nqjxM3dfhsUM6oeLBfm00HL/0L7nTLwq8aAG0JhasLPt8Kl9G37eJT8EqNP34EAA/3ex5NfP2T8J/NdcpA8= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from localhost.localdomain (unknown [10.12.130.31]) by app1 (Coremail) with SMTP id TAJkCgBHukZwWj9lI2cBAA--.13279S6; Mon, 30 Oct 2023 15:25:39 +0800 (CST) From: Fei Gao To: gcc-patches@gcc.gnu.org Cc: kito.cheng@gmail.com, palmer@dabbelt.com, jeffreyalaw@gmail.com, Fei Gao Subject: [PATCH 2/4] [ifcvt] if convert x=c ? y+z : y by RISC-V Zicond like insns Date: Mon, 30 Oct 2023 07:25:21 +0000 Message-Id: <20231030072523.26818-3-gaofei@eswincomputing.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20231030072523.26818-1-gaofei@eswincomputing.com> References: <20231030072523.26818-1-gaofei@eswincomputing.com> X-CM-TRANSID:TAJkCgBHukZwWj9lI2cBAA--.13279S6 X-Coremail-Antispam: 1UD129KBjvJXoW3GF18tFWkJF17ArW5tF1fWFg_yoW3Jw1kpF W3Gry3KF4fAFWfGF48JFW5J3Wakr1SgryUW3s7A3yfAws5XrZYkFy8K3WF9rnxJayrWr1a 9a1jyr4qgF17JrJanT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUB214x267AKxVW5JVWrJwAFc2x0x2IEx4CE42xK8VAvwI8IcIk0 rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2048vs2IY020E87I2jVAFwI0_Jryl82xGYIkIc2 x26xkF7I0E14v26r1I6r4UM28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48ve4kI8wA2z4x0 Y4vE2Ix0cI8IcVAFwI0_Ar0_tr1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI0_Gr1j6F4UJw A2z4x0Y4vEx4A2jsIE14v26rxl6s0DM28EF7xvwVC2z280aVCY1x0267AKxVW0oVCq3wAS 0I0E0xvYzxvE52x082IY62kv0487Mc02F40EFcxC0VAKzVAqx4xG6I80ewAv7VC0I7IYx2 IY67AKxVWUJVWUGwAv7VC2z280aVAFwI0_Jr0_Gr1lOx8S6xCaFVCjc4AY6r1j6r4UM4x0 Y48IcxkI7VAKI48JM4x0x7Aq67IIx4CEVc8vx2IErcIFxwCY02Avz4vE-syl42xK82IYc2 Ij64vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1lx2IqxVAqx4xG67AKxVWUJVWUGwC20s02 6x8GjcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r126r1DMIIYrxkI7VAKI48JMIIF0x vE2Ix0cI8IcVAFwI0_Jr0_JF4lIxAIcVC0I7IYx2IY6xkF7I0E14v26r4j6F4UMIIF0xvE 42xK8VAvwI8IcIk0rVWUJVWUCwCI42IY6I8E87Iv67AKxVWUJVW8JwCI42IY6I8E87Iv6x kF7I0E14v26r4j6r4UJbIYCTnIWIevJa73UjIFyTuYvjfU5wIDUUUUU X-CM-SenderInfo: xjdrwv3l6h245lqf0zpsxwx03jof0z/ X-Spam-Status: No, score=-10.4 required=5.0 tests=BAYES_00,GIT_PATCH_0,KAM_DMARC_STATUS,KAM_SHORT,LIKELY_SPAM_BODY,RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Conditional add, if zero rd = (rc == 0) ? (rs1 + rs2) : rs1 --> czero.nez rd, rs2, rc add rd, rs1, rd Conditional add, if non-zero rd = (rc != 0) ? (rs1 + rs2) : rs1 --> czero.eqz rd, rs2, rc add rd, rs1, rd Co-authored-by: Xiao Zeng gcc/ChangeLog: * ifcvt.cc (noce_emit_czero): helper for noce_try_cond_zero_arith (noce_try_cond_zero_arith): handler for condtional zero op (noce_process_if_block): add noce_try_cond_zero_arith with hook control gcc/testsuite/ChangeLog: * gcc.target/riscv/zicond_ifcvt_opt.c: New test. --- gcc/ifcvt.cc | 112 +++++++++++++++ .../gcc.target/riscv/zicond_ifcvt_opt.c | 130 ++++++++++++++++++ 2 files changed, 242 insertions(+) create mode 100644 gcc/testsuite/gcc.target/riscv/zicond_ifcvt_opt.c diff --git a/gcc/ifcvt.cc b/gcc/ifcvt.cc index a0af553b9ff..4f98c1c7bf9 100644 --- a/gcc/ifcvt.cc +++ b/gcc/ifcvt.cc @@ -781,12 +781,14 @@ static bool noce_try_store_flag_constants (struct noce_if_info *); static bool noce_try_store_flag_mask (struct noce_if_info *); static rtx noce_emit_cmove (struct noce_if_info *, rtx, enum rtx_code, rtx, rtx, rtx, rtx, rtx = NULL, rtx = NULL); +static rtx noce_emit_czero (struct noce_if_info *, enum rtx_code, rtx, rtx); static bool noce_try_cmove (struct noce_if_info *); static bool noce_try_cmove_arith (struct noce_if_info *); static rtx noce_get_alt_condition (struct noce_if_info *, rtx, rtx_insn **); static bool noce_try_minmax (struct noce_if_info *); static bool noce_try_abs (struct noce_if_info *); static bool noce_try_sign_mask (struct noce_if_info *); +static bool noce_try_cond_zero_arith (struct noce_if_info *); /* Return the comparison code for reversed condition for IF_INFO, or UNKNOWN if reversing the condition is not possible. */ @@ -1831,6 +1833,32 @@ noce_emit_cmove (struct noce_if_info *if_info, rtx x, enum rtx_code code, return NULL_RTX; } +static rtx +noce_emit_czero (struct noce_if_info *if_info, enum rtx_code czero_code, rtx z, rtx target) +{ + machine_mode mode = GET_MODE (target); + rtx cond_op0 = XEXP (if_info->cond, 0); + rtx czero_cond + = gen_rtx_fmt_ee (czero_code, GET_MODE (cond_op0), cond_op0, const0_rtx); + rtx if_then_else = gen_rtx_IF_THEN_ELSE (mode, czero_cond, const0_rtx, z); + rtx set = gen_rtx_SET (target, if_then_else); + + start_sequence (); + rtx_insn *insn = emit_insn (set); + + if (recog_memoized (insn) >= 0) + { + rtx_insn *seq = get_insns (); + end_sequence (); + emit_insn (seq); + + return target; + } + + end_sequence (); + return NULL_RTX; +} + /* Try only simple constants and registers here. More complex cases are handled in noce_try_cmove_arith after noce_try_store_flag_arith has had a go at it. */ @@ -2880,6 +2908,88 @@ noce_try_sign_mask (struct noce_if_info *if_info) return true; } +/* Convert x = c ? y + z : y or x = c ? y : y + z. */ + +static bool +noce_try_cond_zero_arith (struct noce_if_info *if_info) +{ + rtx target; + rtx_insn *seq; + machine_mode mode = GET_MODE (if_info->x); + rtx common = NULL_RTX; + enum rtx_code czero_code = UNKNOWN; + rtx a = if_info->a; + rtx b = if_info->b; + rtx z = NULL_RTX; + rtx cond = if_info->cond; + + if (!noce_simple_bbs (if_info)) + return false; + + /* cond must be EQ or NEQ comparision of a reg and 0. */ + if (GET_CODE (cond) != NE && GET_CODE (cond) != EQ) + return false; + if (!REG_P (XEXP (cond, 0)) || !rtx_equal_p (XEXP (cond, 1), const0_rtx)) + return false; + + /* check y + z:y*/ + if (GET_CODE (a) == PLUS && REG_P (XEXP (a, 0)) && REG_P (XEXP (a, 1)) + && REG_P (b) && rtx_equal_p (XEXP (a, 0), b)) + { + common = b; + z = XEXP (a, 1); + /* x = c ? y+z : y, cond = !c --> x = cond ? y : y+z */ + czero_code = GET_CODE (cond); + } + /* check y : y+z */ + else if (GET_CODE (b) == PLUS && REG_P (XEXP (b, 0)) && REG_P (XEXP (b, 1)) + && REG_P (a) && rtx_equal_p (a, XEXP (b, 0))) + { + common = a; + z = XEXP (b, 1); + /* x = c ? y : y+z, cond = !c --> x = !cond ? y : y+z */ + czero_code = noce_reversed_cond_code (if_info); + } + else + return false; + + if (czero_code == UNKNOWN) + return false; + + start_sequence (); + + /* If we have x = c ? x + z : x, use a new reg to avoid modifying x */ + if (common && rtx_equal_p (common, if_info->x)) + target = gen_reg_rtx (mode); + else + target = if_info->x; + + target = noce_emit_czero (if_info, czero_code, z, target); + if (!target) + { + end_sequence (); + return false; + } + + target = expand_simple_binop (mode, PLUS, common, target, if_info->x, 0, + OPTAB_DIRECT); + if (!target) + { + end_sequence (); + return false; + } + + if (target != if_info->x) + noce_emit_move_insn (if_info->x, target); + + seq = end_ifcvt_sequence (if_info); + if (!seq || !targetm.noce_conversion_profitable_p (seq, if_info)) + return false; + + emit_insn_before_setloc (seq, if_info->jump, INSN_LOCATION (if_info->insn_a)); + if_info->transform_name = "noce_try_cond_zero_arith"; + return true; +} /* Optimize away "if (x & C) x |= C" and similar bit manipulation transformations. */ @@ -3975,6 +4085,8 @@ noce_process_if_block (struct noce_if_info *if_info) goto success; if (noce_try_store_flag_mask (if_info)) goto success; + if (targetm.have_cond_zero () && noce_try_cond_zero_arith (if_info)) + goto success; if (HAVE_conditional_move && noce_try_cmove_arith (if_info)) goto success; diff --git a/gcc/testsuite/gcc.target/riscv/zicond_ifcvt_opt.c b/gcc/testsuite/gcc.target/riscv/zicond_ifcvt_opt.c new file mode 100644 index 00000000000..068c1443413 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/zicond_ifcvt_opt.c @@ -0,0 +1,130 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gc_zicond -mabi=lp64d -O2" } */ +/* { dg-skip-if "" { *-*-* } {"-O0" "-O1" "-Os" "-Og" "-O3" "-Oz" "-flto"} } */ +/* { dg-final { check-function-bodies "**" "" } } */ + +/* +**test_ADD_ceqz: +** czero\.eqz a3,a2,a3 +** add a0,a1,a3 +** ret +*/ +// x = c ? y+z : y +long test_ADD_ceqz(long x, long y, long z, long c) +{ + if (c) + x = y + z; + else + x = y; + return x; +} + +/* +**test_ADD_ceqz_x: +** czero\.eqz a2,a1,a2 +** add a0,a0,a2 +** ret +*/ +// x = c ? x+z : x +long test_ADD_ceqz_x(long x, long z, long c) +{ + if (c) + x = x + z; + + return x; +} + +/* +**test_ADD_nez: +** czero\.nez a3,a2,a3 +** add a0,a1,a3 +** ret +*/ +// x = c ? y : y+z +long test_ADD_nez(long x, long y, long z, long c) +{ + if (c) + x = y; + else + x = y + z; + return x; +} + +/* +**test_ADD_nez_x: +** czero\.nez a2,a1,a2 +** add a0,a0,a2 +** ret +*/ +// x = c ? x : x+z +long test_ADD_nez_x(long x, long z, long c) +{ + if (c) + {} + else + x = x + z; + return x; +} + +/* +**test_ADD_nez_2: +** czero\.nez a3,a2,a3 +** add a0,a1,a3 +** ret +*/ +// x = !c ? y+z : y +long test_ADD_nez_2(long x, long y, long z, long c) +{ + if (!c) + x = y + z; + else + x = y; + return x; +} + +/* +**test_ADD_nez_x_2: +** czero\.nez a2,a1,a2 +** add a0,a0,a2 +** ret +*/ +// x = !c ? x+z : x +long test_ADD_nez_x_2(long x, long z, long c) +{ + if (!c) + x = x + z; + + return x; +} + +/* +**test_ADD_eqz_2: +** czero\.eqz a3,a2,a3 +** add a0,a1,a3 +** ret +*/ +// x = !c ? y : y+z +long test_ADD_eqz_2(long x, long y, long z, long c) +{ + if (!c) + x = y; + else + x = y + z; + return x; +} + +/* +**test_ADD_eqz_x_2: +** czero\.eqz a2,a1,a2 +** add a0,a0,a2 +** ret +*/ +// x = !c ? x : x+z +long test_ADD_eqz_x_2(long x, long z, long c) +{ + if (!c) + {} + else + x = x + z; + return x; +} -- 2.17.1