* [PATCH] RISC-V: Make rv32i_zcmp testcase more robust
@ 2023-10-30 16:37 Patrick O'Neill
2023-10-30 16:55 ` Jeff Law
0 siblings, 1 reply; 3+ messages in thread
From: Patrick O'Neill @ 2023-10-30 16:37 UTC (permalink / raw)
To: gcc-patches; +Cc: jeffreyalaw, gaofei, Patrick O'Neill
GCC recently changed its register allocator which causes this
testcase to fail.
This patch updates the regex to be more robust to change by accepting
any s register in the range of 1-9 for cm.push and cm.popret insns.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rv32i_zcmp.c: Accept any register in the
range of 1-9 for cm.push and cm.popret insns.
Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
---
Tested using glibc rv64gc on r14-4980-g2672c60917d.
---
gcc/testsuite/gcc.target/riscv/rv32i_zcmp.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/gcc/testsuite/gcc.target/riscv/rv32i_zcmp.c b/gcc/testsuite/gcc.target/riscv/rv32i_zcmp.c
index ea562b7a233..1e1a8be8705 100644
--- a/gcc/testsuite/gcc.target/riscv/rv32i_zcmp.c
+++ b/gcc/testsuite/gcc.target/riscv/rv32i_zcmp.c
@@ -26,9 +26,9 @@ f2 (void);
/*
**test1:
** ...
-** cm.push {ra, s0-s4}, -80
+** cm.push {ra, s0-s[1-9]}, -80
** ...
-** cm.popret {ra, s0-s4}, 80
+** cm.popret {ra, s0-s[1-9]}, 80
** ...
*/
int
@@ -50,9 +50,9 @@ test1 ()
/*
**test2_step1_0_size:
** ...
-** cm.push {ra, s0-s1}, -64
+** cm.push {ra, s0-s[1-9]}, -64
** ...
-** cm.popret {ra, s0-s1}, 64
+** cm.popret {ra, s0-s[1-9]}, 64
** ...
*/
int
@@ -70,9 +70,9 @@ test2_step1_0_size ()
/*
**test3:
** ...
-** cm.push {ra, s0-s4}, -80
+** cm.push {ra, s0-s[1-9]}, -80
** ...
-** cm.popret {ra, s0-s4}, 80
+** cm.popret {ra, s0-s[1-9]}, 80
** ...
*/
float
--
2.34.1
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] RISC-V: Make rv32i_zcmp testcase more robust
2023-10-30 16:37 [PATCH] RISC-V: Make rv32i_zcmp testcase more robust Patrick O'Neill
@ 2023-10-30 16:55 ` Jeff Law
2023-10-30 16:59 ` [Committed] " Patrick O'Neill
0 siblings, 1 reply; 3+ messages in thread
From: Jeff Law @ 2023-10-30 16:55 UTC (permalink / raw)
To: Patrick O'Neill, gcc-patches; +Cc: gaofei
On 10/30/23 10:37, Patrick O'Neill wrote:
> GCC recently changed its register allocator which causes this
> testcase to fail.
> This patch updates the regex to be more robust to change by accepting
> any s register in the range of 1-9 for cm.push and cm.popret insns.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/riscv/rv32i_zcmp.c: Accept any register in the
> range of 1-9 for cm.push and cm.popret insns.
OK
jeff
^ permalink raw reply [flat|nested] 3+ messages in thread
* [Committed] RISC-V: Make rv32i_zcmp testcase more robust
2023-10-30 16:55 ` Jeff Law
@ 2023-10-30 16:59 ` Patrick O'Neill
0 siblings, 0 replies; 3+ messages in thread
From: Patrick O'Neill @ 2023-10-30 16:59 UTC (permalink / raw)
To: Jeff Law, gcc-patches; +Cc: gaofei
On 10/30/23 09:55, Jeff Law wrote:
>
>
> On 10/30/23 10:37, Patrick O'Neill wrote:
>> GCC recently changed its register allocator which causes this
>> testcase to fail.
>> This patch updates the regex to be more robust to change by accepting
>> any s register in the range of 1-9 for cm.push and cm.popret insns.
>>
>> gcc/testsuite/ChangeLog:
>>
>> * gcc.target/riscv/rv32i_zcmp.c: Accept any register in the
>> range of 1-9 for cm.push and cm.popret insns.
> OK
> jeff
Committed.
Patrick
^ permalink raw reply [flat|nested] 3+ messages in thread
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2023-10-30 16:37 [PATCH] RISC-V: Make rv32i_zcmp testcase more robust Patrick O'Neill
2023-10-30 16:55 ` Jeff Law
2023-10-30 16:59 ` [Committed] " Patrick O'Neill
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