From: Patrick O'Neill <patrick@rivosinc.com>
To: gcc-patches@gcc.gnu.org
Cc: Patrick O'Neill <patrick@rivosinc.com>
Subject: [PATCH 1/2] RISC-V: Let non-atomic targets use optimized amo loads/stores
Date: Mon, 30 Oct 2023 17:49:28 -0700 [thread overview]
Message-ID: <20231031004929.1435217-1-patrick@rivosinc.com> (raw)
Non-atomic targets are currently prevented from using the optimized fencing for
seq_cst load/seq_cst store. This patch removes that constraint.
gcc/ChangeLog:
* config/riscv/sync-rvwmo.md (atomic_load_rvwmo<mode>): Remove
TARGET_ATOMIC constraint
(atomic_store_rvwmo<mode>): Ditto.
* config/riscv/sync-ztso.md (atomic_load_ztso<mode>): Ditto.
(atomic_store_ztso<mode>): Ditto.
* config/riscv/sync.md (atomic_load<mode>): Ditto.
(atomic_store<mode>): Ditto.
Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
---
gcc/config/riscv/sync-rvwmo.md | 4 ++--
gcc/config/riscv/sync-ztso.md | 4 ++--
gcc/config/riscv/sync.md | 4 ++--
3 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/gcc/config/riscv/sync-rvwmo.md b/gcc/config/riscv/sync-rvwmo.md
index cb641ea9ec3..c35eae15334 100644
--- a/gcc/config/riscv/sync-rvwmo.md
+++ b/gcc/config/riscv/sync-rvwmo.md
@@ -52,7 +52,7 @@
[(match_operand:GPR 1 "memory_operand" "A")
(match_operand:SI 2 "const_int_operand")] ;; model
UNSPEC_ATOMIC_LOAD))]
- "TARGET_ATOMIC && !TARGET_ZTSO"
+ "!TARGET_ZTSO"
{
enum memmodel model = (enum memmodel) INTVAL (operands[2]);
model = memmodel_base (model);
@@ -78,7 +78,7 @@
[(match_operand:GPR 1 "reg_or_0_operand" "rJ")
(match_operand:SI 2 "const_int_operand")] ;; model
UNSPEC_ATOMIC_STORE))]
- "TARGET_ATOMIC && !TARGET_ZTSO"
+ "!TARGET_ZTSO"
{
enum memmodel model = (enum memmodel) INTVAL (operands[2]);
model = memmodel_base (model);
diff --git a/gcc/config/riscv/sync-ztso.md b/gcc/config/riscv/sync-ztso.md
index 7bb15b7ab8c..6fdfa912a2c 100644
--- a/gcc/config/riscv/sync-ztso.md
+++ b/gcc/config/riscv/sync-ztso.md
@@ -46,7 +46,7 @@
[(match_operand:GPR 1 "memory_operand" "A")
(match_operand:SI 2 "const_int_operand")] ;; model
UNSPEC_ATOMIC_LOAD))]
- "TARGET_ATOMIC && TARGET_ZTSO"
+ "TARGET_ZTSO"
{
enum memmodel model = (enum memmodel) INTVAL (operands[2]);
model = memmodel_base (model);
@@ -66,7 +66,7 @@
[(match_operand:GPR 1 "reg_or_0_operand" "rJ")
(match_operand:SI 2 "const_int_operand")] ;; model
UNSPEC_ATOMIC_STORE))]
- "TARGET_ATOMIC && TARGET_ZTSO"
+ "TARGET_ZTSO"
{
enum memmodel model = (enum memmodel) INTVAL (operands[2]);
model = memmodel_base (model);
diff --git a/gcc/config/riscv/sync.md b/gcc/config/riscv/sync.md
index 6ff3493b5ce..ec9d4b4f59e 100644
--- a/gcc/config/riscv/sync.md
+++ b/gcc/config/riscv/sync.md
@@ -60,7 +60,7 @@
[(match_operand:GPR 0 "register_operand")
(match_operand:GPR 1 "memory_operand")
(match_operand:SI 2 "const_int_operand")] ;; model
- "TARGET_ATOMIC"
+ ""
{
if (TARGET_ZTSO)
emit_insn (gen_atomic_load_ztso<mode> (operands[0], operands[1],
@@ -75,7 +75,7 @@
[(match_operand:GPR 0 "memory_operand")
(match_operand:GPR 1 "reg_or_0_operand")
(match_operand:SI 2 "const_int_operand")] ;; model
- "TARGET_ATOMIC"
+ ""
{
if (TARGET_ZTSO)
emit_insn (gen_atomic_store_ztso<mode> (operands[0], operands[1],
--
2.34.1
next reply other threads:[~2023-10-31 0:52 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-31 0:49 Patrick O'Neill [this message]
2023-10-31 0:49 ` [PATCH 2/2] RISC-V: Require a extension for testcases with atomic insns Patrick O'Neill
2023-10-31 13:07 ` Jeff Law
2023-10-31 17:16 ` [Committed " Patrick O'Neill
2023-10-31 13:05 ` [PATCH 1/2] RISC-V: Let non-atomic targets use optimized amo loads/stores Jeff Law
2023-10-31 17:16 ` [Committed " Patrick O'Neill
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