[PATCH] test: Recover sdiv_pow2 check and remove test of RISC-V

[Juzhe-Zhong <juzhe.zhong@rivai.ai>]

gcc/testsuite/ChangeLog:

	* gcc.dg/vect/vect-sdiv-pow2-1.c: Recover scan check.
	* lib/target-supports.exp: Remove riscv.

---
 gcc/testsuite/gcc.dg/vect/vect-sdiv-pow2-1.c | 2 +-
 gcc/testsuite/lib/target-supports.exp        | 4 +---
 2 files changed, 2 insertions(+), 4 deletions(-)

diff --git a/gcc/testsuite/gcc.dg/vect/vect-sdiv-pow2-1.c b/gcc/testsuite/gcc.dg/vect/vect-sdiv-pow2-1.c
index 8056c2a6748..49ecbe216f2 100644
--- a/gcc/testsuite/gcc.dg/vect/vect-sdiv-pow2-1.c
+++ b/gcc/testsuite/gcc.dg/vect/vect-sdiv-pow2-1.c
@@ -79,5 +79,5 @@ main (void)
   return 0;
 }
 
-/* { dg-final { scan-tree-dump "vect_recog_divmod_pattern: detected" "vect" } } */
+/* { dg-final { scan-tree-dump {\.DIV_POW2} "vect" { target vect_sdiv_pow2_si } } } */
 /* { dg-final { scan-tree-dump-times "vectorized 1 loop" 18 "vect" { target vect_sdiv_pow2_si } } } */
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 0317fc102ef..8f6cdf16661 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -8077,9 +8077,7 @@ proc check_effective_target_vect_mulhrs_hi {} {
 
 proc check_effective_target_vect_sdiv_pow2_si {} {
     return [expr { ([istarget aarch64*-*-*]
-		    && [check_effective_target_aarch64_sve])
-		   || ([istarget riscv*-*-*]
-		       && [check_effective_target_riscv_v]) }]
+		    && [check_effective_target_aarch64_sve]) }]
 }
 
 # Return 1 if the target plus current options supports a vector
-- 
2.36.3