From: chenyixuan@iscas.ac.cn
To: gcc-patches@gcc.gnu.org
Cc: kito.cheng@gmail.com, shiyulong@iscas.ac.cn,
oriachiuan@gmail.com, shihua@iscas.ac.cn, jiawei@iscas.ac.cn
Subject: [PATCH] minimal support for xtheadv
Date: Wed, 8 Nov 2023 21:12:37 +0800 [thread overview]
Message-ID: <20231108131237.3672914-1-chenyixuan@iscas.ac.cn> (raw)
From: XYenChi <oriachiuan@gmail.com>
This patch is for support xtheadv.
gcc/ChangeLog:
2023-11-08 Chen Yixuan <chenyixuan@iscas.an.cn>
* common/config/riscv/riscv-common.cc: Add xthead minimal support.
gcc/config/ChangeLog:
2023-11-08 Chen Yixuan <chenyixuan@iscas.an.cn>
* riscv/riscv.opt: Add xthead minimal support.
---
gcc/common/config/riscv/riscv-common.cc | 2 ++
gcc/config/riscv/riscv.opt | 2 ++
2 files changed, 4 insertions(+)
diff --git a/gcc/common/config/riscv/riscv-common.cc b/gcc/common/config/riscv/riscv-common.cc
index 526dbb7603b..d5ea0ee9b70 100644
--- a/gcc/common/config/riscv/riscv-common.cc
+++ b/gcc/common/config/riscv/riscv-common.cc
@@ -325,6 +325,7 @@ static const struct riscv_ext_version riscv_ext_version_table[] =
{"xtheadmemidx", ISA_SPEC_CLASS_NONE, 1, 0},
{"xtheadmempair", ISA_SPEC_CLASS_NONE, 1, 0},
{"xtheadsync", ISA_SPEC_CLASS_NONE, 1, 0},
+ {"xtheadv", ISA_SPEC_CLASS_NONE, 0, 7},
{"xventanacondops", ISA_SPEC_CLASS_NONE, 1, 0},
@@ -1680,6 +1681,7 @@ static const riscv_ext_flag_table_t riscv_ext_flag_table[] =
{"xtheadmemidx", &gcc_options::x_riscv_xthead_subext, MASK_XTHEADMEMIDX},
{"xtheadmempair", &gcc_options::x_riscv_xthead_subext, MASK_XTHEADMEMPAIR},
{"xtheadsync", &gcc_options::x_riscv_xthead_subext, MASK_XTHEADSYNC},
+ {"xtheadv", &gcc_options::x_riscv_xthead_subext, MASK_XTHEADV},
{"xventanacondops", &gcc_options::x_riscv_xventana_subext, MASK_XVENTANACONDOPS},
diff --git a/gcc/config/riscv/riscv.opt b/gcc/config/riscv/riscv.opt
index 70d78151cee..2bbdf680fa2 100644
--- a/gcc/config/riscv/riscv.opt
+++ b/gcc/config/riscv/riscv.opt
@@ -438,6 +438,8 @@ Mask(XTHEADMEMPAIR) Var(riscv_xthead_subext)
Mask(XTHEADSYNC) Var(riscv_xthead_subext)
+Mask(XTHEADV) Var(riscv_xthead_subext)
+
TargetVariable
int riscv_xventana_subext
--
2.42.0
next reply other threads:[~2023-11-08 13:13 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-08 13:12 chenyixuan [this message]
2023-11-09 7:39 ` Kito Cheng
2023-11-09 8:05 ` Christoph Müllner
2023-11-09 8:38 ` Yixuan Chen
2023-11-09 16:04 ` Jeff Law
2023-11-09 16:22 ` Kito Cheng
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