From: Juzhe-Zhong <juzhe.zhong@rivai.ai>
To: gcc-patches@gcc.gnu.org
Cc: kito.cheng@gmail.com, kito.cheng@sifive.com,
jeffreyalaw@gmail.com, rdapp.gcc@gmail.com,
Juzhe-Zhong <juzhe.zhong@rivai.ai>
Subject: [Committed] RISC-V: Add PR112450 test to avoid regression
Date: Thu, 9 Nov 2023 20:00:38 +0800 [thread overview]
Message-ID: <20231109120038.109612-1-juzhe.zhong@rivai.ai> (raw)
ICE has been fixed by Richard:https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112450.
Add test to avoid future regression. Committed.
PR target/112450
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/pr112450.c: New test.
---
.../gcc.target/riscv/rvv/autovec/pr112450.c | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/pr112450.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr112450.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr112450.c
new file mode 100644
index 00000000000..964a4d34e3d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr112450.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O2 --param=riscv-autovec-lmul=m8 -fno-vect-cost-model" } */
+
+int a, b, d, e;
+short c;
+void f() {
+ for (; e; e++) {
+ int g = 6;
+ for (; g > 2; g--) {
+ int i = -8;
+ while (i < 20) {
+ i += 5;
+ a += b;
+ }
+ c *= d;
+ }
+ b--;
+ }
+}
--
2.36.3
reply other threads:[~2023-11-09 12:00 UTC|newest]
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