From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id CC00F38582BC for ; Sun, 12 Nov 2023 14:53:09 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org CC00F38582BC Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=arm.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org CC00F38582BC Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1699800790; cv=none; b=ZqGsE1UxGZU174cs426wJ6PkI7vlaW2ZVNF1Ffo8uPndIN3vRZBHjMbjV6sxjutsccIfA3PWNR+2ANT8yttHrAHF2nF0UqmeKPH9ZkEPZOUOnHf8nI7DmJbb9Ml6bTq8Y7sHTuRkpyQ65BsnUtZRIJZ9kaJU7Ae2p/4GI4gd74E= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1699800790; c=relaxed/simple; bh=cLE3KAVdm3xeh1pzjMEQyHkolsgrcF12VEzLAHeNM/o=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=M6PxjJRN9reV9I+DschutyRhcXqaBhhpECQOgP9tj2FDy/7DRytxOaSXYeI7YiCIF3DFQzF1nbdaNA6E4N+9MPijt/nroUartwoU9D7l7KS045x5jk1r3LOmxyBkxK9gcYWb38ocXNwPy8W/+8npjK0L84tra9fW+SH9AceqRaQ= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8780BDA7; Sun, 12 Nov 2023 06:53:54 -0800 (PST) Received: from e121540-lin.manchester.arm.com (e121540-lin.manchester.arm.com [10.32.110.72]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id DFA843F7B4; Sun, 12 Nov 2023 06:53:08 -0800 (PST) From: Richard Sandiford To: jlaw@ventanamicro.com, vmakarov@redhat.com, gcc-patches@gcc.gnu.org Cc: Richard Sandiford Subject: [PATCH 3/5] lra: Handle register filters Date: Sun, 12 Nov 2023 14:52:27 +0000 Message-Id: <20231112145229.2924713-4-richard.sandiford@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231112145229.2924713-1-richard.sandiford@arm.com> References: <20231112145229.2924713-1-richard.sandiford@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-23.3 required=5.0 tests=BAYES_00,GIT_PATCH_0,KAM_DMARC_NONE,KAM_DMARC_STATUS,KAM_LAZY_DOMAIN_SECURITY,SPF_HELO_NONE,SPF_NONE,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: This patch makes LRA apply register filters. This plus the recog change is enough for correct code generation, but a follow-on IRA patch improves the allocation. All the new code should be optimised away on targets that don't use register filters. That's because get_register_filter just wraps "return nullptr" on those targets. gcc/ * lra-constraints.cc (process_alt_operands): Check register filters. --- gcc/lra-constraints.cc | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/gcc/lra-constraints.cc b/gcc/lra-constraints.cc index 0607c8be7cb..9b6a2af5b75 100644 --- a/gcc/lra-constraints.cc +++ b/gcc/lra-constraints.cc @@ -2149,6 +2149,7 @@ process_alt_operands (int only_alternative) int reload_nregs, reload_sum; bool costly_p; enum reg_class cl; + const HARD_REG_SET *cl_filter; /* Calculate some data common for all alternatives to speed up the function. */ @@ -2514,6 +2515,7 @@ process_alt_operands (int only_alternative) || spilled_pseudo_p (op)) win = true; cl = GENERAL_REGS; + cl_filter = nullptr; goto reg; default: @@ -2523,7 +2525,10 @@ process_alt_operands (int only_alternative) case CT_REGISTER: cl = reg_class_for_constraint (cn); if (cl != NO_REGS) - goto reg; + { + cl_filter = get_register_filter (cn); + goto reg; + } break; case CT_CONST_INT: @@ -2567,6 +2572,7 @@ process_alt_operands (int only_alternative) win = true; cl = base_reg_class (VOIDmode, ADDR_SPACE_GENERIC, ADDRESS, SCRATCH); + cl_filter = nullptr; badop = false; goto reg; @@ -2600,6 +2606,8 @@ process_alt_operands (int only_alternative) this_alternative_exclude_start_hard_regs |= ira_exclude_class_mode_regs[cl][mode]; this_alternative_set |= reg_class_contents[cl]; + if (cl_filter) + this_alternative_exclude_start_hard_regs |= ~*cl_filter; if (costly_p) { this_costly_alternative @@ -2613,6 +2621,9 @@ process_alt_operands (int only_alternative) if (hard_regno[nop] >= 0 && in_hard_reg_set_p (this_alternative_set, mode, hard_regno[nop]) + && (!cl_filter + || TEST_HARD_REG_BIT (*cl_filter, + hard_regno[nop])) && ((REG_ATTRS (op) && (decl = REG_EXPR (op)) != NULL && VAR_P (decl) && DECL_HARD_REGISTER (decl)) || !(TEST_HARD_REG_BIT -- 2.25.1