From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.31]) by sourceware.org (Postfix) with ESMTPS id 225643858C42 for ; Wed, 15 Nov 2023 09:47:10 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 225643858C42 Authentication-Results: sourceware.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: sourceware.org; spf=fail smtp.mailfrom=gmail.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 225643858C42 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=134.134.136.31 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1700041632; cv=none; b=PQmqzUtMqMDcwSpTLo330O9Hs0hMlAhFtLI6InZjpup05s3ttRhvlWoglfrJvkUaBO5NrIY2450VCAQ5ZJAYu96cdyOFT+uR/4CWOrX0zjEcKd02aZnWzde6kTQKDlAuEIFdP4MkefMzFIHv7ilkK3siNrCoZKORDxVEIug7lRA= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1700041632; c=relaxed/simple; bh=jAtvMGq4xIVd43JPg8FaU0uVuKTj/ix3xB1b2+mIV0o=; h=DKIM-Signature:From:To:Subject:Date:Message-Id:MIME-Version; b=Ln8CQkWOpapasCEhtz+5khHkhyGsa5Db6FFdG5S2PcJWQ0FI1h94+vqXl+Gvz+k22O5/VOZHeMclcN47DWd1us5wCnWnlAhtirmGQ2a79arMYqB7BiLXPe4Epvea5jv98bti0KAZz8b1nx7Sbef25PWVyT1gdSEJm1DxLb1hmqc= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1700041630; x=1731577630; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=jAtvMGq4xIVd43JPg8FaU0uVuKTj/ix3xB1b2+mIV0o=; b=oA1QOrdYnJDFA7PXfMA0cilZpJ8ADxiEDUmNDNOub7uBDvjV15njFkey dPVZtvJG+Tm5qxaz3pYvSq7wXPD+uL09QBWw9NQw3mbdYtIiTi1w3+JZj hGvQ66myixmORCc+fn77zjyA4rbRAABtrVq35WUAGdrS24vPgFl2QxUyR jMcKeLfXZMQT4N6TnAm8ZlLE1fy3kGRQE2MgtlgCWzq267Seyw9iuEcuo SR8cHX5KxU8bL6FhYqC+aJqIx/0B0cWQDeQJ8mJeTsONrvVBOBbqSjWvV Qjx4des+RGFyKmjSaCkDva1OL6I4l+Rn/5x2+p1JaKTnOOQ04XUY8m0+v g==; X-IronPort-AV: E=McAfee;i="6600,9927,10894"; a="455138347" X-IronPort-AV: E=Sophos;i="6.03,304,1694761200"; d="scan'208";a="455138347" Received: from orviesa002.jf.intel.com ([10.64.159.142]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Nov 2023 01:47:08 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.03,304,1694761200"; d="scan'208";a="6105929" Received: from shvmail03.sh.intel.com ([10.239.245.20]) by orviesa002.jf.intel.com with ESMTP; 15 Nov 2023 01:47:07 -0800 Received: from shliclel4217.sh.intel.com (shliclel4217.sh.intel.com [10.239.240.127]) by shvmail03.sh.intel.com (Postfix) with ESMTP id AFAE11005678; Wed, 15 Nov 2023 17:47:05 +0800 (CST) From: Hongyu Wang To: gcc-patches@gcc.gnu.org Cc: ubizjak@gmail.com, hongtao.liu@intel.com Subject: [PATCH 04/16] [APX NDD] Disable seg_prefixed memory usage for NDD add Date: Wed, 15 Nov 2023 17:46:53 +0800 Message-Id: <20231115094705.3976553-5-hongyu.wang@intel.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20231115094705.3976553-1-hongyu.wang@intel.com> References: <20231115094705.3976553-1-hongyu.wang@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-10.8 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,FREEMAIL_ENVFROM_END_DIGIT,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM,GIT_PATCH_0,HEADER_FROM_DIFFERENT_DOMAINS,SPF_HELO_NONE,SPF_SOFTFAIL,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: NDD uses evex prefix, so when segment prefix is also applied, the instruction could excceed its 15byte limit, especially adding immediates. This could happen when "e" constraint accepts any UNSPEC_TPOFF/UNSPEC_NTPOFF constant and it will add the offset to segment register, which will be encoded using segment prefix. Disable those *POFF constant usage in NDD add alternatives with new constraint. gcc/ChangeLog: * config/i386/constraints.md (je): New constraint. * config/i386/i386-protos.h (x86_no_poff_operand_p): New function to check any *POFF constant. * config/i386/i386.cc (x86_no_poff_operand_p): New prototype. * config/i386/i386.md (*add_1): Split out je alternative for add. --- gcc/config/i386/constraints.md | 5 +++++ gcc/config/i386/i386-protos.h | 1 + gcc/config/i386/i386.cc | 25 +++++++++++++++++++++++++ gcc/config/i386/i386.md | 10 +++++----- 4 files changed, 36 insertions(+), 5 deletions(-) diff --git a/gcc/config/i386/constraints.md b/gcc/config/i386/constraints.md index cbee31fa40a..c6b51324294 100644 --- a/gcc/config/i386/constraints.md +++ b/gcc/config/i386/constraints.md @@ -433,3 +433,8 @@ (define_address_constraint "jb" (define_register_constraint "jc" "TARGET_APX_EGPR && !TARGET_AVX ? GENERAL_GPR16 : GENERAL_REGS") + +(define_constraint "je" + "@internal constant that do not allow any unspec global offsets" + (and (match_operand 0 "x86_64_immediate_operand") + (match_test "x86_no_poff_operand_p (op)"))) diff --git a/gcc/config/i386/i386-protos.h b/gcc/config/i386/i386-protos.h index 3e08eae4e79..5d902e2925b 100644 --- a/gcc/config/i386/i386-protos.h +++ b/gcc/config/i386/i386-protos.h @@ -66,6 +66,7 @@ extern bool x86_extended_QIreg_mentioned_p (rtx_insn *); extern bool x86_extended_reg_mentioned_p (rtx); extern bool x86_extended_rex2reg_mentioned_p (rtx); extern bool x86_evex_reg_mentioned_p (rtx [], int); +extern bool x86_no_poff_operand_p (rtx); extern bool x86_maybe_negate_const_int (rtx *, machine_mode); extern machine_mode ix86_cc_mode (enum rtx_code, rtx, rtx); diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc index 3779d5b1206..47159b06f7d 100644 --- a/gcc/config/i386/i386.cc +++ b/gcc/config/i386/i386.cc @@ -23292,6 +23292,31 @@ x86_evex_reg_mentioned_p (rtx operands[], int nops) return false; } +/* Return true when rtx operand does not contain any UNSPEC_*POFF related + constant to avoid APX_NDD instructions excceed encoding length limit. */ +bool +x86_no_poff_operand_p (rtx operand) +{ + if (GET_CODE (operand) == CONST) + { + rtx op = XEXP (operand, 0); + if (GET_CODE (op) == PLUS) + op = XEXP (op, 0); + + if (GET_CODE (op) == UNSPEC) + { + int unspec = XINT (op, 1); + return (unspec != UNSPEC_NTPOFF + && unspec != UNSPEC_TPOFF + && unspec != UNSPEC_DTPOFF + && unspec != UNSPEC_GOTTPOFF + && unspec != UNSPEC_GOTNTPOFF + && unspec != UNSPEC_INDNTPOFF); + } + } + return true; +} + /* If profitable, negate (without causing overflow) integer constant of mode MODE at location LOC. Return true in this case. */ bool diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 7ddb2cb2a71..ecd06625a7d 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -6359,15 +6359,15 @@ (define_insn_and_split "*add3_doubleword_concat_zext" "split_double_mode (mode, &operands[0], 1, &operands[0], &operands[5]);") (define_insn "*add_1" - [(set (match_operand:SWI48 0 "nonimmediate_operand" "=rm,r,r,r,r,r") + [(set (match_operand:SWI48 0 "nonimmediate_operand" "=rm,r,r,r,r,r,r,r") (plus:SWI48 - (match_operand:SWI48 1 "nonimmediate_operand" "%0,0,r,r,rm,r") - (match_operand:SWI48 2 "x86_64_general_operand" "re,BM,0,le,re,BM"))) + (match_operand:SWI48 1 "nonimmediate_operand" "%0,0,r,r,rm,r,m,r") + (match_operand:SWI48 2 "x86_64_general_operand" "re,BM,0,le,r,e,je,BM"))) (clobber (reg:CC FLAGS_REG))] "ix86_binary_operator_ok (PLUS, mode, operands, ix86_can_use_ndd_p (PLUS))" { - bool use_ndd = (which_alternative == 4 || which_alternative == 5); + bool use_ndd = (which_alternative >= 4); switch (get_attr_type (insn)) { case TYPE_LEA: @@ -6398,7 +6398,7 @@ (define_insn "*add_1" : "add{}\t{%2, %0|%0, %2}"; } } - [(set_attr "isa" "*,*,*,*,apx_ndd,apx_ndd") + [(set_attr "isa" "*,*,*,*,apx_ndd,apx_ndd,apx_ndd,apx_ndd") (set (attr "type") (cond [(eq_attr "alternative" "3") (const_string "lea") -- 2.31.1