From: "Jun Sha (Joshua)" <cooper.joshua@linux.alibaba.com>
To: gcc-patches@gcc.gnu.org
Cc: jim.wilson.gcc@gmail.com, palmer@dabbelt.com, andrew@sifive.com,
philipp.tomsich@vrull.eu, jeffreyalaw@gmail.com,
christoph.muellner@vrull.eu,
"Jun Sha (Joshua)" <cooper.joshua@linux.alibaba.com>
Subject: [PATCH 0/9] RISC-V: Support XTheadVector extensions
Date: Fri, 17 Nov 2023 16:19:55 +0800 [thread overview]
Message-ID: <20231117081955.2395-1-cooper.joshua@linux.alibaba.com> (raw)
This patch series presents gcc implementation of the XTheadVector
extension [1].
[1] https://github.com/T-head-Semi/thead-extension-spec/
Contributors:
Jun Sha (Joshua) <cooper.joshua@linux.alibaba.com>
Jin Ma <jinma@linux.alibaba.com>
RISC-V: minimal support for xtheadvector
RISC-V: Handle differences between xtheadvector and vector
RISC-V: Tests for overlapping RVV and XTheadVector instructions (Part1)
RISC-V: Tests for overlapping RVV and XTheadVector instructions (Part2)
RISC-V: Tests for overlapping RVV and XTheadVector instructions (Part3)
RISC-V: Tests for overlapping RVV and XTheadVector instructions (Part4)
RISC-V: Tests for overlapping RVV and XTheadVector instructions (Part5)
RISC-V: Add support for xtheadvector-specific load/store intrinsics
RISC-V: Disable fractional type intrinsics for XTheadVector
---
gcc/common/config/riscv/riscv-common.cc | 10 +
gcc/config.gcc | 2 +-
gcc/config/riscv/riscv-c.cc | 8 +-
gcc/config/riscv/riscv-protos.h | 1 +
.../riscv/riscv-vector-builtins-bases.cc | 122 +++
.../riscv/riscv-vector-builtins-bases.h | 30 +
.../riscv/riscv-vector-builtins-functions.def | 2 +
.../riscv/riscv-vector-builtins-shapes.cc | 122 +++
.../riscv/riscv-vector-builtins-shapes.h | 2 +
.../riscv/riscv-vector-builtins-types.def | 120 +++
gcc/config/riscv/riscv-vector-builtins.cc | 300 ++++++-
gcc/config/riscv/riscv-vector-switch.def | 144 ++--
gcc/config/riscv/riscv.cc | 13 +-
gcc/config/riscv/riscv.opt | 2 +
gcc/config/riscv/riscv_th_vector.h | 49 ++
.../riscv/thead-vector-builtins-functions.def | 30 +
gcc/config/riscv/thead-vector.md | 235 ++++++
gcc/config/riscv/vector-iterators.md | 4 +
gcc/config/riscv/vector.md | 778 +++++++++---------
.../riscv/predef-__riscv_th_v_intrinsic.c | 11 +
.../gcc.target/riscv/rvv/base/pragma-1.c | 2 +-
.../gcc.target/riscv/rvv/fractional-type.c | 79 ++
.../gcc.target/riscv/rvv/xtheadvector.c | 13 +
.../rvv/xtheadvector/autovec/vadd-run-nofm.c | 4 +
.../riscv/rvv/xtheadvector/autovec/vadd-run.c | 81 ++
.../xtheadvector/autovec/vadd-rv32gcv-nofm.c | 10 +
.../rvv/xtheadvector/autovec/vadd-rv32gcv.c | 8 +
.../xtheadvector/autovec/vadd-rv64gcv-nofm.c | 10 +
.../rvv/xtheadvector/autovec/vadd-rv64gcv.c | 8 +
.../rvv/xtheadvector/autovec/vadd-template.h | 70 ++
.../rvv/xtheadvector/autovec/vadd-zvfh-run.c | 54 ++
.../riscv/rvv/xtheadvector/autovec/vand-run.c | 75 ++
.../rvv/xtheadvector/autovec/vand-rv32gcv.c | 7 +
.../rvv/xtheadvector/autovec/vand-rv64gcv.c | 7 +
.../rvv/xtheadvector/autovec/vand-template.h | 61 ++
.../rvv/xtheadvector/binop_vv_constraint-1.c | 68 ++
.../rvv/xtheadvector/binop_vv_constraint-3.c | 27 +
.../rvv/xtheadvector/binop_vv_constraint-4.c | 27 +
.../rvv/xtheadvector/binop_vv_constraint-5.c | 29 +
.../rvv/xtheadvector/binop_vv_constraint-6.c | 28 +
.../rvv/xtheadvector/binop_vv_constraint-7.c | 29 +
.../rvv/xtheadvector/binop_vx_constraint-1.c | 68 ++
.../rvv/xtheadvector/binop_vx_constraint-10.c | 68 ++
.../rvv/xtheadvector/binop_vx_constraint-11.c | 68 ++
.../rvv/xtheadvector/binop_vx_constraint-12.c | 73 ++
.../rvv/xtheadvector/binop_vx_constraint-13.c | 68 ++
.../rvv/xtheadvector/binop_vx_constraint-14.c | 68 ++
.../rvv/xtheadvector/binop_vx_constraint-15.c | 68 ++
.../rvv/xtheadvector/binop_vx_constraint-16.c | 73 ++
.../rvv/xtheadvector/binop_vx_constraint-17.c | 73 ++
.../rvv/xtheadvector/binop_vx_constraint-18.c | 68 ++
.../rvv/xtheadvector/binop_vx_constraint-19.c | 73 ++
.../rvv/xtheadvector/binop_vx_constraint-2.c | 68 ++
.../rvv/xtheadvector/binop_vx_constraint-20.c | 68 ++
.../rvv/xtheadvector/binop_vx_constraint-21.c | 73 ++
.../rvv/xtheadvector/binop_vx_constraint-22.c | 68 ++
.../rvv/xtheadvector/binop_vx_constraint-23.c | 73 ++
.../rvv/xtheadvector/binop_vx_constraint-24.c | 68 ++
.../rvv/xtheadvector/binop_vx_constraint-25.c | 73 ++
.../rvv/xtheadvector/binop_vx_constraint-26.c | 68 ++
.../rvv/xtheadvector/binop_vx_constraint-27.c | 73 ++
.../rvv/xtheadvector/binop_vx_constraint-28.c | 68 ++
.../rvv/xtheadvector/binop_vx_constraint-29.c | 73 ++
.../rvv/xtheadvector/binop_vx_constraint-3.c | 68 ++
.../rvv/xtheadvector/binop_vx_constraint-30.c | 68 ++
.../rvv/xtheadvector/binop_vx_constraint-31.c | 73 ++
.../rvv/xtheadvector/binop_vx_constraint-32.c | 68 ++
.../rvv/xtheadvector/binop_vx_constraint-33.c | 73 ++
.../rvv/xtheadvector/binop_vx_constraint-34.c | 68 ++
.../rvv/xtheadvector/binop_vx_constraint-35.c | 73 ++
.../rvv/xtheadvector/binop_vx_constraint-36.c | 68 ++
.../rvv/xtheadvector/binop_vx_constraint-37.c | 68 ++
.../rvv/xtheadvector/binop_vx_constraint-38.c | 68 ++
.../rvv/xtheadvector/binop_vx_constraint-39.c | 68 ++
.../rvv/xtheadvector/binop_vx_constraint-4.c | 73 ++
.../rvv/xtheadvector/binop_vx_constraint-40.c | 73 ++
.../rvv/xtheadvector/binop_vx_constraint-41.c | 68 ++
.../rvv/xtheadvector/binop_vx_constraint-42.c | 68 ++
.../rvv/xtheadvector/binop_vx_constraint-43.c | 68 ++
.../rvv/xtheadvector/binop_vx_constraint-44.c | 73 ++
.../rvv/xtheadvector/binop_vx_constraint-45.c | 123 +++
.../rvv/xtheadvector/binop_vx_constraint-46.c | 72 ++
.../rvv/xtheadvector/binop_vx_constraint-47.c | 16 +
.../rvv/xtheadvector/binop_vx_constraint-48.c | 16 +
.../rvv/xtheadvector/binop_vx_constraint-49.c | 16 +
.../rvv/xtheadvector/binop_vx_constraint-5.c | 68 ++
.../rvv/xtheadvector/binop_vx_constraint-50.c | 18 +
.../rvv/xtheadvector/binop_vx_constraint-6.c | 68 ++
.../rvv/xtheadvector/binop_vx_constraint-7.c | 68 ++
.../rvv/xtheadvector/binop_vx_constraint-8.c | 73 ++
.../rvv/xtheadvector/binop_vx_constraint-9.c | 68 ++
.../rvv/xtheadvector/rvv-xtheadvector.exp | 41 +
.../rvv/xtheadvector/ternop_vv_constraint-1.c | 83 ++
.../rvv/xtheadvector/ternop_vv_constraint-2.c | 83 ++
.../rvv/xtheadvector/ternop_vv_constraint-3.c | 83 ++
.../rvv/xtheadvector/ternop_vv_constraint-4.c | 83 ++
.../rvv/xtheadvector/ternop_vv_constraint-5.c | 83 ++
.../rvv/xtheadvector/ternop_vv_constraint-6.c | 83 ++
.../rvv/xtheadvector/ternop_vx_constraint-1.c | 71 ++
.../rvv/xtheadvector/ternop_vx_constraint-2.c | 38 +
.../rvv/xtheadvector/ternop_vx_constraint-3.c | 125 +++
.../rvv/xtheadvector/ternop_vx_constraint-4.c | 123 +++
.../rvv/xtheadvector/ternop_vx_constraint-5.c | 123 +++
.../rvv/xtheadvector/ternop_vx_constraint-6.c | 130 +++
.../rvv/xtheadvector/ternop_vx_constraint-7.c | 130 +++
.../rvv/xtheadvector/ternop_vx_constraint-8.c | 71 ++
.../rvv/xtheadvector/ternop_vx_constraint-9.c | 71 ++
.../rvv/xtheadvector/unop_v_constraint-1.c | 68 ++
.../riscv/rvv/xtheadvector/vlb-vsb.c | 68 ++
.../riscv/rvv/xtheadvector/vlbu-vsb.c | 68 ++
.../riscv/rvv/xtheadvector/vlh-vsh.c | 68 ++
.../riscv/rvv/xtheadvector/vlhu-vsh.c | 68 ++
.../riscv/rvv/xtheadvector/vlw-vsw.c | 68 ++
.../riscv/rvv/xtheadvector/vlwu-vsw.c | 68 ++
114 files changed, 7455 insertions(+), 457 deletions(-)
create mode 100644 gcc/config/riscv/riscv_th_vector.h
create mode 100644 gcc/config/riscv/thead-vector-builtins-functions.def
create mode 100644 gcc/config/riscv/thead-vector.md
create mode 100644 gcc/testsuite/gcc.target/riscv/predef-__riscv_th_v_intrinsic.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/fractional-type.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/autovec/vadd-run-nofm.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/autovec/vadd-run.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/autovec/vadd-rv32gcv-nofm.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/autovec/vadd-rv32gcv.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/autovec/vadd-rv64gcv-nofm.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/autovec/vadd-rv64gcv.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/autovec/vadd-template.h
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/autovec/vadd-zvfh-run.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/autovec/vand-run.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/autovec/vand-rv32gcv.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/autovec/vand-rv64gcv.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/autovec/vand-template.h
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vv_constraint-1.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vv_constraint-3.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vv_constraint-4.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vv_constraint-5.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vv_constraint-6.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vv_constraint-7.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-1.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-10.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-11.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-12.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-13.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-14.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-15.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-16.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-17.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-18.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-19.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-2.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-20.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-21.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-22.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-23.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-24.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-25.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-26.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-27.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-28.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-29.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-3.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-30.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-31.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-32.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-33.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-34.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-35.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-36.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-37.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-38.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-39.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-4.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-40.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-41.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-42.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-43.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-44.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-45.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-46.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-47.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-48.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-49.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-5.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-50.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-6.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-7.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-8.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-9.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/rvv-xtheadvector.exp
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/ternop_vv_constraint-1.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/ternop_vv_constraint-2.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/ternop_vv_constraint-3.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/ternop_vv_constraint-4.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/ternop_vv_constraint-5.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/ternop_vv_constraint-6.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/ternop_vx_constraint-1.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/ternop_vx_constraint-2.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/ternop_vx_constraint-3.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/ternop_vx_constraint-4.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/ternop_vx_constraint-5.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/ternop_vx_constraint-6.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/ternop_vx_constraint-7.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/ternop_vx_constraint-8.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/ternop_vx_constraint-9.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/unop_v_constraint-1.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/vlb-vsb.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/vlbu-vsb.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/vlh-vsh.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/vlhu-vsh.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/vlw-vsw.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/vlwu-vsw.c
next reply other threads:[~2023-11-17 8:20 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-17 8:19 Jun Sha (Joshua) [this message]
2023-11-17 8:52 ` [PATCH 1/9] RISC-V: minimal support for xtheadvector Jun Sha (Joshua)
2023-11-17 8:55 ` [PATCH 2/9] RISC-V: Handle differences between xtheadvector and vector Jun Sha (Joshua)
2023-11-17 8:56 ` [PATCH 3/9] RISC-V: Tests for overlapping RVV and XTheadVector instructions (Part1) Jun Sha (Joshua)
2023-11-17 8:58 ` [PATCH 4/9] RISC-V: Tests for overlapping RVV and XTheadVector instructions (Part2) Jun Sha (Joshua)
2023-11-17 8:59 ` [PATCH 5/9] RISC-V: Tests for overlapping RVV and XTheadVector instructions (Part3) Jun Sha (Joshua)
2023-11-17 9:00 ` [PATCH 6/9] RISC-V: Tests for overlapping RVV and XTheadVector instructions (Part4) Jun Sha (Joshua)
2023-11-17 9:01 ` [PATCH 7/9] RISC-V: Tests for overlapping RVV and XTheadVector instructions (Part5) Jun Sha (Joshua)
2023-11-17 9:02 ` [PATCH 8/9] RISC-V: Add support for xtheadvector-specific load/store intrinsics Jun Sha (Joshua)
2023-11-17 9:03 ` [PATCH 9/9] RISC-V: Disable fractional type intrinsics for the XTheadVector extension Jun Sha (Joshua)
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20231117081955.2395-1-cooper.joshua@linux.alibaba.com \
--to=cooper.joshua@linux.alibaba.com \
--cc=andrew@sifive.com \
--cc=christoph.muellner@vrull.eu \
--cc=gcc-patches@gcc.gnu.org \
--cc=jeffreyalaw@gmail.com \
--cc=jim.wilson.gcc@gmail.com \
--cc=palmer@dabbelt.com \
--cc=philipp.tomsich@vrull.eu \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).