From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from xry111.site (xry111.site [89.208.246.23]) by sourceware.org (Postfix) with ESMTPS id 1B4F0385841A for ; Fri, 17 Nov 2023 20:44:02 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 1B4F0385841A Authentication-Results: sourceware.org; dmarc=pass (p=reject dis=none) header.from=xry111.site Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=xry111.site ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 1B4F0385841A Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=89.208.246.23 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1700253844; cv=none; b=VJ5EVUIEbfFI/cM8uTVZ3pGlUMEvvtTJE2vdyP3mBQSCk5d8Pdrd6hfxnKhr4XSebgXHsmHaOipgi016CH9i0Z+Ldw1Kj5yNlpulQtmRJC/wpOa5W40VlcwLHThO/9O68vhyypO6CZaem1gHBFr5v7njRTTcZzGgxmHPdwDQLwA= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1700253844; c=relaxed/simple; bh=l2TLJhtVXg3YBp0mczx1Ev4YOMTedYUEzagQH7nj6p4=; h=DKIM-Signature:From:To:Subject:Date:Message-ID:MIME-Version; b=O9yOthlhkeGoxcVJq5Cyhetdu1+Oh1Zd4acU7ukgzazi5m4w0a9LSUpVae9aLX/dSW3JAhr0CYMspKepU7d9gUu0LBfHSx+r+b8fDEpuh7M1mPUihj8Wv/qtqgKRdXIruR5H+JDywI6iYUSBFd1kHfZr+1vA+mCCjVst0Ueo5GQ= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=xry111.site; s=default; t=1700253841; bh=l2TLJhtVXg3YBp0mczx1Ev4YOMTedYUEzagQH7nj6p4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=OezRQteBgFpBq8pyJ89UdkNt9AYVL2QmeRY7CZL5rjF01Y6IAguN1wQEq/rwO7Emc RO8ynU3I6AxIMozb3ho/oyjO7G+WXdtOaqrw5vz8trvnfWWa8usZnOWFIWFdv4a1N/ jp5UlRmfTpDu7c52HLYdgYywSLJhd7Qa9dQGnmbg= Received: from stargazer.. (unknown [IPv6:240e:358:1152:b00:dc73:854d:832e:5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (Client did not present a certificate) (Authenticated sender: xry111@xry111.site) by xry111.site (Postfix) with ESMTPSA id 5370766B3B; Fri, 17 Nov 2023 15:43:57 -0500 (EST) From: Xi Ruoyao To: gcc-patches@gcc.gnu.org Cc: chenglulu , i@xen0n.name, xuchenghua@loongson.cn, Xi Ruoyao Subject: [PATCH v2 1/6] LoongArch: Fix internal error running "gcc -march=native" on LA664 Date: Sat, 18 Nov 2023 04:43:18 +0800 Message-ID: <20231117204323.453536-2-xry111@xry111.site> X-Mailer: git-send-email 2.42.1 In-Reply-To: <20231117204323.453536-1-xry111@xry111.site> References: <20231117204323.453536-1-xry111@xry111.site> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-7.7 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,GIT_PATCH_0,KAM_NUMSUBJECT,LIKELY_SPAM_FROM,SPF_HELO_PASS,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On LA664, the PRID preset is ISA_BASE_LA64V110 but the base architecture is guessed ISA_BASE_LA64V100. This causes a warning to be outputed: cc1: warning: base architecture 'la64' differs from PRID preset '?' But we've not set the "?" above in loongarch_isa_base_strings, thus it's a nullptr and then an ICE is triggered. Add ISA_BASE_LA64V110 to genopts and initialize loongarch_isa_base_strings[ISA_BASE_LA64V110] correctly to fix the ICE. The warning itself will be fixed later. gcc/ChangeLog: * config/loongarch/genopts/loongarch-strings: (STR_ISA_BASE_LA64V110): Add. * config/loongarch/genopts/loongarch.opt.in: (ISA_BASE_LA64V110): Add. * config/loongarch/loongarch-def.c (loongarch_isa_base_strings): Initialize [ISA_BASE_LA64V110] to STR_ISA_BASE_LA64V110. * config/loongarch/loongarch.opt: Regenerate. * config/loongarch/loongarch-str.h: Regenerate. --- gcc/config/loongarch/genopts/loongarch-strings | 1 + gcc/config/loongarch/genopts/loongarch.opt.in | 3 +++ gcc/config/loongarch/loongarch-def.c | 1 + gcc/config/loongarch/loongarch-str.h | 1 + gcc/config/loongarch/loongarch.opt | 3 +++ 5 files changed, 9 insertions(+) diff --git a/gcc/config/loongarch/genopts/loongarch-strings b/gcc/config/loongarch/genopts/loongarch-strings index 7bc4824007e..b2070c83ed0 100644 --- a/gcc/config/loongarch/genopts/loongarch-strings +++ b/gcc/config/loongarch/genopts/loongarch-strings @@ -30,6 +30,7 @@ STR_CPU_LA664 la664 # Base architecture STR_ISA_BASE_LA64V100 la64 +STR_ISA_BASE_LA64V110 la64v1.1 # -mfpu OPTSTR_ISA_EXT_FPU fpu diff --git a/gcc/config/loongarch/genopts/loongarch.opt.in b/gcc/config/loongarch/genopts/loongarch.opt.in index 00b4733d75b..b274b3fb21e 100644 --- a/gcc/config/loongarch/genopts/loongarch.opt.in +++ b/gcc/config/loongarch/genopts/loongarch.opt.in @@ -32,6 +32,9 @@ Basic ISAs of LoongArch: EnumValue Enum(isa_base) String(@@STR_ISA_BASE_LA64V100@@) Value(ISA_BASE_LA64V100) +EnumValue +Enum(isa_base) String(@@STR_ISA_BASE_LA64V110@@) Value(ISA_BASE_LA64V110) + ;; ISA extensions / adjustments Enum Name(isa_ext_fpu) Type(int) diff --git a/gcc/config/loongarch/loongarch-def.c b/gcc/config/loongarch/loongarch-def.c index 067629141b6..f22d488acb2 100644 --- a/gcc/config/loongarch/loongarch-def.c +++ b/gcc/config/loongarch/loongarch-def.c @@ -165,6 +165,7 @@ loongarch_cpu_multipass_dfa_lookahead[N_TUNE_TYPES] = { const char* loongarch_isa_base_strings[N_ISA_BASE_TYPES] = { [ISA_BASE_LA64V100] = STR_ISA_BASE_LA64V100, + [ISA_BASE_LA64V110] = STR_ISA_BASE_LA64V110, }; const char* diff --git a/gcc/config/loongarch/loongarch-str.h b/gcc/config/loongarch/loongarch-str.h index fc4f41bfc1e..114dbc692d7 100644 --- a/gcc/config/loongarch/loongarch-str.h +++ b/gcc/config/loongarch/loongarch-str.h @@ -33,6 +33,7 @@ along with GCC; see the file COPYING3. If not see #define STR_CPU_LA664 "la664" #define STR_ISA_BASE_LA64V100 "la64" +#define STR_ISA_BASE_LA64V110 "la64v1.1" #define OPTSTR_ISA_EXT_FPU "fpu" #define STR_NONE "none" diff --git a/gcc/config/loongarch/loongarch.opt b/gcc/config/loongarch/loongarch.opt index 7f129e53ba5..350ca30d232 100644 --- a/gcc/config/loongarch/loongarch.opt +++ b/gcc/config/loongarch/loongarch.opt @@ -39,6 +39,9 @@ Basic ISAs of LoongArch: EnumValue Enum(isa_base) String(la64) Value(ISA_BASE_LA64V100) +EnumValue +Enum(isa_base) String(la64v1.1) Value(ISA_BASE_LA64V110) + ;; ISA extensions / adjustments Enum Name(isa_ext_fpu) Type(int) -- 2.42.1