From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from out30-131.freemail.mail.aliyun.com (out30-131.freemail.mail.aliyun.com [115.124.30.131]) by sourceware.org (Postfix) with ESMTPS id A18A23858D1E for ; Sat, 18 Nov 2023 04:24:19 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org A18A23858D1E Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=linux.alibaba.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=linux.alibaba.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org A18A23858D1E Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=115.124.30.131 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1700281464; cv=none; b=hZc6t65baoEg0sjME0lY9HYi5u+YRwcdB99gXzsvE7KakqoVaXWnNXx1wYxs/HfRvoKtx5ZnnKFhcCiL11WMj8zodIYprDflrwlE53G6z5d8PLTA3J8gkYaOf7XtWVBAl9OrVyZ51wWQt/PWZ7MalW3Ma/OuFlgdn5zdb1ppNCk= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1700281464; c=relaxed/simple; bh=7il8uQcJPJtoXih0cB6HB31XuuYNapX+FTwPwsudVaI=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=L/hCLNymqBv0BCtmU6pbuRQ6oynj3NShz+FzzrOnaArbQlLlNYKFK5ZF+voSA234C1BJcHz5YjkrqiFfdPwf0OwT2LkRwEsL2xRYTQIK6HaE3L/oE73CfnINHju3XmO1Y5zQV0ZjEkaLMFgaZ00unwM2G7LfyzdeD4njqClIeCA= ARC-Authentication-Results: i=1; server2.sourceware.org X-Alimail-AntiSpam:AC=PASS;BC=-1|-1;BR=01201311R211e4;CH=green;DM=||false|;DS=||;FP=0|-1|-1|-1|0|-1|-1|-1;HT=ay29a033018045170;MF=cooper.joshua@linux.alibaba.com;NM=1;PH=DS;RN=8;SR=0;TI=SMTPD_---0VwbPfNP_1700281448; Received: from localhost.localdomain(mailfrom:cooper.joshua@linux.alibaba.com fp:SMTPD_---0VwbPfNP_1700281448) by smtp.aliyun-inc.com; Sat, 18 Nov 2023 12:24:12 +0800 From: "Jun Sha (Joshua)" To: gcc-patches@gcc.gnu.org Cc: jim.wilson.gcc@gmail.com, palmer@dabbelt.com, andrew@sifive.com, philipp.tomsich@vrull.eu, jeffreyalaw@gmail.com, christoph.muellner@vrull.eu, "Jun Sha (Joshua)" Subject: [PATCH v2 0/9] RISC-V: Support XTheadVector extensions Date: Sat, 18 Nov 2023 12:22:58 +0800 Message-Id: <20231118042258.3545-1-cooper.joshua@linux.alibaba.com> X-Mailer: git-send-email 2.27.0.windows.1 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-14.0 required=5.0 tests=BAYES_00,ENV_AND_HDR_SPF_MATCH,KAM_DMARC_STATUS,KAM_SHORT,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE,UNPARSEABLE_RELAY,URIBL_BLACK,USER_IN_DEF_SPF_WL autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: This patch series presents gcc implementation of the XTheadVector extension [1]. [1] https://github.com/T-head-Semi/thead-extension-spec/ I updated my patch series, because I forgot to add co-authors in the last version. Contributors: Jun Sha (Joshua) Jin Ma Christoph Müllner RISC-V: minimal support for xtheadvector RISC-V: Handle differences between xtheadvector and vector RISC-V: Tests for overlapping RVV and XTheadVector instructions (Part1) RISC-V: Tests for overlapping RVV and XTheadVector instructions (Part2) RISC-V: Tests for overlapping RVV and XTheadVector instructions (Part3) RISC-V: Tests for overlapping RVV and XTheadVector instructions (Part4) RISC-V: Tests for overlapping RVV and XTheadVector instructions (Part5) RISC-V: Add support for xtheadvector-specific load/store intrinsics RISC-V: Disable fractional type intrinsics for XTheadVector --- gcc/common/config/riscv/riscv-common.cc | 10 + gcc/config.gcc | 2 +- gcc/config/riscv/riscv-c.cc | 8 +- gcc/config/riscv/riscv-protos.h | 1 + .../riscv/riscv-vector-builtins-bases.cc | 122 +++ .../riscv/riscv-vector-builtins-bases.h | 30 + .../riscv/riscv-vector-builtins-functions.def | 2 + .../riscv/riscv-vector-builtins-shapes.cc | 122 +++ .../riscv/riscv-vector-builtins-shapes.h | 2 + .../riscv/riscv-vector-builtins-types.def | 120 +++ gcc/config/riscv/riscv-vector-builtins.cc | 300 ++++++- gcc/config/riscv/riscv-vector-switch.def | 144 ++-- gcc/config/riscv/riscv.cc | 13 +- gcc/config/riscv/riscv.opt | 2 + gcc/config/riscv/riscv_th_vector.h | 49 ++ .../riscv/thead-vector-builtins-functions.def | 30 + gcc/config/riscv/thead-vector.md | 235 ++++++ gcc/config/riscv/vector-iterators.md | 4 + gcc/config/riscv/vector.md | 778 +++++++++--------- .../riscv/predef-__riscv_th_v_intrinsic.c | 11 + .../gcc.target/riscv/rvv/base/pragma-1.c | 2 +- .../gcc.target/riscv/rvv/fractional-type.c | 79 ++ .../gcc.target/riscv/rvv/xtheadvector.c | 13 + .../rvv/xtheadvector/autovec/vadd-run-nofm.c | 4 + .../riscv/rvv/xtheadvector/autovec/vadd-run.c | 81 ++ .../xtheadvector/autovec/vadd-rv32gcv-nofm.c | 10 + .../rvv/xtheadvector/autovec/vadd-rv32gcv.c | 8 + .../xtheadvector/autovec/vadd-rv64gcv-nofm.c | 10 + .../rvv/xtheadvector/autovec/vadd-rv64gcv.c | 8 + .../rvv/xtheadvector/autovec/vadd-template.h | 70 ++ .../rvv/xtheadvector/autovec/vadd-zvfh-run.c | 54 ++ .../riscv/rvv/xtheadvector/autovec/vand-run.c | 75 ++ .../rvv/xtheadvector/autovec/vand-rv32gcv.c | 7 + .../rvv/xtheadvector/autovec/vand-rv64gcv.c | 7 + .../rvv/xtheadvector/autovec/vand-template.h | 61 ++ .../rvv/xtheadvector/binop_vv_constraint-1.c | 68 ++ .../rvv/xtheadvector/binop_vv_constraint-3.c | 27 + .../rvv/xtheadvector/binop_vv_constraint-4.c | 27 + .../rvv/xtheadvector/binop_vv_constraint-5.c | 29 + .../rvv/xtheadvector/binop_vv_constraint-6.c | 28 + .../rvv/xtheadvector/binop_vv_constraint-7.c | 29 + .../rvv/xtheadvector/binop_vx_constraint-1.c | 68 ++ .../rvv/xtheadvector/binop_vx_constraint-10.c | 68 ++ .../rvv/xtheadvector/binop_vx_constraint-11.c | 68 ++ .../rvv/xtheadvector/binop_vx_constraint-12.c | 73 ++ .../rvv/xtheadvector/binop_vx_constraint-13.c | 68 ++ .../rvv/xtheadvector/binop_vx_constraint-14.c | 68 ++ .../rvv/xtheadvector/binop_vx_constraint-15.c | 68 ++ .../rvv/xtheadvector/binop_vx_constraint-16.c | 73 ++ .../rvv/xtheadvector/binop_vx_constraint-17.c | 73 ++ .../rvv/xtheadvector/binop_vx_constraint-18.c | 68 ++ .../rvv/xtheadvector/binop_vx_constraint-19.c | 73 ++ .../rvv/xtheadvector/binop_vx_constraint-2.c | 68 ++ .../rvv/xtheadvector/binop_vx_constraint-20.c | 68 ++ .../rvv/xtheadvector/binop_vx_constraint-21.c | 73 ++ .../rvv/xtheadvector/binop_vx_constraint-22.c | 68 ++ .../rvv/xtheadvector/binop_vx_constraint-23.c | 73 ++ .../rvv/xtheadvector/binop_vx_constraint-24.c | 68 ++ .../rvv/xtheadvector/binop_vx_constraint-25.c | 73 ++ .../rvv/xtheadvector/binop_vx_constraint-26.c | 68 ++ .../rvv/xtheadvector/binop_vx_constraint-27.c | 73 ++ .../rvv/xtheadvector/binop_vx_constraint-28.c | 68 ++ .../rvv/xtheadvector/binop_vx_constraint-29.c | 73 ++ .../rvv/xtheadvector/binop_vx_constraint-3.c | 68 ++ .../rvv/xtheadvector/binop_vx_constraint-30.c | 68 ++ .../rvv/xtheadvector/binop_vx_constraint-31.c | 73 ++ .../rvv/xtheadvector/binop_vx_constraint-32.c | 68 ++ .../rvv/xtheadvector/binop_vx_constraint-33.c | 73 ++ .../rvv/xtheadvector/binop_vx_constraint-34.c | 68 ++ .../rvv/xtheadvector/binop_vx_constraint-35.c | 73 ++ .../rvv/xtheadvector/binop_vx_constraint-36.c | 68 ++ .../rvv/xtheadvector/binop_vx_constraint-37.c | 68 ++ .../rvv/xtheadvector/binop_vx_constraint-38.c | 68 ++ .../rvv/xtheadvector/binop_vx_constraint-39.c | 68 ++ .../rvv/xtheadvector/binop_vx_constraint-4.c | 73 ++ .../rvv/xtheadvector/binop_vx_constraint-40.c | 73 ++ .../rvv/xtheadvector/binop_vx_constraint-41.c | 68 ++ .../rvv/xtheadvector/binop_vx_constraint-42.c | 68 ++ .../rvv/xtheadvector/binop_vx_constraint-43.c | 68 ++ .../rvv/xtheadvector/binop_vx_constraint-44.c | 73 ++ .../rvv/xtheadvector/binop_vx_constraint-45.c | 123 +++ .../rvv/xtheadvector/binop_vx_constraint-46.c | 72 ++ .../rvv/xtheadvector/binop_vx_constraint-47.c | 16 + .../rvv/xtheadvector/binop_vx_constraint-48.c | 16 + .../rvv/xtheadvector/binop_vx_constraint-49.c | 16 + .../rvv/xtheadvector/binop_vx_constraint-5.c | 68 ++ .../rvv/xtheadvector/binop_vx_constraint-50.c | 18 + .../rvv/xtheadvector/binop_vx_constraint-6.c | 68 ++ .../rvv/xtheadvector/binop_vx_constraint-7.c | 68 ++ .../rvv/xtheadvector/binop_vx_constraint-8.c | 73 ++ .../rvv/xtheadvector/binop_vx_constraint-9.c | 68 ++ .../rvv/xtheadvector/rvv-xtheadvector.exp | 41 + .../rvv/xtheadvector/ternop_vv_constraint-1.c | 83 ++ .../rvv/xtheadvector/ternop_vv_constraint-2.c | 83 ++ .../rvv/xtheadvector/ternop_vv_constraint-3.c | 83 ++ .../rvv/xtheadvector/ternop_vv_constraint-4.c | 83 ++ .../rvv/xtheadvector/ternop_vv_constraint-5.c | 83 ++ .../rvv/xtheadvector/ternop_vv_constraint-6.c | 83 ++ .../rvv/xtheadvector/ternop_vx_constraint-1.c | 71 ++ .../rvv/xtheadvector/ternop_vx_constraint-2.c | 38 + .../rvv/xtheadvector/ternop_vx_constraint-3.c | 125 +++ .../rvv/xtheadvector/ternop_vx_constraint-4.c | 123 +++ .../rvv/xtheadvector/ternop_vx_constraint-5.c | 123 +++ .../rvv/xtheadvector/ternop_vx_constraint-6.c | 130 +++ .../rvv/xtheadvector/ternop_vx_constraint-7.c | 130 +++ .../rvv/xtheadvector/ternop_vx_constraint-8.c | 71 ++ .../rvv/xtheadvector/ternop_vx_constraint-9.c | 71 ++ .../rvv/xtheadvector/unop_v_constraint-1.c | 68 ++ .../riscv/rvv/xtheadvector/vlb-vsb.c | 68 ++ .../riscv/rvv/xtheadvector/vlbu-vsb.c | 68 ++ .../riscv/rvv/xtheadvector/vlh-vsh.c | 68 ++ .../riscv/rvv/xtheadvector/vlhu-vsh.c | 68 ++ .../riscv/rvv/xtheadvector/vlw-vsw.c | 68 ++ .../riscv/rvv/xtheadvector/vlwu-vsw.c | 68 ++ 114 files changed, 7455 insertions(+), 457 deletions(-) create mode 100644 gcc/config/riscv/riscv_th_vector.h create mode 100644 gcc/config/riscv/thead-vector-builtins-functions.def create mode 100644 gcc/config/riscv/thead-vector.md create mode 100644 gcc/testsuite/gcc.target/riscv/predef-__riscv_th_v_intrinsic.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/fractional-type.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/autovec/vadd-run-nofm.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/autovec/vadd-run.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/autovec/vadd-rv32gcv-nofm.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/autovec/vadd-rv32gcv.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/autovec/vadd-rv64gcv-nofm.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/autovec/vadd-rv64gcv.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/autovec/vadd-template.h create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/autovec/vadd-zvfh-run.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/autovec/vand-run.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/autovec/vand-rv32gcv.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/autovec/vand-rv64gcv.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/autovec/vand-template.h create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vv_constraint-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vv_constraint-3.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vv_constraint-4.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vv_constraint-5.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vv_constraint-6.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vv_constraint-7.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-10.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-11.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-12.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-13.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-14.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-15.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-16.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-17.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-18.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-19.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-20.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-21.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-22.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-23.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-24.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-25.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-26.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-27.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-28.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-29.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-3.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-30.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-31.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-32.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-33.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-34.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-35.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-36.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-37.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-38.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-39.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-4.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-40.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-41.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-42.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-43.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-44.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-45.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-46.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-47.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-48.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-49.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-5.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-50.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-6.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-7.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-8.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/binop_vx_constraint-9.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/rvv-xtheadvector.exp create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/ternop_vv_constraint-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/ternop_vv_constraint-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/ternop_vv_constraint-3.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/ternop_vv_constraint-4.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/ternop_vv_constraint-5.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/ternop_vv_constraint-6.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/ternop_vx_constraint-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/ternop_vx_constraint-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/ternop_vx_constraint-3.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/ternop_vx_constraint-4.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/ternop_vx_constraint-5.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/ternop_vx_constraint-6.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/ternop_vx_constraint-7.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/ternop_vx_constraint-8.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/ternop_vx_constraint-9.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/unop_v_constraint-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/vlb-vsb.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/vlbu-vsb.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/vlh-vsh.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/vlhu-vsh.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/vlw-vsw.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/vlwu-vsw.c