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From: Richard Sandiford <richard.sandiford@arm.com>
To: gcc-patches@gcc.gnu.org
Cc: Richard Sandiford <richard.sandiford@arm.com>
Subject: [pushed v2 09/25] aarch64: Tweak error message for (tuple,vector) pairs
Date: Tue,  5 Dec 2023 10:13:07 +0000	[thread overview]
Message-ID: <20231205101323.1914247-10-richard.sandiford@arm.com> (raw)
In-Reply-To: <20231205101323.1914247-1-richard.sandiford@arm.com>

SME2 adds more intrinsics that take a tuple of vectors followed
by a single vector, with the two arguments expected to have the
same element type.  Unlike with the existing svset* intrinsics,
the size of the tuple is not fixed by the overloaded function name.

This patch adds an error message that (hopefully) copes better
with that combination.

gcc/
	* config/aarch64/aarch64-sve-builtins.cc
	(function_resolver::require_derived_vector_type): Add a specific
	error message for the case in which the caller wants a single
	vector whose element type matches a previous tuyple argument.

gcc/testsuite/
	* gcc.target/aarch64/sve/acle/general-c/set_1.c: Tweak expected
	error message.
	* gcc.target/aarch64/sve/acle/general-c/set_3.c: Likewise.
	* gcc.target/aarch64/sve/acle/general-c/set_5.c: Likewise.
---
 gcc/config/aarch64/aarch64-sve-builtins.cc          | 13 +++++++++++++
 .../gcc.target/aarch64/sve/acle/general-c/set_1.c   |  4 ++--
 .../gcc.target/aarch64/sve/acle/general-c/set_3.c   |  4 ++--
 .../gcc.target/aarch64/sve/acle/general-c/set_5.c   |  4 ++--
 4 files changed, 19 insertions(+), 6 deletions(-)

diff --git a/gcc/config/aarch64/aarch64-sve-builtins.cc b/gcc/config/aarch64/aarch64-sve-builtins.cc
index cdae77272ab..55bd2662d1a 100644
--- a/gcc/config/aarch64/aarch64-sve-builtins.cc
+++ b/gcc/config/aarch64/aarch64-sve-builtins.cc
@@ -1707,6 +1707,19 @@ require_derived_vector_type (unsigned int argno,
   if (!actual_type)
     return false;
 
+  if (orig_expected_tclass == SAME_TYPE_CLASS
+      && orig_expected_bits == SAME_SIZE)
+    {
+      if (actual_type.type == first_type.type)
+	return true;
+
+      error_at (location, "passing %qT to argument %d of %qE, but"
+		" argument %d was a tuple of %qT",
+		get_vector_type (actual_type), argno + 1, fndecl,
+		first_argno + 1, get_vector_type (first_type.type));
+      return false;
+    }
+
   /* Exit now if we got the right type.  */
   auto &actual_type_suffix = type_suffixes[actual_type.type];
   bool tclass_ok_p = (actual_type_suffix.tclass == expected_tclass);
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/set_1.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/set_1.c
index f07c76102ca..f2a6da5360f 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/set_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/set_1.c
@@ -16,8 +16,8 @@ f1 (svbool_t pg, svuint8_t u8, svuint8x2_t u8x2, svuint8x3_t u8x3, int x)
   u8x2 = svset2 (u8x3, 0, u8); /* { dg-error {passing 'svuint8x3_t' to argument 1 of 'svset2', which expects a tuple of 2 vectors} } */
   u8x2 = svset2 (pg, 0, u8); /* { dg-error {passing 'svbool_t' to argument 1 of 'svset2', which expects a tuple of 2 vectors} } */
   u8x2 = svset2 (u8x2, 0, u8x2); /* { dg-error {passing 'svuint8x2_t' to argument 3 of 'svset2', which expects a single SVE vector rather than a tuple} } */
-  u8x2 = svset2 (u8x2, 0, f64); /* { dg-error {passing 'svfloat64_t' instead of the expected 'svuint8_t' to argument 3 of 'svset2', after passing 'svuint8x2_t' to argument 1} } */
-  u8x2 = svset2 (u8x2, 0, pg); /* { dg-error {passing 'svbool_t' instead of the expected 'svuint8_t' to argument 3 of 'svset2', after passing 'svuint8x2_t' to argument 1} } */
+  u8x2 = svset2 (u8x2, 0, f64); /* { dg-error {passing 'svfloat64_t' to argument 3 of 'svset2', but argument 1 was a tuple of 'svuint8_t'} } */
+  u8x2 = svset2 (u8x2, 0, pg); /* { dg-error {passing 'svbool_t' to argument 3 of 'svset2', but argument 1 was a tuple of 'svuint8_t'} } */
   u8x2 = svset2 (u8x2, x, u8); /* { dg-error {argument 2 of 'svset2' must be an integer constant expression} } */
   u8x2 = svset2 (u8x2, 0, u8);
   f64 = svset2 (u8x2, 0, u8); /* { dg-error {incompatible types when assigning to type 'svfloat64_t' from type 'svuint8x2_t'} } */
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/set_3.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/set_3.c
index 543a1bea8f3..92b955f8355 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/set_3.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/set_3.c
@@ -17,8 +17,8 @@ f1 (svbool_t pg, svfloat16_t f16, svfloat16x3_t f16x3, svfloat16x4_t f16x4,
   f16x3 = svset3 (f16x4, 0, f16); /* { dg-error {passing 'svfloat16x4_t' to argument 1 of 'svset3', which expects a tuple of 3 vectors} } */
   f16x3 = svset3 (pg, 0, f16); /* { dg-error {passing 'svbool_t' to argument 1 of 'svset3', which expects a tuple of 3 vectors} } */
   f16x3 = svset3 (f16x3, 0, f16x3); /* { dg-error {passing 'svfloat16x3_t' to argument 3 of 'svset3', which expects a single SVE vector rather than a tuple} } */
-  f16x3 = svset3 (f16x3, 0, f64); /* { dg-error {passing 'svfloat64_t' instead of the expected 'svfloat16_t' to argument 3 of 'svset3', after passing 'svfloat16x3_t' to argument 1} } */
-  f16x3 = svset3 (f16x3, 0, pg); /* { dg-error {passing 'svbool_t' instead of the expected 'svfloat16_t' to argument 3 of 'svset3', after passing 'svfloat16x3_t' to argument 1} } */
+  f16x3 = svset3 (f16x3, 0, f64); /* { dg-error {passing 'svfloat64_t' to argument 3 of 'svset3', but argument 1 was a tuple of 'svfloat16_t'} } */
+  f16x3 = svset3 (f16x3, 0, pg); /* { dg-error {passing 'svbool_t' to argument 3 of 'svset3', but argument 1 was a tuple of 'svfloat16_t'} } */
   f16x3 = svset3 (f16x3, x, f16); /* { dg-error {argument 2 of 'svset3' must be an integer constant expression} } */
   f16x3 = svset3 (f16x3, 0, f16);
   f64 = svset3 (f16x3, 0, f16); /* { dg-error {incompatible types when assigning to type 'svfloat64_t' from type 'svfloat16x3_t'} } */
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/set_5.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/set_5.c
index be911a73176..f0696fb07c7 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/set_5.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/set_5.c
@@ -16,8 +16,8 @@ f1 (svbool_t pg, svint32_t s32, svint32x4_t s32x4, svint32x2_t s32x2, int x)
   s32x4 = svset4 (s32x2, 0, s32); /* { dg-error {passing 'svint32x2_t' to argument 1 of 'svset4', which expects a tuple of 4 vectors} } */
   s32x4 = svset4 (pg, 0, s32); /* { dg-error {passing 'svbool_t' to argument 1 of 'svset4', which expects a tuple of 4 vectors} } */
   s32x4 = svset4 (s32x4, 0, s32x4); /* { dg-error {passing 'svint32x4_t' to argument 3 of 'svset4', which expects a single SVE vector rather than a tuple} } */
-  s32x4 = svset4 (s32x4, 0, f64); /* { dg-error {passing 'svfloat64_t' instead of the expected 'svint32_t' to argument 3 of 'svset4', after passing 'svint32x4_t' to argument 1} } */
-  s32x4 = svset4 (s32x4, 0, pg); /* { dg-error {passing 'svbool_t' instead of the expected 'svint32_t' to argument 3 of 'svset4', after passing 'svint32x4_t' to argument 1} } */
+  s32x4 = svset4 (s32x4, 0, f64); /* { dg-error {passing 'svfloat64_t' to argument 3 of 'svset4', but argument 1 was a tuple of 'svint32_t'} } */
+  s32x4 = svset4 (s32x4, 0, pg); /* { dg-error {passing 'svbool_t' to argument 3 of 'svset4', but argument 1 was a tuple of 'svint32_t'} } */
   s32x4 = svset4 (s32x4, x, s32); /* { dg-error {argument 2 of 'svset4' must be an integer constant expression} } */
   s32x4 = svset4 (s32x4, 0, s32);
   f64 = svset4 (s32x4, 0, s32); /* { dg-error {incompatible types when assigning to type 'svfloat64_t' from type 'svint32x4_t'} } */
-- 
2.25.1


  parent reply	other threads:[~2023-12-05 10:13 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-12-05 10:12 [pushed v2 00/25] aarch64: Add support for SME Richard Sandiford
2023-12-05 10:12 ` [pushed v2 01/25] aarch64: Generalise require_immediate_lane_index Richard Sandiford
2023-12-05 10:13 ` [pushed v2 02/25] aarch64: Use SVE's RDVL instruction Richard Sandiford
2023-12-05 10:13 ` [pushed v2 03/25] aarch64: Make AARCH64_FL_SVE requirements explicit Richard Sandiford
2023-12-05 10:13 ` [pushed v2 04/25] aarch64: Add group suffixes to SVE intrinsics Richard Sandiford
2023-12-05 10:13 ` [pushed v2 05/25] aarch64: Add sve_type to SVE builtins code Richard Sandiford
2023-12-05 10:13 ` [pushed v2 06/25] aarch64: Generalise some SVE ACLE error messages Richard Sandiford
2023-12-05 10:13 ` [pushed v2 07/25] aarch64: Replace vague "previous arguments" message Richard Sandiford
2023-12-05 10:13 ` [pushed v2 08/25] aarch64: Make more use of sve_type in ACLE code Richard Sandiford
2023-12-05 10:13 ` Richard Sandiford [this message]
2023-12-05 10:13 ` [pushed v2 10/25] aarch64: Add tuple forms of svreinterpret Richard Sandiford
2023-12-05 10:13 ` [pushed v2 11/25] aarch64: Add arm_streaming(_compatible) attributes Richard Sandiford
2023-12-05 10:13 ` [pushed v2 12/25] aarch64: Add +sme Richard Sandiford
2023-12-05 10:13 ` [pushed v2 13/25] aarch64: Distinguish streaming-compatible AdvSIMD insns Richard Sandiford
2023-12-05 10:13 ` [pushed v2 14/25] aarch64: Mark relevant SVE instructions as non-streaming Richard Sandiford
2023-12-05 10:13 ` [pushed v2 15/25] aarch64: Switch PSTATE.SM around calls Richard Sandiford
2023-12-05 10:13 ` [pushed v2 16/25] aarch64: Add support for SME ZA attributes Richard Sandiford
2023-12-05 10:13 ` [pushed v2 17/25] aarch64: Add a register class for w12-w15 Richard Sandiford
2023-12-05 10:13 ` [pushed v2 18/25] aarch64: Add a VNx1TI mode Richard Sandiford
2023-12-05 10:13 ` [pushed v2 19/25] aarch64: Generalise unspec_based_function_base Richard Sandiford
2023-12-05 10:13 ` [pushed v2 20/25] aarch64: Generalise _m rules for SVE intrinsics Richard Sandiford
2023-12-05 10:13 ` [pushed v2 21/25] aarch64: Add support for <arm_sme.h> Richard Sandiford
2023-12-05 10:13 ` [pushed v2 22/25] aarch64: Add support for __arm_locally_streaming Richard Sandiford
2023-12-05 10:13 ` [pushed v2 23/25] aarch64: Handle PSTATE.SM across abnormal edges Richard Sandiford
2023-12-05 10:13 ` [pushed v2 24/25] aarch64: Enforce inlining restrictions for SME Richard Sandiford
2023-12-05 10:13 ` [pushed v2 25/25] aarch64: Update sibcall handling " Richard Sandiford

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