From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-oi1-x229.google.com (mail-oi1-x229.google.com [IPv6:2607:f8b0:4864:20::229]) by sourceware.org (Postfix) with ESMTPS id 47D3A384F4A0 for ; Fri, 15 Dec 2023 18:53:36 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 47D3A384F4A0 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivosinc.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivosinc.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 47D3A384F4A0 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=2607:f8b0:4864:20::229 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1702666419; cv=none; b=pccy2QDOct8VGa+VcWPJwQFBQJbDXnRo+7UlhW+BJKxPNRic1J4YFhxmnXu8ZYWm3XdSkaxyodmpuqT9DhUs0QbruQNOgG1PEfsNYJHfeZogflqGij/3hLDC8ngntR4eQcgQHqBQL0/bUHeUg3wdX323IyQaep3Q0TR92SUgqd8= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1702666419; c=relaxed/simple; bh=/1Uqw0NoWz4wv4c0VztdZrdvpKwfy1qWRVcOhx4/fks=; h=DKIM-Signature:From:To:Subject:Date:Message-Id:MIME-Version; b=tpKa3vuvsrDV9EUOjWiKYunT0cWj/0Ggzg8rGEZqg4B7A5RcieIenLuvpHLDJcX842g+YwEXNkJI+iYOqp1sLkdfhkxNwTsiTI/TTuH6N/vyN3IGMJA+uQ4R+UiHKfSBFT8WfDhugLfFI95BteTtT5S27KGF1YRYsIecG3yrsvY= ARC-Authentication-Results: i=1; server2.sourceware.org Received: by mail-oi1-x229.google.com with SMTP id 5614622812f47-3b86f3cdca0so768996b6e.3 for ; Fri, 15 Dec 2023 10:53:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1702666415; x=1703271215; darn=gcc.gnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ZEuqgGuLDmsq57tJ4jQmd6fZfuzdn3ikc3B97K6sx0Q=; b=gvw9LMCrmulr+GSm6E6/ZP3fw+UkRun3HSVexZ+tGp06QWyhe0x0ZQMXhd1KyV4+GI m343J2KtjJoEetq57fMMTPT+shKgyAapbPaUaakjb2lCSZE82BXDDaiCueeA9SAXQf5r r7F4YhCBresurX011Uif6w2T9hoDX2Nc4rdOzuCH8GoaS09BtNT3g1wjAlOtX3q2/RHS YAddzc1CXTPaV3fe6x8yF9pglD633PNADFTpOcrec5dZIqJty6Pn8z/vPzhKmVgiUOdk i+5F8E2F7UIHgYr/kN7h/L1mPA+dMC41kfDy+bOpIvWoR2/446bkLxpM1r7fVZxeYugl dUyw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702666415; x=1703271215; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ZEuqgGuLDmsq57tJ4jQmd6fZfuzdn3ikc3B97K6sx0Q=; b=PP0Znt/uVN9VSMIVB3EEcj4LVT4qSYi80T6nq/oIx8WGiRbtD/dtPWw/uyi2mF9te3 RLTlcQZ5hnt8JcdDkSsm25HP+VfhU2KvYsDu8KrfK41PC4IeoN0q24Ptrcc3K0PXvZ6r 1eUfsCUpT6hQo7HOqFQYME+KPf2DHFDQzMYqAUfIbIUNpTH+onrqV+NdMiJ548JOiEDP GcqK8FPXnNk08rOglnbQMco2i3NZ0el9J9Zf0b6Wq2sHao8MkqpSZO0+5FixEStlamRD 8BYpGbt9hQyqJ31WSTtWaYryXADbaRVKUWg8VBPIl2BXdwcRypyr8GrWWb7K/yWBDZfs uMuw== X-Gm-Message-State: AOJu0Yz2bNXqM9eXZ/NL9sBxbUYtPJOC2EtGO6RpQfMCL2dewzii8vOg aJSDpR4qB0JkN1yL177VycKzO40N4c1GybLNZKo= X-Google-Smtp-Source: AGHT+IGKjw7ypee6UaVacGwoieipO1jeXKyXDcr6QabBKjoBlI2vMxH/DGKBLCWOCcqW1MJTyC9MCQ== X-Received: by 2002:a05:6808:1449:b0:3b8:b063:8249 with SMTP id x9-20020a056808144900b003b8b0638249mr16338529oiv.75.1702666415577; Fri, 15 Dec 2023 10:53:35 -0800 (PST) Received: from ewlu.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id s17-20020a056808209100b003b6caf2accfsm3867639oiw.22.2023.12.15.10.53.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Dec 2023 10:53:35 -0800 (PST) From: Edwin Lu To: gcc-patches@gcc.gnu.org Cc: gnu-toolchain@rivosinc.com, kito.cheng@gmail.com, jeffreyalaw@gmail.com, Edwin Lu Subject: [PATCH 1/3][RFC] RISC-V: Add non-vector types to pipelines Date: Fri, 15 Dec 2023 10:53:26 -0800 Message-Id: <20231215185328.794425-2-ewlu@rivosinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231215185328.794425-1-ewlu@rivosinc.com> References: <20231215185328.794425-1-ewlu@rivosinc.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,GIT_PATCH_0,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: This patch does not create vector related insn reservations for generic.md and sifive-7.md. It updates/creates insn reservations for all non-vector typed insns gcc/ChangeLog: * config/riscv/generic-ooo.md (generic_ooo_sfb_alu): create/update reservation (generic_ooo_branch): ditto * config/riscv/generic.md (generic_sfb_alu): ditto * config/riscv/sifive-7.md (sifive_7_popcount): ditto Signed-off-by: Edwin Lu --- gcc/config/riscv/generic-ooo.md | 16 +++++++++++++--- gcc/config/riscv/generic.md | 13 +++++++++---- gcc/config/riscv/sifive-7.md | 12 +++++++++--- 3 files changed, 31 insertions(+), 10 deletions(-) diff --git a/gcc/config/riscv/generic-ooo.md b/gcc/config/riscv/generic-ooo.md index 78b9e48f935..de93245f965 100644 --- a/gcc/config/riscv/generic-ooo.md +++ b/gcc/config/riscv/generic-ooo.md @@ -95,7 +95,7 @@ (define_insn_reservation "generic_ooo_float_store" 6 ;; Vector load/store (define_insn_reservation "generic_ooo_vec_load" 6 (and (eq_attr "tune" "generic_ooo") - (eq_attr "type" "vlde,vldm,vlds,vldux,vldox,vldff,vldr")) + (eq_attr "type" "vlde,vldm,vlds,vldux,vldox,vldff,vldr,rdfrm")) "generic_ooo_vxu_issue,generic_ooo_vxu_alu") (define_insn_reservation "generic_ooo_vec_store" 6 @@ -115,9 +115,19 @@ (define_insn_reservation "generic_ooo_vec_loadstore_seg" 10 (define_insn_reservation "generic_ooo_alu" 1 (and (eq_attr "tune" "generic_ooo") (eq_attr "type" "unknown,const,arith,shift,slt,multi,auipc,nop,logical,\ - move,bitmanip,min,max,minu,maxu,clz,ctz")) + move,bitmanip,rotate,min,max,minu,maxu,clz,ctz,atomic,condmove,cbo,mvpair,zicond")) "generic_ooo_issue,generic_ooo_ixu_alu") +(define_insn_reservation "generic_ooo_sfb_alu" 2 + (and (eq_attr "tune" "generic_ooo") + (eq_attr "type" "sfb_alu")) + "generic_ooo_issue,generic_ooo_ixu_alu") + +;; Branch instructions +(define_insn_reservation "generic_ooo_branch" 1 + (and (eq_attr "tune" "generic_ooo") + (eq_attr "type" "branch,jump,call,jalr,ret,trap,pushpop")) + "generic_ooo_issue,generic_ooo_ixu_alu") ;; Float move, convert and compare. (define_insn_reservation "generic_ooo_float_move" 3 @@ -184,7 +194,7 @@ (define_insn_reservation "generic_ooo_popcount" 2 (define_insn_reservation "generic_ooo_vec_alu" 3 (and (eq_attr "tune" "generic_ooo") (eq_attr "type" "vialu,viwalu,vext,vicalu,vshift,vnshift,viminmax,vicmp,\ - vimov,vsalu,vaalu,vsshift,vnclip,vmov,vfmov")) + vimov,vsalu,vaalu,vsshift,vnclip,vmov,vfmov,vector")) "generic_ooo_vxu_issue,generic_ooo_vxu_alu") ;; Vector float comparison, conversion etc. diff --git a/gcc/config/riscv/generic.md b/gcc/config/riscv/generic.md index 88940483829..3e49d942495 100644 --- a/gcc/config/riscv/generic.md +++ b/gcc/config/riscv/generic.md @@ -27,7 +27,7 @@ (define_cpu_unit "fdivsqrt" "pipe0") (define_insn_reservation "generic_alu" 1 (and (eq_attr "tune" "generic") - (eq_attr "type" "unknown,const,arith,shift,slt,multi,auipc,nop,logical,move,bitmanip,min,max,minu,maxu,clz,ctz,cpop")) + (eq_attr "type" "unknown,const,arith,shift,slt,multi,auipc,nop,logical,move,bitmanip,min,max,minu,maxu,clz,ctz,rotate,atomic,condmove,crypto,mvpair,zicond")) "alu") (define_insn_reservation "generic_load" 3 @@ -42,17 +42,22 @@ (define_insn_reservation "generic_store" 1 (define_insn_reservation "generic_xfer" 3 (and (eq_attr "tune" "generic") - (eq_attr "type" "mfc,mtc,fcvt,fmove,fcmp")) + (eq_attr "type" "mfc,mtc,fcvt,fmove,fcmp,cbo")) "alu") (define_insn_reservation "generic_branch" 1 (and (eq_attr "tune" "generic") - (eq_attr "type" "branch,jump,call,jalr")) + (eq_attr "type" "branch,jump,call,jalr,ret,trap,pushpop")) + "alu") + +(define_insn_reservation "generic_sfb_alu" 2 + (and (eq_attr "tune" "generic") + (eq_attr "type" "sfb_alu")) "alu") (define_insn_reservation "generic_imul" 10 (and (eq_attr "tune" "generic") - (eq_attr "type" "imul,clmul")) + (eq_attr "type" "imul,clmul,cpop")) "imuldiv*10") (define_insn_reservation "generic_idivsi" 34 diff --git a/gcc/config/riscv/sifive-7.md b/gcc/config/riscv/sifive-7.md index a63394c8c58..65d27cf6dc9 100644 --- a/gcc/config/riscv/sifive-7.md +++ b/gcc/config/riscv/sifive-7.md @@ -34,7 +34,7 @@ (define_insn_reservation "sifive_7_fpstore" 1 (define_insn_reservation "sifive_7_branch" 1 (and (eq_attr "tune" "sifive_7") - (eq_attr "type" "branch")) + (eq_attr "type" "branch,ret,trap")) "sifive_7_B") (define_insn_reservation "sifive_7_sfb_alu" 2 @@ -44,7 +44,7 @@ (define_insn_reservation "sifive_7_sfb_alu" 2 (define_insn_reservation "sifive_7_jump" 1 (and (eq_attr "tune" "sifive_7") - (eq_attr "type" "jump,call,jalr")) + (eq_attr "type" "jump,call,jalr,pushpop")) "sifive_7_B") (define_insn_reservation "sifive_7_mul" 3 @@ -59,7 +59,7 @@ (define_insn_reservation "sifive_7_div" 16 (define_insn_reservation "sifive_7_alu" 2 (and (eq_attr "tune" "sifive_7") - (eq_attr "type" "unknown,arith,shift,slt,multi,logical,move")) + (eq_attr "type" "unknown,arith,shift,slt,multi,logical,move,bitmanip,rotate,min,max,minu,maxu,clz,ctz,cbo,atomic,condmove,crypto,mvpair,zicond")) "sifive_7_A|sifive_7_B") (define_insn_reservation "sifive_7_load_immediate" 1 @@ -106,6 +106,12 @@ (define_insn_reservation "sifive_7_f2i" 3 (eq_attr "type" "mfc")) "sifive_7_A") +;; Popcount and clmul. +(define_insn_reservation "sifive_7_popcount" 2 + (and (eq_attr "tune" "sifive_7") + (eq_attr "type" "cpop,clmul")) + "sifive_7_A") + (define_bypass 1 "sifive_7_load,sifive_7_alu,sifive_7_mul,sifive_7_f2i,sifive_7_sfb_alu" "sifive_7_alu,sifive_7_branch") -- 2.34.1